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Searched refs:iview (Results 1 – 25 of 47) sorted by relevance

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/third_party/mesa3d/src/panfrost/lib/
Dpan_texture.c308 pan_iview_get_surface(const struct pan_image_view *iview, in pan_iview_get_surface() argument
312 level += iview->first_level; in pan_iview_get_surface()
313 assert(level < iview->image->layout.nr_slices); in pan_iview_get_surface()
315 layer += iview->first_layer; in pan_iview_get_surface()
317 bool is_3d = iview->image->layout.dim == MALI_TEXTURE_DIMENSION_3D; in pan_iview_get_surface()
318 const struct pan_image_slice_layout *slice = &iview->image->layout.slices[level]; in pan_iview_get_surface()
319 mali_ptr base = iview->image->data.bo->ptr.gpu + iview->image->data.offset; in pan_iview_get_surface()
321 if (drm_is_afbc(iview->image->layout.modifier)) { in pan_iview_get_surface()
325 ASSERTED unsigned depth = u_minify(iview->image->layout.depth, level); in pan_iview_get_surface()
333 assert(layer < iview->image->layout.array_size); in pan_iview_get_surface()
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Dpan_texture.h167 GENX(panfrost_estimate_texture_payload_size)(const struct pan_image_view *iview);
171 const struct pan_image_view *iview,
222 pan_iview_get_surface(const struct pan_image_view *iview,
/third_party/mesa3d/src/freedreno/vulkan/
Dtu_image.c171 tu_cs_image_ref(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer) in tu_cs_image_ref() argument
173 tu_cs_emit(cs, iview->PITCH); in tu_cs_image_ref()
174 tu_cs_emit(cs, iview->layer_size >> 6); in tu_cs_image_ref()
175 tu_cs_emit_qw(cs, iview->base_addr + iview->layer_size * layer); in tu_cs_image_ref()
179 tu_cs_image_stencil_ref(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer) in tu_cs_image_stencil_ref() argument
181 tu_cs_emit(cs, iview->stencil_PITCH); in tu_cs_image_stencil_ref()
182 tu_cs_emit(cs, iview->stencil_layer_size >> 6); in tu_cs_image_stencil_ref()
183 tu_cs_emit_qw(cs, iview->stencil_base_addr + iview->stencil_layer_size * layer); in tu_cs_image_stencil_ref()
187 tu_cs_image_ref_2d(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer, bool src) in tu_cs_image_ref_2d() argument
189 tu_cs_emit_qw(cs, iview->base_addr + iview->layer_size * layer); in tu_cs_image_ref_2d()
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Dtu_clear_blit.c147 const struct tu_image_view *iview, in r2d_src() argument
151 uint32_t src_info = iview->SP_PS_2D_SRC_INFO; in r2d_src()
157 tu_cs_emit(cs, iview->SP_PS_2D_SRC_SIZE); in r2d_src()
158 tu_cs_image_ref_2d(cs, iview, layer, true); in r2d_src()
161 tu_cs_image_flag_ref(cs, iview, layer); in r2d_src()
167 const struct tu_image_view *iview, in r2d_src_stencil() argument
172 tu_cs_emit(cs, tu_image_view_stencil(iview, SP_PS_2D_SRC_INFO) & ~A6XX_SP_PS_2D_SRC_INFO_FLAGS); in r2d_src_stencil()
173 tu_cs_emit(cs, iview->SP_PS_2D_SRC_SIZE); in r2d_src_stencil()
174 tu_cs_emit_qw(cs, iview->stencil_base_addr + iview->stencil_layer_size * layer); in r2d_src_stencil()
176 tu_cs_emit(cs, iview->stencil_PITCH << 9); in r2d_src_stencil()
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Dtu_private.h1503 tu_cs_image_ref(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer);
1506 tu_cs_image_ref_2d(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer, bool src);
1509 tu_cs_image_flag_ref(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer);
1512 tu_cs_image_stencil_ref(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer);
1514 #define tu_image_view_stencil(iview, x) \ argument
1515 ((iview->x & ~A6XX_##x##_COLOR_FORMAT__MASK) | A6XX_##x##_COLOR_FORMAT(FMT6_8_UINT))
1530 tu_image_view_init(struct tu_image_view *iview,
Dtu_cmd_buffer.c212 const struct tu_image_view *iview = cmd->state.attachments[a]; in tu6_emit_zs() local
219 tu_cs_image_ref(cs, iview, 0); in tu6_emit_zs()
226 tu_cs_image_flag_ref(cs, iview, 0); in tu6_emit_zs()
228 tu_cs_emit_regs(cs, A6XX_GRAS_LRZ_BUFFER_BASE(.bo = iview->image->bo, in tu6_emit_zs()
229 … .bo_offset = iview->image->bo_offset + iview->image->lrz_offset), in tu6_emit_zs()
230 A6XX_GRAS_LRZ_BUFFER_PITCH(.pitch = iview->image->lrz_pitch), in tu6_emit_zs()
239 tu_cs_image_stencil_ref(cs, iview, 0); in tu6_emit_zs()
242 tu_cs_image_ref(cs, iview, 0); in tu6_emit_zs()
263 const struct tu_image_view *iview = cmd->state.attachments[a]; in tu6_emit_mrt() local
266 tu_cs_emit(cs, iview->RB_MRT_BUF_INFO); in tu6_emit_mrt()
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/third_party/mesa3d/src/amd/vulkan/
Dradv_meta_clear.c381 const struct radv_image_view *iview = in emit_color_clear() local
382 cmd_buffer->state.attachments ? cmd_buffer->state.attachments[pass_att].iview : NULL; in emit_color_clear()
394 if (iview) { in emit_color_clear()
395 samples = iview->image->info.samples; in emit_color_clear()
396 format = iview->vk_format; in emit_color_clear()
648 depth_view_can_fast_clear(struct radv_cmd_buffer *cmd_buffer, const struct radv_image_view *iview, in depth_view_can_fast_clear() argument
652 if (!iview) in depth_view_can_fast_clear()
655 uint32_t queue_mask = radv_image_queue_family_mask(iview->image, cmd_buffer->queue_family_index, in depth_view_can_fast_clear()
658 clear_rect->rect.extent.width != iview->extent.width || in depth_view_can_fast_clear()
659 clear_rect->rect.extent.height != iview->extent.height) in depth_view_can_fast_clear()
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Dradv_image.c1811 radv_image_view_make_descriptor(struct radv_image_view *iview, struct radv_device *device, in radv_image_view_make_descriptor() argument
1817 struct radv_image *image = iview->image; in radv_image_view_make_descriptor()
1819 bool is_stencil = iview->aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT; in radv_image_view_make_descriptor()
1825 descriptor = &iview->storage_descriptor; in radv_image_view_make_descriptor()
1827 descriptor = &iview->descriptor; in radv_image_view_make_descriptor()
1836 hw_level = iview->base_mip; in radv_image_view_make_descriptor()
1838 device, image, is_storage_image, iview->type, vk_format, components, hw_level, in radv_image_view_make_descriptor()
1839 hw_level + iview->level_count - 1, iview->base_layer, in radv_image_view_make_descriptor()
1840 iview->base_layer + iview->layer_count - 1, in radv_image_view_make_descriptor()
1841 vk_format_get_plane_width(image->vk_format, plane_id, iview->extent.width), in radv_image_view_make_descriptor()
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Dradv_device.c6506 radv_surface_max_layer_count(struct radv_image_view *iview) in radv_surface_max_layer_count() argument
6508 return iview->type == VK_IMAGE_VIEW_TYPE_3D ? iview->extent.depth in radv_surface_max_layer_count()
6509 : (iview->base_layer + iview->layer_count); in radv_surface_max_layer_count()
6514 const struct radv_image_view *iview) in get_dcc_max_uncompressed_block_size() argument
6516 if (device->physical_device->rad_info.chip_class < GFX10 && iview->image->info.samples > 1) { in get_dcc_max_uncompressed_block_size()
6517 if (iview->image->planes[0].surface.bpe == 1) in get_dcc_max_uncompressed_block_size()
6519 else if (iview->image->planes[0].surface.bpe == 2) in get_dcc_max_uncompressed_block_size()
6542 radv_init_dcc_control_reg(struct radv_device *device, struct radv_image_view *iview) in radv_init_dcc_control_reg() argument
6544 unsigned max_uncompressed_block_size = get_dcc_max_uncompressed_block_size(device, iview); in radv_init_dcc_control_reg()
6550 if (!radv_dcc_enabled(iview->image, iview->base_mip)) in radv_init_dcc_control_reg()
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Dradv_meta_fmask_expand.c100 struct radv_image_view iview; in radv_expand_fmask_image_inplace() local
113 radv_image_view_init(&iview, device, in radv_expand_fmask_image_inplace()
142 .imageView = radv_image_view_to_handle(&iview), in radv_expand_fmask_image_inplace()
152 .imageView = radv_image_view_to_handle(&iview), in radv_expand_fmask_image_inplace()
158 radv_image_view_finish(&iview); in radv_expand_fmask_image_inplace()
Dradv_cmd_buffer.c1722 struct radv_color_buffer_info *cb, struct radv_image_view *iview, in radv_emit_fb_color_state() argument
1727 struct radv_image *image = iview->image; in radv_emit_fb_color_state()
1730 cmd_buffer->device, image, iview->base_mip, layout, in_render_loop, in radv_emit_fb_color_state()
1823 .aspectMask = iview->aspect_mask, in radv_emit_fb_color_state()
1824 .baseMipLevel = iview->base_mip, in radv_emit_fb_color_state()
1825 .levelCount = iview->level_count, in radv_emit_fb_color_state()
1826 .baseArrayLayer = iview->base_layer, in radv_emit_fb_color_state()
1827 .layerCount = iview->layer_count, in radv_emit_fb_color_state()
1836 const struct radv_image_view *iview, VkImageLayout layout, in radv_update_zrange_precision() argument
1839 const struct radv_image *image = iview->image; in radv_update_zrange_precision()
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Dradv_meta_blit2d.c52 struct radv_image_view *iview, VkFormat depth_format, VkImageAspectFlagBits aspects) in create_iview() argument
64 radv_image_view_init(iview, cmd_buffer->device, in create_iview()
101 struct radv_image_view iview; member
132 create_iview(cmd_buffer, src_img, &tmp->iview, depth_format, aspects); in blit2d_bind_src()
151 .imageView = radv_image_view_to_handle(&tmp->iview), in blit2d_bind_src()
160 struct radv_image_view iview; member
169 create_iview(cmd_buffer, dst, &tmp->iview, depth_format, aspects); in blit2d_bind_dst()
177 radv_image_view_to_handle(&tmp->iview), in blit2d_bind_dst()
264 unsigned fs_key = radv_format_meta_fs_key(device, dst_temps.iview.vk_format); in radv_meta_blit2d_normal_dst()
402 radv_image_view_finish(&dst_temps.iview); in radv_meta_blit2d_normal_dst()
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Dradv_meta_resolve.c689 struct radv_image_view *src_iview = cmd_buffer->state.attachments[src_att.attachment].iview; in radv_cmd_buffer_resolve_subpass_hw()
692 struct radv_image_view *dest_iview = cmd_buffer->state.attachments[dest_att.attachment].iview; in radv_cmd_buffer_resolve_subpass_hw()
755 struct radv_image_view *src_iview = cmd_buffer->state.attachments[src_att.attachment].iview; in radv_cmd_buffer_resolve_subpass()
756 struct radv_image_view *dst_iview = cmd_buffer->state.attachments[dst_att.attachment].iview; in radv_cmd_buffer_resolve_subpass()
822 cmd_buffer->state.attachments[dest_att.attachment].iview; in radv_cmd_buffer_resolve_subpass()
825 cmd_buffer->state.attachments[src_att.attachment].iview; in radv_cmd_buffer_resolve_subpass()
876 struct radv_image_view *src_iview = cmd_buffer->state.attachments[src_att.attachment].iview; in radv_decompress_resolve_subpass_src()
Dradv_meta_decompress.c486 struct radv_image_view iview; in radv_process_depth_image_layer() local
492 radv_image_view_init(&iview, device, in radv_process_depth_image_layer()
514 .pAttachments = (VkImageView[]){radv_image_view_to_handle(&iview)}, in radv_process_depth_image_layer()
544 radv_image_view_finish(&iview); in radv_process_depth_image_layer()
/third_party/mesa3d/src/gallium/drivers/softpipe/
Dsp_image.c36 const struct pipe_image_view *iview, in get_image_offset() argument
42 return iview->u.buf.offset; in get_image_offset()
49 base_layer = r_coord + iview->u.tex.first_layer; in get_image_offset()
50 return softpipe_get_tex_image_offset(spr, iview->u.tex.level, base_layer); in get_image_offset()
147 get_dimensions(const struct pipe_image_view *iview, in get_dimensions() argument
156 *width = iview->u.buf.size / util_format_get_blocksize(pformat); in get_dimensions()
169 level = spr->base.target == PIPE_BUFFER ? 0 : iview->u.tex.level; in get_dimensions()
212 struct pipe_image_view *iview; in sp_tgsi_load() local
222 iview = &sp_img->sp_iview[params->unit]; in sp_tgsi_load()
223 spr = (struct softpipe_resource *)iview->resource; in sp_tgsi_load()
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/third_party/mesa3d/src/broadcom/vulkan/
Dv3dv_image.c485 struct v3dv_image_view *iview; in v3dv_CreateImageView() local
487 iview = vk_image_view_create(&device->vk, pCreateInfo, pAllocator, in v3dv_CreateImageView()
488 sizeof(*iview)); in v3dv_CreateImageView()
489 if (iview == NULL) in v3dv_CreateImageView()
494 iview->offset = v3dv_layer_offset(image, iview->vk.base_mip_level, in v3dv_CreateImageView()
495 iview->vk.base_array_layer); in v3dv_CreateImageView()
519 vk_component_mapping_to_pipe_swizzle(iview->vk.swizzle.r); in v3dv_CreateImageView()
521 vk_component_mapping_to_pipe_swizzle(iview->vk.swizzle.g); in v3dv_CreateImageView()
523 vk_component_mapping_to_pipe_swizzle(iview->vk.swizzle.b); in v3dv_CreateImageView()
525 vk_component_mapping_to_pipe_swizzle(iview->vk.swizzle.a); in v3dv_CreateImageView()
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Dv3dvx_image.c151 struct v3dv_image_view *iview) in v3dX()
153 pack_texture_shader_state_helper(device, iview, false); in v3dX()
154 if (iview->vk.view_type == VK_IMAGE_VIEW_TYPE_CUBE_ARRAY) in v3dX()
155 pack_texture_shader_state_helper(device, iview, true); in v3dX()
Dv3dvx_cmd_buffer.c104 struct v3dv_image_view *iview, in cmd_buffer_render_pass_emit_load() argument
108 const struct v3dv_image *image = (struct v3dv_image *) iview->vk.image; in cmd_buffer_render_pass_emit_load()
110 &image->slices[iview->vk.base_mip_level]; in cmd_buffer_render_pass_emit_load()
112 v3dv_layer_offset(image, iview->vk.base_mip_level, in cmd_buffer_render_pass_emit_load()
113 iview->vk.base_array_layer + layer); in cmd_buffer_render_pass_emit_load()
119 load.input_image_format = iview->format->rt_type; in cmd_buffer_render_pass_emit_load()
120 load.r_b_swap = iview->swap_rb; in cmd_buffer_render_pass_emit_load()
230 struct v3dv_image_view *iview = framebuffer->attachments[attachment_idx]; in cmd_buffer_render_pass_emit_loads() local
231 cmd_buffer_render_pass_emit_load(cmd_buffer, cl, iview, in cmd_buffer_render_pass_emit_loads()
261 struct v3dv_image_view *iview = in cmd_buffer_render_pass_emit_loads() local
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Dv3dv_descriptor_set.c911 struct v3dv_image_view *iview, in write_image_descriptor() argument
917 descriptor->image_view = iview; in write_image_descriptor()
922 if (iview) { in write_image_descriptor()
924 iview->vk.view_type != VK_IMAGE_VIEW_TYPE_CUBE_ARRAY || in write_image_descriptor()
927 iview->texture_shader_state[tex_state_index], in write_image_descriptor()
928 sizeof(iview->texture_shader_state[0])); in write_image_descriptor()
1012 V3DV_FROM_HANDLE(v3dv_image_view, iview, image_info->imageView); in v3dv_UpdateDescriptorSets()
1014 set, binding_layout, iview, NULL, in v3dv_UpdateDescriptorSets()
1021 V3DV_FROM_HANDLE(v3dv_image_view, iview, image_info->imageView); in v3dv_UpdateDescriptorSets()
1024 set, binding_layout, iview, sampler, in v3dv_UpdateDescriptorSets()
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/third_party/mesa3d/src/intel/vulkan/
Danv_image.c2518 struct anv_image_view *iview; in anv_CreateImageView() local
2520 iview = vk_image_view_create(&device->vk, pCreateInfo, in anv_CreateImageView()
2521 pAllocator, sizeof(*iview)); in anv_CreateImageView()
2522 if (iview == NULL) in anv_CreateImageView()
2525 iview->image = image; in anv_CreateImageView()
2526 iview->n_planes = anv_image_aspect_get_planes(iview->vk.aspects); in anv_CreateImageView()
2555 if (iview->vk.format == VK_FORMAT_UNDEFINED && conv_format) in anv_CreateImageView()
2556 iview->vk.format = conv_format->vk_format; in anv_CreateImageView()
2561 anv_foreach_image_aspect_bit(iaspect_bit, image, iview->vk.aspects) { in anv_CreateImageView()
2565 anv_aspect_to_plane(iview->vk.aspects, 1UL << iaspect_bit); in anv_CreateImageView()
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DgenX_cmd_buffer.c358 struct anv_image_view *iview, in anv_can_fast_clear_color_view() argument
364 if (iview->planes[0].isl.base_array_layer >= in anv_can_fast_clear_color_view()
365 anv_image_aux_layers(iview->image, VK_IMAGE_ASPECT_COLOR_BIT, in anv_can_fast_clear_color_view()
366 iview->planes[0].isl.base_level)) in anv_can_fast_clear_color_view()
374 anv_layout_to_fast_clear_type(&device->info, iview->image, in anv_can_fast_clear_color_view()
381 if (!isl_color_value_is_zero(clear_color, iview->planes[0].isl.format)) in anv_can_fast_clear_color_view()
394 render_area.extent.width != iview->vk.extent.width || in anv_can_fast_clear_color_view()
395 render_area.extent.height != iview->vk.extent.height) in anv_can_fast_clear_color_view()
400 !isl_color_value_is_zero_one(clear_color, iview->planes[0].isl.format)) in anv_can_fast_clear_color_view()
409 &iview->image->planes[0].primary_surface.isl, in anv_can_fast_clear_color_view()
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/third_party/mesa3d/src/gallium/drivers/v3d/
Dv3dx_state.c1306 struct v3d_image_view *iview = &so->si[img]; in v3d_create_image_view_texture_shader_state() local
1311 &iview->tex_state_offset, in v3d_create_image_view_texture_shader_state()
1312 &iview->tex_state, in v3d_create_image_view_texture_shader_state()
1315 struct pipe_resource *prsc = iview->base.resource; in v3d_create_image_view_texture_shader_state()
1319 iview->base.u.tex.level, in v3d_create_image_view_texture_shader_state()
1320 iview->base.u.tex.level, in v3d_create_image_view_texture_shader_state()
1321 iview->base.u.tex.first_layer, in v3d_create_image_view_texture_shader_state()
1322 iview->base.u.tex.last_layer); in v3d_create_image_view_texture_shader_state()
1330 iview->base.format); in v3d_create_image_view_texture_shader_state()
1353 struct v3d_image_view *iview = &so->si[n]; in v3d_set_shader_images() local
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Dv3d_uniforms.c180 struct v3d_image_view *iview = &img->si[unit]; in write_image_tmu_p0() local
181 struct v3d_resource *rsc = v3d_resource(iview->base.resource); in write_image_tmu_p0()
184 v3d_resource(iview->tex_state)->bo, in write_image_tmu_p0()
185 iview->tex_state_offset | p0); in write_image_tmu_p0()
/third_party/mesa3d/src/gallium/frontends/lavapipe/
Dlvp_descriptor_set.c389 LVP_FROM_HANDLE(lvp_image_view, iview, in lvp_UpdateDescriptorSets()
392 desc[j].info.iview = iview; in lvp_UpdateDescriptorSets()
413 LVP_FROM_HANDLE(lvp_image_view, iview, in lvp_UpdateDescriptorSets()
418 .info.iview = iview, in lvp_UpdateDescriptorSets()
632 .info.iview = lvp_image_view_from_handle(info->imageView), in lvp_UpdateDescriptorSetWithTemplate()
640 LVP_FROM_HANDLE(lvp_image_view, iview, in lvp_UpdateDescriptorSetWithTemplate()
644 .info.iview = iview, in lvp_UpdateDescriptorSetWithTemplate()
Dlvp_image.c216 LVP_FROM_HANDLE(lvp_image_view, iview, _iview); in lvp_DestroyImageView()
221 pipe_surface_reference(&iview->surface, NULL); in lvp_DestroyImageView()
222 vk_object_base_finish(&iview->base); in lvp_DestroyImageView()
223 vk_free2(&device->vk.alloc, pAllocator, iview); in lvp_DestroyImageView()

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