1.. SPDX-License-Identifier: GPL-2.0 2 3=============================================================== 4Configurable sysfs parameters for the x86-64 machine check code 5=============================================================== 6 7Machine checks report internal hardware error conditions detected 8by the CPU. Uncorrected errors typically cause a machine check 9(often with panic), corrected ones cause a machine check log entry. 10 11Machine checks are organized in banks (normally associated with 12a hardware subsystem) and subevents in a bank. The exact meaning 13of the banks and subevent is CPU specific. 14 15mcelog knows how to decode them. 16 17When you see the "Machine check errors logged" message in the system 18log then mcelog should run to collect and decode machine check entries 19from /dev/mcelog. Normally mcelog should be run regularly from a cronjob. 20 21Each CPU has a directory in /sys/devices/system/machinecheck/machinecheckN 22(N = CPU number). 23 24The directory contains some configurable entries: 25 26bankNctl 27 (N bank number) 28 29 64bit Hex bitmask enabling/disabling specific subevents for bank N 30 When a bit in the bitmask is zero then the respective 31 subevent will not be reported. 32 By default all events are enabled. 33 Note that BIOS maintain another mask to disable specific events 34 per bank. This is not visible here 35 36The following entries appear for each CPU, but they are truly shared 37between all CPUs. 38 39check_interval 40 How often to poll for corrected machine check errors, in seconds 41 (Note output is hexadecimal). Default 5 minutes. When the poller 42 finds MCEs it triggers an exponential speedup (poll more often) on 43 the polling interval. When the poller stops finding MCEs, it 44 triggers an exponential backoff (poll less often) on the polling 45 interval. The check_interval variable is both the initial and 46 maximum polling interval. 0 means no polling for corrected machine 47 check errors (but some corrected errors might be still reported 48 in other ways) 49 50tolerant 51 Tolerance level. When a machine check exception occurs for a non 52 corrected machine check the kernel can take different actions. 53 Since machine check exceptions can happen any time it is sometimes 54 risky for the kernel to kill a process because it defies 55 normal kernel locking rules. The tolerance level configures 56 how hard the kernel tries to recover even at some risk of 57 deadlock. Higher tolerant values trade potentially better uptime 58 with the risk of a crash or even corruption (for tolerant >= 3). 59 60 0: always panic on uncorrected errors, log corrected errors 61 1: panic or SIGBUS on uncorrected errors, log corrected errors 62 2: SIGBUS or log uncorrected errors, log corrected errors 63 3: never panic or SIGBUS, log all errors (for testing only) 64 65 Default: 1 66 67 Note this only makes a difference if the CPU allows recovery 68 from a machine check exception. Current x86 CPUs generally do not. 69 70trigger 71 Program to run when a machine check event is detected. 72 This is an alternative to running mcelog regularly from cron 73 and allows to detect events faster. 74monarch_timeout 75 How long to wait for the other CPUs to machine check too on a 76 exception. 0 to disable waiting for other CPUs. 77 Unit: us 78 79TBD document entries for AMD threshold interrupt configuration 80 81For more details about the x86 machine check architecture 82see the Intel and AMD architecture manuals from their developer websites. 83 84For more details about the architecture 85see http://one.firstfloor.org/~andi/mce.pdf 86