1&l4_wkup { /* 0x44c00000 */ 2 compatible = "ti,am33xx-l4-wkup", "simple-bus"; 3 reg = <0x44c00000 0x800>, 4 <0x44c00800 0x800>, 5 <0x44c01000 0x400>, 6 <0x44c01400 0x400>; 7 reg-names = "ap", "la", "ia0", "ia1"; 8 #address-cells = <1>; 9 #size-cells = <1>; 10 ranges = <0x00000000 0x44c00000 0x100000>, /* segment 0 */ 11 <0x00100000 0x44d00000 0x100000>, /* segment 1 */ 12 <0x00200000 0x44e00000 0x100000>; /* segment 2 */ 13 14 segment@0 { /* 0x44c00000 */ 15 compatible = "simple-bus"; 16 #address-cells = <1>; 17 #size-cells = <1>; 18 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */ 19 <0x00000800 0x00000800 0x000800>, /* ap 1 */ 20 <0x00001000 0x00001000 0x000400>, /* ap 2 */ 21 <0x00001400 0x00001400 0x000400>; /* ap 3 */ 22 }; 23 24 segment@100000 { /* 0x44d00000 */ 25 compatible = "simple-bus"; 26 #address-cells = <1>; 27 #size-cells = <1>; 28 ranges = <0x00000000 0x00100000 0x004000>, /* ap 4 */ 29 <0x00004000 0x00104000 0x001000>, /* ap 5 */ 30 <0x00080000 0x00180000 0x002000>, /* ap 6 */ 31 <0x00082000 0x00182000 0x001000>; /* ap 7 */ 32 33 target-module@0 { /* 0x44d00000, ap 4 28.0 */ 34 compatible = "ti,sysc-omap4", "ti,sysc"; 35 reg = <0x0 0x4>; 36 reg-names = "rev"; 37 #address-cells = <1>; 38 #size-cells = <1>; 39 ranges = <0x0 0x0 0x4000>; 40 status = "disabled"; 41 }; 42 43 target-module@80000 { /* 0x44d80000, ap 6 10.0 */ 44 compatible = "ti,sysc"; 45 status = "disabled"; 46 #address-cells = <1>; 47 #size-cells = <1>; 48 ranges = <0x0 0x80000 0x2000>; 49 }; 50 }; 51 52 segment@200000 { /* 0x44e00000 */ 53 compatible = "simple-bus"; 54 #address-cells = <1>; 55 #size-cells = <1>; 56 ranges = <0x00000000 0x00200000 0x002000>, /* ap 8 */ 57 <0x00002000 0x00202000 0x001000>, /* ap 9 */ 58 <0x00003000 0x00203000 0x001000>, /* ap 10 */ 59 <0x00004000 0x00204000 0x001000>, /* ap 11 */ 60 <0x00005000 0x00205000 0x001000>, /* ap 12 */ 61 <0x00006000 0x00206000 0x001000>, /* ap 13 */ 62 <0x00007000 0x00207000 0x001000>, /* ap 14 */ 63 <0x00008000 0x00208000 0x001000>, /* ap 15 */ 64 <0x00009000 0x00209000 0x001000>, /* ap 16 */ 65 <0x0000a000 0x0020a000 0x001000>, /* ap 17 */ 66 <0x0000b000 0x0020b000 0x001000>, /* ap 18 */ 67 <0x0000c000 0x0020c000 0x001000>, /* ap 19 */ 68 <0x0000d000 0x0020d000 0x001000>, /* ap 20 */ 69 <0x0000f000 0x0020f000 0x001000>, /* ap 21 */ 70 <0x00010000 0x00210000 0x010000>, /* ap 22 */ 71 <0x00020000 0x00220000 0x010000>, /* ap 23 */ 72 <0x00030000 0x00230000 0x001000>, /* ap 24 */ 73 <0x00031000 0x00231000 0x001000>, /* ap 25 */ 74 <0x00032000 0x00232000 0x001000>, /* ap 26 */ 75 <0x00033000 0x00233000 0x001000>, /* ap 27 */ 76 <0x00034000 0x00234000 0x001000>, /* ap 28 */ 77 <0x00035000 0x00235000 0x001000>, /* ap 29 */ 78 <0x00036000 0x00236000 0x001000>, /* ap 30 */ 79 <0x00037000 0x00237000 0x001000>, /* ap 31 */ 80 <0x00038000 0x00238000 0x001000>, /* ap 32 */ 81 <0x00039000 0x00239000 0x001000>, /* ap 33 */ 82 <0x0003a000 0x0023a000 0x001000>, /* ap 34 */ 83 <0x0003e000 0x0023e000 0x001000>, /* ap 35 */ 84 <0x0003f000 0x0023f000 0x001000>, /* ap 36 */ 85 <0x0000e000 0x0020e000 0x001000>, /* ap 37 */ 86 <0x00040000 0x00240000 0x040000>, /* ap 38 */ 87 <0x00080000 0x00280000 0x001000>; /* ap 39 */ 88 89 target-module@0 { /* 0x44e00000, ap 8 58.0 */ 90 compatible = "ti,sysc-omap4", "ti,sysc"; 91 reg = <0 0x4>; 92 reg-names = "rev"; 93 #address-cells = <1>; 94 #size-cells = <1>; 95 ranges = <0x0 0x0 0x2000>; 96 97 prcm: prcm@0 { 98 compatible = "ti,am3-prcm", "simple-bus"; 99 reg = <0 0x2000>; 100 #address-cells = <1>; 101 #size-cells = <1>; 102 ranges = <0 0 0x2000>; 103 104 prcm_clocks: clocks { 105 #address-cells = <1>; 106 #size-cells = <0>; 107 }; 108 109 prcm_clockdomains: clockdomains { 110 }; 111 }; 112 }; 113 114 target-module@3000 { /* 0x44e03000, ap 10 0a.0 */ 115 compatible = "ti,sysc"; 116 status = "disabled"; 117 #address-cells = <1>; 118 #size-cells = <1>; 119 ranges = <0x0 0x3000 0x1000>; 120 }; 121 122 target-module@5000 { /* 0x44e05000, ap 12 30.0 */ 123 compatible = "ti,sysc"; 124 status = "disabled"; 125 #address-cells = <1>; 126 #size-cells = <1>; 127 ranges = <0x0 0x5000 0x1000>; 128 }; 129 130 gpio0_target: target-module@7000 { /* 0x44e07000, ap 14 20.0 */ 131 compatible = "ti,sysc-omap2", "ti,sysc"; 132 reg = <0x7000 0x4>, 133 <0x7010 0x4>, 134 <0x7114 0x4>; 135 reg-names = "rev", "sysc", "syss"; 136 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 137 SYSC_OMAP2_SOFTRESET | 138 SYSC_OMAP2_AUTOIDLE)>; 139 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 140 <SYSC_IDLE_NO>, 141 <SYSC_IDLE_SMART>, 142 <SYSC_IDLE_SMART_WKUP>; 143 ti,syss-mask = <1>; 144 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */ 145 clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_GPIO1_CLKCTRL 0>, 146 <&l4_wkup_clkctrl AM3_L4_WKUP_GPIO1_CLKCTRL 18>; 147 clock-names = "fck", "dbclk"; 148 #address-cells = <1>; 149 #size-cells = <1>; 150 ranges = <0x0 0x7000 0x1000>; 151 152 gpio0: gpio@0 { 153 compatible = "ti,omap4-gpio"; 154 gpio-ranges = <&am33xx_pinmux 0 82 8>, 155 <&am33xx_pinmux 8 52 4>, 156 <&am33xx_pinmux 12 94 4>, 157 <&am33xx_pinmux 16 71 2>, 158 <&am33xx_pinmux 18 135 1>, 159 <&am33xx_pinmux 19 108 2>, 160 <&am33xx_pinmux 21 73 1>, 161 <&am33xx_pinmux 22 8 2>, 162 <&am33xx_pinmux 26 10 2>, 163 <&am33xx_pinmux 28 74 1>, 164 <&am33xx_pinmux 29 81 1>, 165 <&am33xx_pinmux 30 28 2>; 166 gpio-controller; 167 #gpio-cells = <2>; 168 interrupt-controller; 169 #interrupt-cells = <2>; 170 reg = <0x0 0x1000>; 171 interrupts = <96>; 172 }; 173 }; 174 175 target-module@9000 { /* 0x44e09000, ap 16 04.0 */ 176 compatible = "ti,sysc-omap2", "ti,sysc"; 177 reg = <0x9050 0x4>, 178 <0x9054 0x4>, 179 <0x9058 0x4>; 180 reg-names = "rev", "sysc", "syss"; 181 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 182 SYSC_OMAP2_SOFTRESET | 183 SYSC_OMAP2_AUTOIDLE)>; 184 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 185 <SYSC_IDLE_NO>, 186 <SYSC_IDLE_SMART>, 187 <SYSC_IDLE_SMART_WKUP>; 188 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */ 189 clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_UART1_CLKCTRL 0>; 190 clock-names = "fck"; 191 #address-cells = <1>; 192 #size-cells = <1>; 193 ranges = <0x0 0x9000 0x1000>; 194 195 uart0: serial@0 { 196 compatible = "ti,am3352-uart", "ti,omap3-uart"; 197 clock-frequency = <48000000>; 198 reg = <0x0 0x1000>; 199 interrupts = <72>; 200 status = "disabled"; 201 dmas = <&edma 26 0>, <&edma 27 0>; 202 dma-names = "tx", "rx"; 203 }; 204 }; 205 206 target-module@b000 { /* 0x44e0b000, ap 18 48.0 */ 207 compatible = "ti,sysc-omap2", "ti,sysc"; 208 reg = <0xb000 0x8>, 209 <0xb010 0x8>, 210 <0xb090 0x8>; 211 reg-names = "rev", "sysc", "syss"; 212 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 213 SYSC_OMAP2_ENAWAKEUP | 214 SYSC_OMAP2_SOFTRESET | 215 SYSC_OMAP2_AUTOIDLE)>; 216 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 217 <SYSC_IDLE_NO>, 218 <SYSC_IDLE_SMART>, 219 <SYSC_IDLE_SMART_WKUP>; 220 ti,syss-mask = <1>; 221 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */ 222 clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_I2C1_CLKCTRL 0>; 223 clock-names = "fck"; 224 #address-cells = <1>; 225 #size-cells = <1>; 226 ranges = <0x0 0xb000 0x1000>; 227 228 i2c0: i2c@0 { 229 compatible = "ti,omap4-i2c"; 230 #address-cells = <1>; 231 #size-cells = <0>; 232 reg = <0x0 0x1000>; 233 interrupts = <70>; 234 status = "disabled"; 235 }; 236 }; 237 238 target-module@d000 { /* 0x44e0d000, ap 20 38.0 */ 239 compatible = "ti,sysc-omap4", "ti,sysc"; 240 reg = <0xd000 0x4>, 241 <0xd010 0x4>; 242 reg-names = "rev", "sysc"; 243 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 244 <SYSC_IDLE_NO>, 245 <SYSC_IDLE_SMART>, 246 <SYSC_IDLE_SMART_WKUP>; 247 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */ 248 clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_ADC_TSC_CLKCTRL 0>; 249 clock-names = "fck"; 250 #address-cells = <1>; 251 #size-cells = <1>; 252 ranges = <0x00000000 0x0000d000 0x00001000>, 253 <0x00001000 0x0000e000 0x00001000>; 254 255 tscadc: tscadc@0 { 256 compatible = "ti,am3359-tscadc"; 257 reg = <0x0 0x1000>; 258 interrupts = <16>; 259 status = "disabled"; 260 dmas = <&edma 53 0>, <&edma 57 0>; 261 dma-names = "fifo0", "fifo1"; 262 263 tsc { 264 compatible = "ti,am3359-tsc"; 265 }; 266 am335x_adc: adc { 267 #io-channel-cells = <1>; 268 compatible = "ti,am3359-adc"; 269 }; 270 }; 271 }; 272 273 target-module@10000 { /* 0x44e10000, ap 22 0c.0 */ 274 compatible = "ti,sysc-omap4", "ti,sysc"; 275 reg = <0x10000 0x4>; 276 reg-names = "rev"; 277 #address-cells = <1>; 278 #size-cells = <1>; 279 ranges = <0x00000000 0x00010000 0x00010000>, 280 <0x00010000 0x00020000 0x00010000>; 281 282 scm: scm@0 { 283 compatible = "ti,am3-scm", "simple-bus"; 284 reg = <0x0 0x2000>; 285 #address-cells = <1>; 286 #size-cells = <1>; 287 #pinctrl-cells = <1>; 288 ranges = <0 0 0x2000>; 289 290 am33xx_pinmux: pinmux@800 { 291 compatible = "pinctrl-single"; 292 reg = <0x800 0x238>; 293 #pinctrl-cells = <2>; 294 pinctrl-single,register-width = <32>; 295 pinctrl-single,function-mask = <0x7f>; 296 }; 297 298 scm_conf: scm_conf@0 { 299 compatible = "syscon", "simple-bus"; 300 reg = <0x0 0x800>; 301 #address-cells = <1>; 302 #size-cells = <1>; 303 ranges = <0 0 0x800>; 304 305 phy_gmii_sel: phy-gmii-sel { 306 compatible = "ti,am3352-phy-gmii-sel"; 307 reg = <0x650 0x4>; 308 #phy-cells = <2>; 309 }; 310 311 scm_clocks: clocks { 312 #address-cells = <1>; 313 #size-cells = <0>; 314 }; 315 }; 316 317 usb_ctrl_mod: control@620 { 318 compatible = "ti,am335x-usb-ctrl-module"; 319 reg = <0x620 0x10>, 320 <0x648 0x4>; 321 reg-names = "phy_ctrl", "wakeup"; 322 }; 323 324 wkup_m3_ipc: wkup_m3_ipc@1324 { 325 compatible = "ti,am3352-wkup-m3-ipc"; 326 reg = <0x1324 0x24>; 327 interrupts = <78>; 328 ti,rproc = <&wkup_m3>; 329 mboxes = <&mailbox &mbox_wkupm3>; 330 }; 331 332 edma_xbar: dma-router@f90 { 333 compatible = "ti,am335x-edma-crossbar"; 334 reg = <0xf90 0x40>; 335 #dma-cells = <3>; 336 dma-requests = <32>; 337 dma-masters = <&edma>; 338 }; 339 340 scm_clockdomains: clockdomains { 341 }; 342 }; 343 }; 344 345 timer1_target: target-module@31000 { /* 0x44e31000, ap 25 40.0 */ 346 compatible = "ti,sysc-omap2-timer", "ti,sysc"; 347 reg = <0x31000 0x4>, 348 <0x31010 0x4>, 349 <0x31014 0x4>; 350 reg-names = "rev", "sysc", "syss"; 351 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 352 SYSC_OMAP2_SOFTRESET | 353 SYSC_OMAP2_AUTOIDLE)>; 354 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 355 <SYSC_IDLE_NO>, 356 <SYSC_IDLE_SMART>; 357 ti,syss-mask = <1>; 358 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */ 359 clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_TIMER1_CLKCTRL 0>; 360 clock-names = "fck"; 361 #address-cells = <1>; 362 #size-cells = <1>; 363 ranges = <0x0 0x31000 0x1000>; 364 365 timer1: timer@0 { 366 compatible = "ti,am335x-timer-1ms"; 367 reg = <0x0 0x400>; 368 interrupts = <67>; 369 ti,timer-alwon; 370 clocks = <&timer1_fck>; 371 clock-names = "fck"; 372 }; 373 }; 374 375 target-module@33000 { /* 0x44e33000, ap 27 18.0 */ 376 compatible = "ti,sysc"; 377 status = "disabled"; 378 #address-cells = <1>; 379 #size-cells = <1>; 380 ranges = <0x0 0x33000 0x1000>; 381 }; 382 383 target-module@35000 { /* 0x44e35000, ap 29 50.0 */ 384 compatible = "ti,sysc-omap2", "ti,sysc"; 385 reg = <0x35000 0x4>, 386 <0x35010 0x4>, 387 <0x35014 0x4>; 388 reg-names = "rev", "sysc", "syss"; 389 ti,sysc-mask = <(SYSC_OMAP2_EMUFREE | 390 SYSC_OMAP2_SOFTRESET)>; 391 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 392 <SYSC_IDLE_NO>, 393 <SYSC_IDLE_SMART>, 394 <SYSC_IDLE_SMART_WKUP>; 395 ti,syss-mask = <1>; 396 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */ 397 clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_WD_TIMER2_CLKCTRL 0>; 398 clock-names = "fck"; 399 #address-cells = <1>; 400 #size-cells = <1>; 401 ranges = <0x0 0x35000 0x1000>; 402 403 wdt2: wdt@0 { 404 compatible = "ti,omap3-wdt"; 405 reg = <0x0 0x1000>; 406 interrupts = <91>; 407 }; 408 }; 409 410 target-module@37000 { /* 0x44e37000, ap 31 08.0 */ 411 compatible = "ti,sysc"; 412 status = "disabled"; 413 #address-cells = <1>; 414 #size-cells = <1>; 415 ranges = <0x0 0x37000 0x1000>; 416 }; 417 418 target-module@39000 { /* 0x44e39000, ap 33 02.0 */ 419 compatible = "ti,sysc"; 420 status = "disabled"; 421 #address-cells = <1>; 422 #size-cells = <1>; 423 ranges = <0x0 0x39000 0x1000>; 424 }; 425 426 target-module@3e000 { /* 0x44e3e000, ap 35 60.0 */ 427 compatible = "ti,sysc-omap4-simple", "ti,sysc"; 428 reg = <0x3e074 0x4>, 429 <0x3e078 0x4>; 430 reg-names = "rev", "sysc"; 431 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 432 <SYSC_IDLE_NO>, 433 <SYSC_IDLE_SMART>, 434 <SYSC_IDLE_SMART_WKUP>; 435 /* Domains (P, C): rtc_pwrdm, l4_rtc_clkdm */ 436 clocks = <&l4_rtc_clkctrl AM3_L4_RTC_RTC_CLKCTRL 0>; 437 clock-names = "fck"; 438 #address-cells = <1>; 439 #size-cells = <1>; 440 ranges = <0x0 0x3e000 0x1000>; 441 442 rtc: rtc@0 { 443 compatible = "ti,am3352-rtc", "ti,da830-rtc"; 444 reg = <0x0 0x1000>; 445 interrupts = <75 446 76>; 447 }; 448 }; 449 450 target-module@40000 { /* 0x44e40000, ap 38 68.0 */ 451 compatible = "ti,sysc"; 452 status = "disabled"; 453 #address-cells = <1>; 454 #size-cells = <1>; 455 ranges = <0x0 0x40000 0x40000>; 456 }; 457 }; 458}; 459 460&l4_fw { /* 0x47c00000 */ 461 compatible = "ti,am33xx-l4-fw", "simple-bus"; 462 reg = <0x47c00000 0x800>, 463 <0x47c00800 0x800>, 464 <0x47c01000 0x400>; 465 reg-names = "ap", "la", "ia0"; 466 #address-cells = <1>; 467 #size-cells = <1>; 468 ranges = <0x00000000 0x47c00000 0x1000000>; /* segment 0 */ 469 470 segment@0 { /* 0x47c00000 */ 471 compatible = "simple-bus"; 472 #address-cells = <1>; 473 #size-cells = <1>; 474 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */ 475 <0x00000800 0x00000800 0x000800>, /* ap 1 */ 476 <0x00001000 0x00001000 0x000400>, /* ap 2 */ 477 <0x0000c000 0x0000c000 0x001000>, /* ap 3 */ 478 <0x0000d000 0x0000d000 0x001000>, /* ap 4 */ 479 <0x0000e000 0x0000e000 0x001000>, /* ap 5 */ 480 <0x0000f000 0x0000f000 0x001000>, /* ap 6 */ 481 <0x00010000 0x00010000 0x001000>, /* ap 7 */ 482 <0x00011000 0x00011000 0x001000>, /* ap 8 */ 483 <0x0001a000 0x0001a000 0x001000>, /* ap 9 */ 484 <0x0001b000 0x0001b000 0x001000>, /* ap 10 */ 485 <0x00024000 0x00024000 0x001000>, /* ap 11 */ 486 <0x00025000 0x00025000 0x001000>, /* ap 12 */ 487 <0x00026000 0x00026000 0x001000>, /* ap 13 */ 488 <0x00027000 0x00027000 0x001000>, /* ap 14 */ 489 <0x00030000 0x00030000 0x001000>, /* ap 15 */ 490 <0x00031000 0x00031000 0x001000>, /* ap 16 */ 491 <0x00038000 0x00038000 0x001000>, /* ap 17 */ 492 <0x00039000 0x00039000 0x001000>, /* ap 18 */ 493 <0x0003a000 0x0003a000 0x001000>, /* ap 19 */ 494 <0x0003b000 0x0003b000 0x001000>, /* ap 20 */ 495 <0x0003e000 0x0003e000 0x001000>, /* ap 21 */ 496 <0x0003f000 0x0003f000 0x001000>, /* ap 22 */ 497 <0x0003c000 0x0003c000 0x001000>, /* ap 23 */ 498 <0x00040000 0x00040000 0x001000>, /* ap 24 */ 499 <0x00046000 0x00046000 0x001000>, /* ap 25 */ 500 <0x00047000 0x00047000 0x001000>, /* ap 26 */ 501 <0x00044000 0x00044000 0x001000>, /* ap 27 */ 502 <0x00045000 0x00045000 0x001000>, /* ap 28 */ 503 <0x00028000 0x00028000 0x001000>, /* ap 29 */ 504 <0x00029000 0x00029000 0x001000>, /* ap 30 */ 505 <0x00032000 0x00032000 0x001000>, /* ap 31 */ 506 <0x00033000 0x00033000 0x001000>, /* ap 32 */ 507 <0x0003d000 0x0003d000 0x001000>, /* ap 33 */ 508 <0x00041000 0x00041000 0x001000>, /* ap 34 */ 509 <0x00042000 0x00042000 0x001000>, /* ap 35 */ 510 <0x00043000 0x00043000 0x001000>, /* ap 36 */ 511 <0x00014000 0x00014000 0x001000>, /* ap 37 */ 512 <0x00015000 0x00015000 0x001000>; /* ap 38 */ 513 514 target-module@c000 { /* 0x47c0c000, ap 3 04.0 */ 515 compatible = "ti,sysc"; 516 status = "disabled"; 517 #address-cells = <1>; 518 #size-cells = <1>; 519 ranges = <0x0 0xc000 0x1000>; 520 }; 521 522 target-module@e000 { /* 0x47c0e000, ap 5 0c.0 */ 523 compatible = "ti,sysc"; 524 status = "disabled"; 525 #address-cells = <1>; 526 #size-cells = <1>; 527 ranges = <0x0 0xe000 0x1000>; 528 }; 529 530 target-module@10000 { /* 0x47c10000, ap 7 20.0 */ 531 compatible = "ti,sysc"; 532 status = "disabled"; 533 #address-cells = <1>; 534 #size-cells = <1>; 535 ranges = <0x0 0x10000 0x1000>; 536 }; 537 538 target-module@14000 { /* 0x47c14000, ap 37 3c.0 */ 539 compatible = "ti,sysc"; 540 status = "disabled"; 541 #address-cells = <1>; 542 #size-cells = <1>; 543 ranges = <0x0 0x14000 0x1000>; 544 }; 545 546 target-module@1a000 { /* 0x47c1a000, ap 9 08.0 */ 547 compatible = "ti,sysc"; 548 status = "disabled"; 549 #address-cells = <1>; 550 #size-cells = <1>; 551 ranges = <0x0 0x1a000 0x1000>; 552 }; 553 554 target-module@24000 { /* 0x47c24000, ap 11 28.0 */ 555 compatible = "ti,sysc"; 556 status = "disabled"; 557 #address-cells = <1>; 558 #size-cells = <1>; 559 ranges = <0x0 0x24000 0x1000>; 560 }; 561 562 target-module@26000 { /* 0x47c26000, ap 13 30.0 */ 563 compatible = "ti,sysc"; 564 status = "disabled"; 565 #address-cells = <1>; 566 #size-cells = <1>; 567 ranges = <0x0 0x26000 0x1000>; 568 }; 569 570 target-module@28000 { /* 0x47c28000, ap 29 40.0 */ 571 compatible = "ti,sysc"; 572 status = "disabled"; 573 #address-cells = <1>; 574 #size-cells = <1>; 575 ranges = <0x0 0x28000 0x1000>; 576 }; 577 578 target-module@30000 { /* 0x47c30000, ap 15 14.0 */ 579 compatible = "ti,sysc"; 580 status = "disabled"; 581 #address-cells = <1>; 582 #size-cells = <1>; 583 ranges = <0x0 0x30000 0x1000>; 584 }; 585 586 target-module@32000 { /* 0x47c32000, ap 31 06.0 */ 587 compatible = "ti,sysc"; 588 status = "disabled"; 589 #address-cells = <1>; 590 #size-cells = <1>; 591 ranges = <0x0 0x32000 0x1000>; 592 }; 593 594 target-module@38000 { /* 0x47c38000, ap 17 18.0 */ 595 compatible = "ti,sysc"; 596 status = "disabled"; 597 #address-cells = <1>; 598 #size-cells = <1>; 599 ranges = <0x0 0x38000 0x1000>; 600 }; 601 602 target-module@3a000 { /* 0x47c3a000, ap 19 1c.0 */ 603 compatible = "ti,sysc"; 604 status = "disabled"; 605 #address-cells = <1>; 606 #size-cells = <1>; 607 ranges = <0x0 0x3a000 0x1000>; 608 }; 609 610 target-module@3c000 { /* 0x47c3c000, ap 23 38.0 */ 611 compatible = "ti,sysc"; 612 status = "disabled"; 613 #address-cells = <1>; 614 #size-cells = <1>; 615 ranges = <0x0 0x3c000 0x1000>; 616 }; 617 618 target-module@3e000 { /* 0x47c3e000, ap 21 10.0 */ 619 compatible = "ti,sysc"; 620 status = "disabled"; 621 #address-cells = <1>; 622 #size-cells = <1>; 623 ranges = <0x0 0x3e000 0x1000>; 624 }; 625 626 target-module@40000 { /* 0x47c40000, ap 24 02.0 */ 627 compatible = "ti,sysc"; 628 status = "disabled"; 629 #address-cells = <1>; 630 #size-cells = <1>; 631 ranges = <0x0 0x40000 0x1000>; 632 }; 633 634 target-module@42000 { /* 0x47c42000, ap 35 34.0 */ 635 compatible = "ti,sysc"; 636 status = "disabled"; 637 #address-cells = <1>; 638 #size-cells = <1>; 639 ranges = <0x0 0x42000 0x1000>; 640 }; 641 642 target-module@44000 { /* 0x47c44000, ap 27 24.0 */ 643 compatible = "ti,sysc"; 644 status = "disabled"; 645 #address-cells = <1>; 646 #size-cells = <1>; 647 ranges = <0x0 0x44000 0x1000>; 648 }; 649 650 target-module@46000 { /* 0x47c46000, ap 25 2c.0 */ 651 compatible = "ti,sysc"; 652 status = "disabled"; 653 #address-cells = <1>; 654 #size-cells = <1>; 655 ranges = <0x0 0x46000 0x1000>; 656 }; 657 }; 658}; 659 660&l4_fast { /* 0x4a000000 */ 661 compatible = "ti,am33xx-l4-fast", "simple-bus"; 662 reg = <0x4a000000 0x800>, 663 <0x4a000800 0x800>, 664 <0x4a001000 0x400>; 665 reg-names = "ap", "la", "ia0"; 666 #address-cells = <1>; 667 #size-cells = <1>; 668 ranges = <0x00000000 0x4a000000 0x1000000>; /* segment 0 */ 669 670 segment@0 { /* 0x4a000000 */ 671 compatible = "simple-bus"; 672 #address-cells = <1>; 673 #size-cells = <1>; 674 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */ 675 <0x00000800 0x00000800 0x000800>, /* ap 1 */ 676 <0x00001000 0x00001000 0x000400>, /* ap 2 */ 677 <0x00100000 0x00100000 0x008000>, /* ap 3 */ 678 <0x00108000 0x00108000 0x001000>, /* ap 4 */ 679 <0x00180000 0x00180000 0x020000>, /* ap 5 */ 680 <0x001a0000 0x001a0000 0x001000>, /* ap 6 */ 681 <0x00200000 0x00200000 0x080000>, /* ap 7 */ 682 <0x00280000 0x00280000 0x001000>, /* ap 8 */ 683 <0x00300000 0x00300000 0x080000>, /* ap 9 */ 684 <0x00380000 0x00380000 0x001000>; /* ap 10 */ 685 686 target-module@100000 { /* 0x4a100000, ap 3 08.0 */ 687 compatible = "ti,sysc-omap4-simple", "ti,sysc"; 688 reg = <0x101200 0x4>, 689 <0x101208 0x4>, 690 <0x101204 0x4>; 691 reg-names = "rev", "sysc", "syss"; 692 ti,sysc-mask = <0>; 693 ti,sysc-midle = <SYSC_IDLE_FORCE>, 694 <SYSC_IDLE_NO>; 695 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 696 <SYSC_IDLE_NO>; 697 ti,syss-mask = <1>; 698 clocks = <&cpsw_125mhz_clkctrl AM3_CPSW_125MHZ_CPGMAC0_CLKCTRL 0>; 699 clock-names = "fck"; 700 #address-cells = <1>; 701 #size-cells = <1>; 702 ranges = <0x0 0x100000 0x8000>; 703 704 mac: ethernet@0 { 705 compatible = "ti,am335x-cpsw","ti,cpsw"; 706 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>; 707 clock-names = "fck", "cpts"; 708 cpdma_channels = <8>; 709 ale_entries = <1024>; 710 bd_ram_size = <0x2000>; 711 mac_control = <0x20>; 712 slaves = <2>; 713 active_slave = <0>; 714 cpts_clock_mult = <0x80000000>; 715 cpts_clock_shift = <29>; 716 reg = <0x0 0x800 717 0x1200 0x100>; 718 #address-cells = <1>; 719 #size-cells = <1>; 720 /* 721 * c0_rx_thresh_pend 722 * c0_rx_pend 723 * c0_tx_pend 724 * c0_misc_pend 725 */ 726 interrupts = <40 41 42 43>; 727 ranges = <0 0 0x8000>; 728 syscon = <&scm_conf>; 729 status = "disabled"; 730 731 davinci_mdio: mdio@1000 { 732 compatible = "ti,cpsw-mdio","ti,davinci_mdio"; 733 clocks = <&cpsw_125mhz_clkctrl AM3_CPSW_125MHZ_CPGMAC0_CLKCTRL 0>; 734 clock-names = "fck"; 735 #address-cells = <1>; 736 #size-cells = <0>; 737 bus_freq = <1000000>; 738 reg = <0x1000 0x100>; 739 status = "disabled"; 740 }; 741 742 cpsw_emac0: slave@200 { 743 /* Filled in by U-Boot */ 744 mac-address = [ 00 00 00 00 00 00 ]; 745 phys = <&phy_gmii_sel 1 1>; 746 }; 747 748 cpsw_emac1: slave@300 { 749 /* Filled in by U-Boot */ 750 mac-address = [ 00 00 00 00 00 00 ]; 751 phys = <&phy_gmii_sel 2 1>; 752 }; 753 }; 754 }; 755 756 target-module@180000 { /* 0x4a180000, ap 5 10.0 */ 757 compatible = "ti,sysc"; 758 status = "disabled"; 759 #address-cells = <1>; 760 #size-cells = <1>; 761 ranges = <0x0 0x180000 0x20000>; 762 }; 763 764 target-module@200000 { /* 0x4a200000, ap 7 02.0 */ 765 compatible = "ti,sysc"; 766 status = "disabled"; 767 #address-cells = <1>; 768 #size-cells = <1>; 769 ranges = <0x0 0x200000 0x80000>; 770 }; 771 772 pruss_tm: target-module@300000 { /* 0x4a300000, ap 9 04.0 */ 773 compatible = "ti,sysc-pruss", "ti,sysc"; 774 reg = <0x326000 0x4>, 775 <0x326004 0x4>; 776 reg-names = "rev", "sysc"; 777 ti,sysc-mask = <(SYSC_PRUSS_STANDBY_INIT | 778 SYSC_PRUSS_SUB_MWAIT)>; 779 ti,sysc-midle = <SYSC_IDLE_FORCE>, 780 <SYSC_IDLE_NO>, 781 <SYSC_IDLE_SMART>; 782 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 783 <SYSC_IDLE_NO>, 784 <SYSC_IDLE_SMART>; 785 clocks = <&pruss_ocp_clkctrl AM3_PRUSS_OCP_PRUSS_CLKCTRL 0>; 786 clock-names = "fck"; 787 resets = <&prm_per 1>; 788 reset-names = "rstctrl"; 789 #address-cells = <1>; 790 #size-cells = <1>; 791 ranges = <0x0 0x300000 0x80000>; 792 status = "disabled"; 793 }; 794 }; 795}; 796 797&l4_mpuss { /* 0x4b140000 */ 798 compatible = "ti,am33xx-l4-mpuss", "simple-bus"; 799 reg = <0x4b144400 0x100>, 800 <0x4b144800 0x400>; 801 reg-names = "la", "ap"; 802 #address-cells = <1>; 803 #size-cells = <1>; 804 ranges = <0x00000000 0x4b140000 0x008000>; /* segment 0 */ 805 806 segment@0 { /* 0x4b140000 */ 807 compatible = "simple-bus"; 808 #address-cells = <1>; 809 #size-cells = <1>; 810 ranges = <0x00004800 0x00004800 0x000400>, /* ap 0 */ 811 <0x00001000 0x00001000 0x001000>, /* ap 1 */ 812 <0x00002000 0x00002000 0x001000>, /* ap 2 */ 813 <0x00004000 0x00004000 0x000400>, /* ap 3 */ 814 <0x00005000 0x00005000 0x000400>, /* ap 4 */ 815 <0x00000000 0x00000000 0x001000>, /* ap 5 */ 816 <0x00003000 0x00003000 0x001000>, /* ap 6 */ 817 <0x00000800 0x00000800 0x000800>; /* ap 7 */ 818 819 target-module@0 { /* 0x4b140000, ap 5 02.2 */ 820 compatible = "ti,sysc"; 821 status = "disabled"; 822 #address-cells = <1>; 823 #size-cells = <1>; 824 ranges = <0x00000000 0x00000000 0x00001000>, 825 <0x00001000 0x00001000 0x00001000>, 826 <0x00002000 0x00002000 0x00001000>; 827 }; 828 829 target-module@3000 { /* 0x4b143000, ap 6 04.0 */ 830 compatible = "ti,sysc"; 831 status = "disabled"; 832 #address-cells = <1>; 833 #size-cells = <1>; 834 ranges = <0x0 0x3000 0x1000>; 835 }; 836 }; 837}; 838 839&l4_per { /* 0x48000000 */ 840 compatible = "ti,am33xx-l4-per", "simple-bus"; 841 reg = <0x48000000 0x800>, 842 <0x48000800 0x800>, 843 <0x48001000 0x400>, 844 <0x48001400 0x400>, 845 <0x48001800 0x400>, 846 <0x48001c00 0x400>; 847 reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3"; 848 #address-cells = <1>; 849 #size-cells = <1>; 850 ranges = <0x00000000 0x48000000 0x100000>, /* segment 0 */ 851 <0x00100000 0x48100000 0x100000>, /* segment 1 */ 852 <0x00200000 0x48200000 0x100000>, /* segment 2 */ 853 <0x00300000 0x48300000 0x100000>, /* segment 3 */ 854 <0x46000000 0x46000000 0x400000>, /* l3 data port */ 855 <0x46400000 0x46400000 0x400000>; /* l3 data port */ 856 857 segment@0 { /* 0x48000000 */ 858 compatible = "simple-bus"; 859 #address-cells = <1>; 860 #size-cells = <1>; 861 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */ 862 <0x00000800 0x00000800 0x000800>, /* ap 1 */ 863 <0x00001000 0x00001000 0x000400>, /* ap 2 */ 864 <0x00001400 0x00001400 0x000400>, /* ap 3 */ 865 <0x00001800 0x00001800 0x000400>, /* ap 4 */ 866 <0x00001c00 0x00001c00 0x000400>, /* ap 5 */ 867 <0x00008000 0x00008000 0x001000>, /* ap 6 */ 868 <0x00009000 0x00009000 0x001000>, /* ap 7 */ 869 <0x00016000 0x00016000 0x001000>, /* ap 8 */ 870 <0x00017000 0x00017000 0x001000>, /* ap 9 */ 871 <0x00022000 0x00022000 0x001000>, /* ap 10 */ 872 <0x00023000 0x00023000 0x001000>, /* ap 11 */ 873 <0x00024000 0x00024000 0x001000>, /* ap 12 */ 874 <0x00025000 0x00025000 0x001000>, /* ap 13 */ 875 <0x0002a000 0x0002a000 0x001000>, /* ap 14 */ 876 <0x0002b000 0x0002b000 0x001000>, /* ap 15 */ 877 <0x00038000 0x00038000 0x002000>, /* ap 16 */ 878 <0x0003a000 0x0003a000 0x001000>, /* ap 17 */ 879 <0x00014000 0x00014000 0x001000>, /* ap 18 */ 880 <0x00015000 0x00015000 0x001000>, /* ap 19 */ 881 <0x0003c000 0x0003c000 0x002000>, /* ap 20 */ 882 <0x0003e000 0x0003e000 0x001000>, /* ap 21 */ 883 <0x00040000 0x00040000 0x001000>, /* ap 22 */ 884 <0x00041000 0x00041000 0x001000>, /* ap 23 */ 885 <0x00042000 0x00042000 0x001000>, /* ap 24 */ 886 <0x00043000 0x00043000 0x001000>, /* ap 25 */ 887 <0x00044000 0x00044000 0x001000>, /* ap 26 */ 888 <0x00045000 0x00045000 0x001000>, /* ap 27 */ 889 <0x00046000 0x00046000 0x001000>, /* ap 28 */ 890 <0x00047000 0x00047000 0x001000>, /* ap 29 */ 891 <0x00048000 0x00048000 0x001000>, /* ap 30 */ 892 <0x00049000 0x00049000 0x001000>, /* ap 31 */ 893 <0x0004c000 0x0004c000 0x001000>, /* ap 32 */ 894 <0x0004d000 0x0004d000 0x001000>, /* ap 33 */ 895 <0x00050000 0x00050000 0x002000>, /* ap 34 */ 896 <0x00052000 0x00052000 0x001000>, /* ap 35 */ 897 <0x00060000 0x00060000 0x001000>, /* ap 36 */ 898 <0x00061000 0x00061000 0x001000>, /* ap 37 */ 899 <0x00080000 0x00080000 0x010000>, /* ap 38 */ 900 <0x00090000 0x00090000 0x001000>, /* ap 39 */ 901 <0x000a0000 0x000a0000 0x010000>, /* ap 40 */ 902 <0x000b0000 0x000b0000 0x001000>, /* ap 41 */ 903 <0x00030000 0x00030000 0x001000>, /* ap 77 */ 904 <0x00031000 0x00031000 0x001000>, /* ap 78 */ 905 <0x0004a000 0x0004a000 0x001000>, /* ap 85 */ 906 <0x0004b000 0x0004b000 0x001000>, /* ap 86 */ 907 <0x000c8000 0x000c8000 0x001000>, /* ap 87 */ 908 <0x000c9000 0x000c9000 0x001000>, /* ap 88 */ 909 <0x000cc000 0x000cc000 0x001000>, /* ap 89 */ 910 <0x000cd000 0x000cd000 0x001000>, /* ap 90 */ 911 <0x000ca000 0x000ca000 0x001000>, /* ap 91 */ 912 <0x000cb000 0x000cb000 0x001000>, /* ap 92 */ 913 <0x46000000 0x46000000 0x400000>, /* l3 data port */ 914 <0x46400000 0x46400000 0x400000>; /* l3 data port */ 915 916 target-module@8000 { /* 0x48008000, ap 6 10.0 */ 917 compatible = "ti,sysc"; 918 status = "disabled"; 919 #address-cells = <1>; 920 #size-cells = <1>; 921 ranges = <0x0 0x8000 0x1000>; 922 }; 923 924 target-module@14000 { /* 0x48014000, ap 18 58.0 */ 925 compatible = "ti,sysc"; 926 status = "disabled"; 927 #address-cells = <1>; 928 #size-cells = <1>; 929 ranges = <0x0 0x14000 0x1000>; 930 }; 931 932 target-module@16000 { /* 0x48016000, ap 8 3c.0 */ 933 compatible = "ti,sysc"; 934 status = "disabled"; 935 #address-cells = <1>; 936 #size-cells = <1>; 937 ranges = <0x0 0x16000 0x1000>; 938 }; 939 940 target-module@22000 { /* 0x48022000, ap 10 12.0 */ 941 compatible = "ti,sysc-omap2", "ti,sysc"; 942 reg = <0x22050 0x4>, 943 <0x22054 0x4>, 944 <0x22058 0x4>; 945 reg-names = "rev", "sysc", "syss"; 946 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 947 SYSC_OMAP2_SOFTRESET | 948 SYSC_OMAP2_AUTOIDLE)>; 949 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 950 <SYSC_IDLE_NO>, 951 <SYSC_IDLE_SMART>, 952 <SYSC_IDLE_SMART_WKUP>; 953 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 954 clocks = <&l4ls_clkctrl AM3_L4LS_UART2_CLKCTRL 0>; 955 clock-names = "fck"; 956 #address-cells = <1>; 957 #size-cells = <1>; 958 ranges = <0x0 0x22000 0x1000>; 959 960 uart1: serial@0 { 961 compatible = "ti,am3352-uart", "ti,omap3-uart"; 962 clock-frequency = <48000000>; 963 reg = <0x0 0x1000>; 964 interrupts = <73>; 965 status = "disabled"; 966 dmas = <&edma 28 0>, <&edma 29 0>; 967 dma-names = "tx", "rx"; 968 }; 969 }; 970 971 target-module@24000 { /* 0x48024000, ap 12 14.0 */ 972 compatible = "ti,sysc-omap2", "ti,sysc"; 973 reg = <0x24050 0x4>, 974 <0x24054 0x4>, 975 <0x24058 0x4>; 976 reg-names = "rev", "sysc", "syss"; 977 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 978 SYSC_OMAP2_SOFTRESET | 979 SYSC_OMAP2_AUTOIDLE)>; 980 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 981 <SYSC_IDLE_NO>, 982 <SYSC_IDLE_SMART>, 983 <SYSC_IDLE_SMART_WKUP>; 984 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 985 clocks = <&l4ls_clkctrl AM3_L4LS_UART3_CLKCTRL 0>; 986 clock-names = "fck"; 987 #address-cells = <1>; 988 #size-cells = <1>; 989 ranges = <0x0 0x24000 0x1000>; 990 991 uart2: serial@0 { 992 compatible = "ti,am3352-uart", "ti,omap3-uart"; 993 clock-frequency = <48000000>; 994 reg = <0x0 0x1000>; 995 interrupts = <74>; 996 status = "disabled"; 997 dmas = <&edma 30 0>, <&edma 31 0>; 998 dma-names = "tx", "rx"; 999 }; 1000 }; 1001 1002 target-module@2a000 { /* 0x4802a000, ap 14 2a.0 */ 1003 compatible = "ti,sysc-omap2", "ti,sysc"; 1004 reg = <0x2a000 0x8>, 1005 <0x2a010 0x8>, 1006 <0x2a090 0x8>; 1007 reg-names = "rev", "sysc", "syss"; 1008 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1009 SYSC_OMAP2_ENAWAKEUP | 1010 SYSC_OMAP2_SOFTRESET | 1011 SYSC_OMAP2_AUTOIDLE)>; 1012 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1013 <SYSC_IDLE_NO>, 1014 <SYSC_IDLE_SMART>, 1015 <SYSC_IDLE_SMART_WKUP>; 1016 ti,syss-mask = <1>; 1017 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1018 clocks = <&l4ls_clkctrl AM3_L4LS_I2C2_CLKCTRL 0>; 1019 clock-names = "fck"; 1020 #address-cells = <1>; 1021 #size-cells = <1>; 1022 ranges = <0x0 0x2a000 0x1000>; 1023 1024 i2c1: i2c@0 { 1025 compatible = "ti,omap4-i2c"; 1026 #address-cells = <1>; 1027 #size-cells = <0>; 1028 reg = <0x0 0x1000>; 1029 interrupts = <71>; 1030 status = "disabled"; 1031 }; 1032 }; 1033 1034 target-module@30000 { /* 0x48030000, ap 77 08.0 */ 1035 compatible = "ti,sysc-omap2", "ti,sysc"; 1036 reg = <0x30000 0x4>, 1037 <0x30110 0x4>, 1038 <0x30114 0x4>; 1039 reg-names = "rev", "sysc", "syss"; 1040 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1041 SYSC_OMAP2_SOFTRESET | 1042 SYSC_OMAP2_AUTOIDLE)>; 1043 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1044 <SYSC_IDLE_NO>, 1045 <SYSC_IDLE_SMART>; 1046 ti,syss-mask = <1>; 1047 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1048 clocks = <&l4ls_clkctrl AM3_L4LS_SPI0_CLKCTRL 0>; 1049 clock-names = "fck"; 1050 #address-cells = <1>; 1051 #size-cells = <1>; 1052 ranges = <0x0 0x30000 0x1000>; 1053 1054 spi0: spi@0 { 1055 compatible = "ti,omap4-mcspi"; 1056 #address-cells = <1>; 1057 #size-cells = <0>; 1058 reg = <0x0 0x400>; 1059 interrupts = <65>; 1060 ti,spi-num-cs = <2>; 1061 dmas = <&edma 16 0 1062 &edma 17 0 1063 &edma 18 0 1064 &edma 19 0>; 1065 dma-names = "tx0", "rx0", "tx1", "rx1"; 1066 status = "disabled"; 1067 }; 1068 }; 1069 1070 target-module@38000 { /* 0x48038000, ap 16 02.0 */ 1071 compatible = "ti,sysc-omap4-simple", "ti,sysc"; 1072 reg = <0x38000 0x4>, 1073 <0x38004 0x4>; 1074 reg-names = "rev", "sysc"; 1075 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1076 <SYSC_IDLE_NO>, 1077 <SYSC_IDLE_SMART>; 1078 /* Domains (P, C): per_pwrdm, l3s_clkdm */ 1079 clocks = <&l3s_clkctrl AM3_L3S_MCASP0_CLKCTRL 0>; 1080 clock-names = "fck"; 1081 #address-cells = <1>; 1082 #size-cells = <1>; 1083 ranges = <0x0 0x38000 0x2000>, 1084 <0x46000000 0x46000000 0x400000>; 1085 1086 mcasp0: mcasp@0 { 1087 compatible = "ti,am33xx-mcasp-audio"; 1088 reg = <0x0 0x2000>, 1089 <0x46000000 0x400000>; 1090 reg-names = "mpu", "dat"; 1091 interrupts = <80>, <81>; 1092 interrupt-names = "tx", "rx"; 1093 status = "disabled"; 1094 dmas = <&edma 8 2>, 1095 <&edma 9 2>; 1096 dma-names = "tx", "rx"; 1097 }; 1098 }; 1099 1100 target-module@3c000 { /* 0x4803c000, ap 20 32.0 */ 1101 compatible = "ti,sysc-omap4-simple", "ti,sysc"; 1102 reg = <0x3c000 0x4>, 1103 <0x3c004 0x4>; 1104 reg-names = "rev", "sysc"; 1105 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1106 <SYSC_IDLE_NO>, 1107 <SYSC_IDLE_SMART>; 1108 /* Domains (P, C): per_pwrdm, l3s_clkdm */ 1109 clocks = <&l3s_clkctrl AM3_L3S_MCASP1_CLKCTRL 0>; 1110 clock-names = "fck"; 1111 #address-cells = <1>; 1112 #size-cells = <1>; 1113 ranges = <0x0 0x3c000 0x2000>, 1114 <0x46400000 0x46400000 0x400000>; 1115 1116 mcasp1: mcasp@0 { 1117 compatible = "ti,am33xx-mcasp-audio"; 1118 reg = <0x0 0x2000>, 1119 <0x46400000 0x400000>; 1120 reg-names = "mpu", "dat"; 1121 interrupts = <82>, <83>; 1122 interrupt-names = "tx", "rx"; 1123 status = "disabled"; 1124 dmas = <&edma 10 2>, 1125 <&edma 11 2>; 1126 dma-names = "tx", "rx"; 1127 }; 1128 }; 1129 1130 timer2_target: target-module@40000 { /* 0x48040000, ap 22 1e.0 */ 1131 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 1132 reg = <0x40000 0x4>, 1133 <0x40010 0x4>, 1134 <0x40014 0x4>; 1135 reg-names = "rev", "sysc", "syss"; 1136 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 1137 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1138 <SYSC_IDLE_NO>, 1139 <SYSC_IDLE_SMART>, 1140 <SYSC_IDLE_SMART_WKUP>; 1141 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1142 clocks = <&l4ls_clkctrl AM3_L4LS_TIMER2_CLKCTRL 0>; 1143 clock-names = "fck"; 1144 #address-cells = <1>; 1145 #size-cells = <1>; 1146 ranges = <0x0 0x40000 0x1000>; 1147 1148 timer2: timer@0 { 1149 compatible = "ti,am335x-timer"; 1150 reg = <0x0 0x400>; 1151 interrupts = <68>; 1152 clocks = <&timer2_fck>; 1153 clock-names = "fck"; 1154 }; 1155 }; 1156 1157 target-module@42000 { /* 0x48042000, ap 24 1c.0 */ 1158 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 1159 reg = <0x42000 0x4>, 1160 <0x42010 0x4>, 1161 <0x42014 0x4>; 1162 reg-names = "rev", "sysc", "syss"; 1163 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 1164 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1165 <SYSC_IDLE_NO>, 1166 <SYSC_IDLE_SMART>, 1167 <SYSC_IDLE_SMART_WKUP>; 1168 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1169 clocks = <&l4ls_clkctrl AM3_L4LS_TIMER3_CLKCTRL 0>; 1170 clock-names = "fck"; 1171 #address-cells = <1>; 1172 #size-cells = <1>; 1173 ranges = <0x0 0x42000 0x1000>; 1174 1175 timer3: timer@0 { 1176 compatible = "ti,am335x-timer"; 1177 reg = <0x0 0x400>; 1178 interrupts = <69>; 1179 }; 1180 }; 1181 1182 target-module@44000 { /* 0x48044000, ap 26 26.0 */ 1183 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 1184 reg = <0x44000 0x4>, 1185 <0x44010 0x4>, 1186 <0x44014 0x4>; 1187 reg-names = "rev", "sysc", "syss"; 1188 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 1189 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1190 <SYSC_IDLE_NO>, 1191 <SYSC_IDLE_SMART>, 1192 <SYSC_IDLE_SMART_WKUP>; 1193 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1194 clocks = <&l4ls_clkctrl AM3_L4LS_TIMER4_CLKCTRL 0>; 1195 clock-names = "fck"; 1196 #address-cells = <1>; 1197 #size-cells = <1>; 1198 ranges = <0x0 0x44000 0x1000>; 1199 1200 timer4: timer@0 { 1201 compatible = "ti,am335x-timer"; 1202 reg = <0x0 0x400>; 1203 interrupts = <92>; 1204 ti,timer-pwm; 1205 }; 1206 }; 1207 1208 target-module@46000 { /* 0x48046000, ap 28 28.0 */ 1209 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 1210 reg = <0x46000 0x4>, 1211 <0x46010 0x4>, 1212 <0x46014 0x4>; 1213 reg-names = "rev", "sysc", "syss"; 1214 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 1215 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1216 <SYSC_IDLE_NO>, 1217 <SYSC_IDLE_SMART>, 1218 <SYSC_IDLE_SMART_WKUP>; 1219 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1220 clocks = <&l4ls_clkctrl AM3_L4LS_TIMER5_CLKCTRL 0>; 1221 clock-names = "fck"; 1222 #address-cells = <1>; 1223 #size-cells = <1>; 1224 ranges = <0x0 0x46000 0x1000>; 1225 1226 timer5: timer@0 { 1227 compatible = "ti,am335x-timer"; 1228 reg = <0x0 0x400>; 1229 interrupts = <93>; 1230 ti,timer-pwm; 1231 }; 1232 }; 1233 1234 target-module@48000 { /* 0x48048000, ap 30 22.0 */ 1235 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 1236 reg = <0x48000 0x4>, 1237 <0x48010 0x4>, 1238 <0x48014 0x4>; 1239 reg-names = "rev", "sysc", "syss"; 1240 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 1241 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1242 <SYSC_IDLE_NO>, 1243 <SYSC_IDLE_SMART>, 1244 <SYSC_IDLE_SMART_WKUP>; 1245 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1246 clocks = <&l4ls_clkctrl AM3_L4LS_TIMER6_CLKCTRL 0>; 1247 clock-names = "fck"; 1248 #address-cells = <1>; 1249 #size-cells = <1>; 1250 ranges = <0x0 0x48000 0x1000>; 1251 1252 timer6: timer@0 { 1253 compatible = "ti,am335x-timer"; 1254 reg = <0x0 0x400>; 1255 interrupts = <94>; 1256 ti,timer-pwm; 1257 }; 1258 }; 1259 1260 target-module@4a000 { /* 0x4804a000, ap 85 60.0 */ 1261 compatible = "ti,sysc-omap4-timer", "ti,sysc"; 1262 reg = <0x4a000 0x4>, 1263 <0x4a010 0x4>, 1264 <0x4a014 0x4>; 1265 reg-names = "rev", "sysc", "syss"; 1266 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 1267 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1268 <SYSC_IDLE_NO>, 1269 <SYSC_IDLE_SMART>, 1270 <SYSC_IDLE_SMART_WKUP>; 1271 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1272 clocks = <&l4ls_clkctrl AM3_L4LS_TIMER7_CLKCTRL 0>; 1273 clock-names = "fck"; 1274 #address-cells = <1>; 1275 #size-cells = <1>; 1276 ranges = <0x0 0x4a000 0x1000>; 1277 1278 timer7: timer@0 { 1279 compatible = "ti,am335x-timer"; 1280 reg = <0x0 0x400>; 1281 interrupts = <95>; 1282 ti,timer-pwm; 1283 }; 1284 }; 1285 1286 target-module@4c000 { /* 0x4804c000, ap 32 36.0 */ 1287 compatible = "ti,sysc-omap2", "ti,sysc"; 1288 reg = <0x4c000 0x4>, 1289 <0x4c010 0x4>, 1290 <0x4c114 0x4>; 1291 reg-names = "rev", "sysc", "syss"; 1292 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1293 SYSC_OMAP2_SOFTRESET | 1294 SYSC_OMAP2_AUTOIDLE)>; 1295 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1296 <SYSC_IDLE_NO>, 1297 <SYSC_IDLE_SMART>, 1298 <SYSC_IDLE_SMART_WKUP>; 1299 ti,syss-mask = <1>; 1300 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1301 clocks = <&l4ls_clkctrl AM3_L4LS_GPIO2_CLKCTRL 0>, 1302 <&l4ls_clkctrl AM3_L4LS_GPIO2_CLKCTRL 18>; 1303 clock-names = "fck", "dbclk"; 1304 #address-cells = <1>; 1305 #size-cells = <1>; 1306 ranges = <0x0 0x4c000 0x1000>; 1307 1308 gpio1: gpio@0 { 1309 compatible = "ti,omap4-gpio"; 1310 gpio-ranges = <&am33xx_pinmux 0 0 8>, 1311 <&am33xx_pinmux 8 90 4>, 1312 <&am33xx_pinmux 12 12 16>, 1313 <&am33xx_pinmux 28 30 4>; 1314 gpio-controller; 1315 #gpio-cells = <2>; 1316 interrupt-controller; 1317 #interrupt-cells = <2>; 1318 reg = <0x0 0x1000>; 1319 interrupts = <98>; 1320 }; 1321 }; 1322 1323 target-module@50000 { /* 0x48050000, ap 34 2c.0 */ 1324 compatible = "ti,sysc"; 1325 status = "disabled"; 1326 #address-cells = <1>; 1327 #size-cells = <1>; 1328 ranges = <0x0 0x50000 0x2000>; 1329 }; 1330 1331 target-module@60000 { /* 0x48060000, ap 36 0c.0 */ 1332 compatible = "ti,sysc-omap2", "ti,sysc"; 1333 reg = <0x602fc 0x4>, 1334 <0x60110 0x4>, 1335 <0x60114 0x4>; 1336 reg-names = "rev", "sysc", "syss"; 1337 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1338 SYSC_OMAP2_ENAWAKEUP | 1339 SYSC_OMAP2_SOFTRESET | 1340 SYSC_OMAP2_AUTOIDLE)>; 1341 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1342 <SYSC_IDLE_NO>, 1343 <SYSC_IDLE_SMART>; 1344 ti,syss-mask = <1>; 1345 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1346 clocks = <&l4ls_clkctrl AM3_L4LS_MMC1_CLKCTRL 0>; 1347 clock-names = "fck"; 1348 #address-cells = <1>; 1349 #size-cells = <1>; 1350 ranges = <0x0 0x60000 0x1000>; 1351 1352 mmc1: mmc@0 { 1353 compatible = "ti,am335-sdhci"; 1354 ti,needs-special-reset; 1355 dmas = <&edma_xbar 24 0 0 1356 &edma_xbar 25 0 0>; 1357 dma-names = "tx", "rx"; 1358 interrupts = <64>; 1359 reg = <0x0 0x1000>; 1360 status = "disabled"; 1361 }; 1362 }; 1363 1364 target-module@80000 { /* 0x48080000, ap 38 18.0 */ 1365 compatible = "ti,sysc-omap2", "ti,sysc"; 1366 reg = <0x80000 0x4>, 1367 <0x80010 0x4>, 1368 <0x80014 0x4>; 1369 reg-names = "rev", "sysc", "syss"; 1370 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1371 SYSC_OMAP2_SOFTRESET | 1372 SYSC_OMAP2_AUTOIDLE)>; 1373 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1374 <SYSC_IDLE_NO>, 1375 <SYSC_IDLE_SMART>; 1376 ti,syss-mask = <1>; 1377 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1378 clocks = <&l4ls_clkctrl AM3_L4LS_ELM_CLKCTRL 0>; 1379 clock-names = "fck"; 1380 #address-cells = <1>; 1381 #size-cells = <1>; 1382 ranges = <0x0 0x80000 0x10000>; 1383 1384 elm: elm@0 { 1385 compatible = "ti,am3352-elm"; 1386 reg = <0x0 0x2000>; 1387 interrupts = <4>; 1388 status = "disabled"; 1389 }; 1390 }; 1391 1392 target-module@a0000 { /* 0x480a0000, ap 40 5e.0 */ 1393 compatible = "ti,sysc"; 1394 status = "disabled"; 1395 #address-cells = <1>; 1396 #size-cells = <1>; 1397 ranges = <0x0 0xa0000 0x10000>; 1398 }; 1399 1400 target-module@c8000 { /* 0x480c8000, ap 87 06.0 */ 1401 compatible = "ti,sysc-omap4", "ti,sysc"; 1402 reg = <0xc8000 0x4>, 1403 <0xc8010 0x4>; 1404 reg-names = "rev", "sysc"; 1405 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>; 1406 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1407 <SYSC_IDLE_NO>, 1408 <SYSC_IDLE_SMART>; 1409 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1410 clocks = <&l4ls_clkctrl AM3_L4LS_MAILBOX_CLKCTRL 0>; 1411 clock-names = "fck"; 1412 #address-cells = <1>; 1413 #size-cells = <1>; 1414 ranges = <0x0 0xc8000 0x1000>; 1415 1416 mailbox: mailbox@0 { 1417 compatible = "ti,omap4-mailbox"; 1418 reg = <0x0 0x200>; 1419 interrupts = <77>; 1420 #mbox-cells = <1>; 1421 ti,mbox-num-users = <4>; 1422 ti,mbox-num-fifos = <8>; 1423 mbox_wkupm3: wkup_m3 { 1424 ti,mbox-send-noirq; 1425 ti,mbox-tx = <0 0 0>; 1426 ti,mbox-rx = <0 0 3>; 1427 }; 1428 }; 1429 }; 1430 1431 target-module@ca000 { /* 0x480ca000, ap 91 40.0 */ 1432 compatible = "ti,sysc-omap2", "ti,sysc"; 1433 reg = <0xca000 0x4>, 1434 <0xca010 0x4>, 1435 <0xca014 0x4>; 1436 reg-names = "rev", "sysc", "syss"; 1437 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1438 SYSC_OMAP2_ENAWAKEUP | 1439 SYSC_OMAP2_SOFTRESET | 1440 SYSC_OMAP2_AUTOIDLE)>; 1441 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1442 <SYSC_IDLE_NO>, 1443 <SYSC_IDLE_SMART>; 1444 ti,syss-mask = <1>; 1445 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1446 clocks = <&l4ls_clkctrl AM3_L4LS_SPINLOCK_CLKCTRL 0>; 1447 clock-names = "fck"; 1448 #address-cells = <1>; 1449 #size-cells = <1>; 1450 ranges = <0x0 0xca000 0x1000>; 1451 1452 hwspinlock: spinlock@0 { 1453 compatible = "ti,omap4-hwspinlock"; 1454 reg = <0x0 0x1000>; 1455 #hwlock-cells = <1>; 1456 }; 1457 }; 1458 1459 target-module@cc000 { /* 0x480cc000, ap 89 0e.0 */ 1460 compatible = "ti,sysc"; 1461 status = "disabled"; 1462 #address-cells = <1>; 1463 #size-cells = <1>; 1464 ranges = <0x0 0xcc000 0x1000>; 1465 }; 1466 }; 1467 1468 segment@100000 { /* 0x48100000 */ 1469 compatible = "simple-bus"; 1470 #address-cells = <1>; 1471 #size-cells = <1>; 1472 ranges = <0x0008c000 0x0018c000 0x001000>, /* ap 42 */ 1473 <0x0008d000 0x0018d000 0x001000>, /* ap 43 */ 1474 <0x0008e000 0x0018e000 0x001000>, /* ap 44 */ 1475 <0x0008f000 0x0018f000 0x001000>, /* ap 45 */ 1476 <0x0009c000 0x0019c000 0x001000>, /* ap 46 */ 1477 <0x0009d000 0x0019d000 0x001000>, /* ap 47 */ 1478 <0x000a6000 0x001a6000 0x001000>, /* ap 48 */ 1479 <0x000a7000 0x001a7000 0x001000>, /* ap 49 */ 1480 <0x000a8000 0x001a8000 0x001000>, /* ap 50 */ 1481 <0x000a9000 0x001a9000 0x001000>, /* ap 51 */ 1482 <0x000aa000 0x001aa000 0x001000>, /* ap 52 */ 1483 <0x000ab000 0x001ab000 0x001000>, /* ap 53 */ 1484 <0x000ac000 0x001ac000 0x001000>, /* ap 54 */ 1485 <0x000ad000 0x001ad000 0x001000>, /* ap 55 */ 1486 <0x000ae000 0x001ae000 0x001000>, /* ap 56 */ 1487 <0x000af000 0x001af000 0x001000>, /* ap 57 */ 1488 <0x000b0000 0x001b0000 0x010000>, /* ap 58 */ 1489 <0x000c0000 0x001c0000 0x001000>, /* ap 59 */ 1490 <0x000cc000 0x001cc000 0x002000>, /* ap 60 */ 1491 <0x000ce000 0x001ce000 0x002000>, /* ap 61 */ 1492 <0x000d0000 0x001d0000 0x002000>, /* ap 62 */ 1493 <0x000d2000 0x001d2000 0x002000>, /* ap 63 */ 1494 <0x000d8000 0x001d8000 0x001000>, /* ap 64 */ 1495 <0x000d9000 0x001d9000 0x001000>, /* ap 65 */ 1496 <0x000a0000 0x001a0000 0x001000>, /* ap 79 */ 1497 <0x000a1000 0x001a1000 0x001000>, /* ap 80 */ 1498 <0x000a2000 0x001a2000 0x001000>, /* ap 81 */ 1499 <0x000a3000 0x001a3000 0x001000>, /* ap 82 */ 1500 <0x000a4000 0x001a4000 0x001000>, /* ap 83 */ 1501 <0x000a5000 0x001a5000 0x001000>; /* ap 84 */ 1502 1503 target-module@8c000 { /* 0x4818c000, ap 42 04.0 */ 1504 compatible = "ti,sysc"; 1505 status = "disabled"; 1506 #address-cells = <1>; 1507 #size-cells = <1>; 1508 ranges = <0x0 0x8c000 0x1000>; 1509 }; 1510 1511 target-module@8e000 { /* 0x4818e000, ap 44 0a.0 */ 1512 compatible = "ti,sysc"; 1513 status = "disabled"; 1514 #address-cells = <1>; 1515 #size-cells = <1>; 1516 ranges = <0x0 0x8e000 0x1000>; 1517 }; 1518 1519 target-module@9c000 { /* 0x4819c000, ap 46 5a.0 */ 1520 compatible = "ti,sysc-omap2", "ti,sysc"; 1521 reg = <0x9c000 0x8>, 1522 <0x9c010 0x8>, 1523 <0x9c090 0x8>; 1524 reg-names = "rev", "sysc", "syss"; 1525 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1526 SYSC_OMAP2_ENAWAKEUP | 1527 SYSC_OMAP2_SOFTRESET | 1528 SYSC_OMAP2_AUTOIDLE)>; 1529 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1530 <SYSC_IDLE_NO>, 1531 <SYSC_IDLE_SMART>, 1532 <SYSC_IDLE_SMART_WKUP>; 1533 ti,syss-mask = <1>; 1534 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1535 clocks = <&l4ls_clkctrl AM3_L4LS_I2C3_CLKCTRL 0>; 1536 clock-names = "fck"; 1537 #address-cells = <1>; 1538 #size-cells = <1>; 1539 ranges = <0x0 0x9c000 0x1000>; 1540 1541 i2c2: i2c@0 { 1542 compatible = "ti,omap4-i2c"; 1543 #address-cells = <1>; 1544 #size-cells = <0>; 1545 reg = <0x0 0x1000>; 1546 interrupts = <30>; 1547 status = "disabled"; 1548 }; 1549 }; 1550 1551 target-module@a0000 { /* 0x481a0000, ap 79 24.0 */ 1552 compatible = "ti,sysc-omap2", "ti,sysc"; 1553 reg = <0xa0000 0x4>, 1554 <0xa0110 0x4>, 1555 <0xa0114 0x4>; 1556 reg-names = "rev", "sysc", "syss"; 1557 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1558 SYSC_OMAP2_SOFTRESET | 1559 SYSC_OMAP2_AUTOIDLE)>; 1560 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1561 <SYSC_IDLE_NO>, 1562 <SYSC_IDLE_SMART>; 1563 ti,syss-mask = <1>; 1564 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1565 clocks = <&l4ls_clkctrl AM3_L4LS_SPI1_CLKCTRL 0>; 1566 clock-names = "fck"; 1567 #address-cells = <1>; 1568 #size-cells = <1>; 1569 ranges = <0x0 0xa0000 0x1000>; 1570 1571 spi1: spi@0 { 1572 compatible = "ti,omap4-mcspi"; 1573 #address-cells = <1>; 1574 #size-cells = <0>; 1575 reg = <0x0 0x400>; 1576 interrupts = <125>; 1577 ti,spi-num-cs = <2>; 1578 dmas = <&edma 42 0 1579 &edma 43 0 1580 &edma 44 0 1581 &edma 45 0>; 1582 dma-names = "tx0", "rx0", "tx1", "rx1"; 1583 status = "disabled"; 1584 }; 1585 }; 1586 1587 target-module@a2000 { /* 0x481a2000, ap 81 2e.0 */ 1588 compatible = "ti,sysc"; 1589 status = "disabled"; 1590 #address-cells = <1>; 1591 #size-cells = <1>; 1592 ranges = <0x0 0xa2000 0x1000>; 1593 }; 1594 1595 target-module@a4000 { /* 0x481a4000, ap 83 30.0 */ 1596 compatible = "ti,sysc"; 1597 status = "disabled"; 1598 #address-cells = <1>; 1599 #size-cells = <1>; 1600 ranges = <0x0 0xa4000 0x1000>; 1601 }; 1602 1603 target-module@a6000 { /* 0x481a6000, ap 48 16.0 */ 1604 compatible = "ti,sysc-omap2", "ti,sysc"; 1605 reg = <0xa6050 0x4>, 1606 <0xa6054 0x4>, 1607 <0xa6058 0x4>; 1608 reg-names = "rev", "sysc", "syss"; 1609 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1610 SYSC_OMAP2_SOFTRESET | 1611 SYSC_OMAP2_AUTOIDLE)>; 1612 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1613 <SYSC_IDLE_NO>, 1614 <SYSC_IDLE_SMART>, 1615 <SYSC_IDLE_SMART_WKUP>; 1616 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1617 clocks = <&l4ls_clkctrl AM3_L4LS_UART4_CLKCTRL 0>; 1618 clock-names = "fck"; 1619 #address-cells = <1>; 1620 #size-cells = <1>; 1621 ranges = <0x0 0xa6000 0x1000>; 1622 1623 uart3: serial@0 { 1624 compatible = "ti,am3352-uart", "ti,omap3-uart"; 1625 clock-frequency = <48000000>; 1626 reg = <0x0 0x1000>; 1627 interrupts = <44>; 1628 status = "disabled"; 1629 }; 1630 }; 1631 1632 target-module@a8000 { /* 0x481a8000, ap 50 20.0 */ 1633 compatible = "ti,sysc-omap2", "ti,sysc"; 1634 reg = <0xa8050 0x4>, 1635 <0xa8054 0x4>, 1636 <0xa8058 0x4>; 1637 reg-names = "rev", "sysc", "syss"; 1638 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1639 SYSC_OMAP2_SOFTRESET | 1640 SYSC_OMAP2_AUTOIDLE)>; 1641 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1642 <SYSC_IDLE_NO>, 1643 <SYSC_IDLE_SMART>, 1644 <SYSC_IDLE_SMART_WKUP>; 1645 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1646 clocks = <&l4ls_clkctrl AM3_L4LS_UART5_CLKCTRL 0>; 1647 clock-names = "fck"; 1648 #address-cells = <1>; 1649 #size-cells = <1>; 1650 ranges = <0x0 0xa8000 0x1000>; 1651 1652 uart4: serial@0 { 1653 compatible = "ti,am3352-uart", "ti,omap3-uart"; 1654 clock-frequency = <48000000>; 1655 reg = <0x0 0x1000>; 1656 interrupts = <45>; 1657 status = "disabled"; 1658 }; 1659 }; 1660 1661 target-module@aa000 { /* 0x481aa000, ap 52 1a.0 */ 1662 compatible = "ti,sysc-omap2", "ti,sysc"; 1663 reg = <0xaa050 0x4>, 1664 <0xaa054 0x4>, 1665 <0xaa058 0x4>; 1666 reg-names = "rev", "sysc", "syss"; 1667 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1668 SYSC_OMAP2_SOFTRESET | 1669 SYSC_OMAP2_AUTOIDLE)>; 1670 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1671 <SYSC_IDLE_NO>, 1672 <SYSC_IDLE_SMART>, 1673 <SYSC_IDLE_SMART_WKUP>; 1674 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1675 clocks = <&l4ls_clkctrl AM3_L4LS_UART6_CLKCTRL 0>; 1676 clock-names = "fck"; 1677 #address-cells = <1>; 1678 #size-cells = <1>; 1679 ranges = <0x0 0xaa000 0x1000>; 1680 1681 uart5: serial@0 { 1682 compatible = "ti,am3352-uart", "ti,omap3-uart"; 1683 clock-frequency = <48000000>; 1684 reg = <0x0 0x1000>; 1685 interrupts = <46>; 1686 status = "disabled"; 1687 }; 1688 }; 1689 1690 target-module@ac000 { /* 0x481ac000, ap 54 38.0 */ 1691 compatible = "ti,sysc-omap2", "ti,sysc"; 1692 reg = <0xac000 0x4>, 1693 <0xac010 0x4>, 1694 <0xac114 0x4>; 1695 reg-names = "rev", "sysc", "syss"; 1696 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1697 SYSC_OMAP2_SOFTRESET | 1698 SYSC_OMAP2_AUTOIDLE)>; 1699 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1700 <SYSC_IDLE_NO>, 1701 <SYSC_IDLE_SMART>, 1702 <SYSC_IDLE_SMART_WKUP>; 1703 ti,syss-mask = <1>; 1704 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1705 clocks = <&l4ls_clkctrl AM3_L4LS_GPIO3_CLKCTRL 0>, 1706 <&l4ls_clkctrl AM3_L4LS_GPIO3_CLKCTRL 18>; 1707 clock-names = "fck", "dbclk"; 1708 #address-cells = <1>; 1709 #size-cells = <1>; 1710 ranges = <0x0 0xac000 0x1000>; 1711 1712 gpio2: gpio@0 { 1713 compatible = "ti,omap4-gpio"; 1714 gpio-ranges = <&am33xx_pinmux 0 34 18>, 1715 <&am33xx_pinmux 18 77 4>, 1716 <&am33xx_pinmux 22 56 10>; 1717 gpio-controller; 1718 #gpio-cells = <2>; 1719 interrupt-controller; 1720 #interrupt-cells = <2>; 1721 reg = <0x0 0x1000>; 1722 interrupts = <32>; 1723 }; 1724 }; 1725 1726 gpio3_target: target-module@ae000 { /* 0x481ae000, ap 56 3a.0 */ 1727 compatible = "ti,sysc-omap2", "ti,sysc"; 1728 reg = <0xae000 0x4>, 1729 <0xae010 0x4>, 1730 <0xae114 0x4>; 1731 reg-names = "rev", "sysc", "syss"; 1732 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 1733 SYSC_OMAP2_SOFTRESET | 1734 SYSC_OMAP2_AUTOIDLE)>; 1735 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1736 <SYSC_IDLE_NO>, 1737 <SYSC_IDLE_SMART>, 1738 <SYSC_IDLE_SMART_WKUP>; 1739 ti,syss-mask = <1>; 1740 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1741 clocks = <&l4ls_clkctrl AM3_L4LS_GPIO4_CLKCTRL 0>, 1742 <&l4ls_clkctrl AM3_L4LS_GPIO4_CLKCTRL 18>; 1743 clock-names = "fck", "dbclk"; 1744 #address-cells = <1>; 1745 #size-cells = <1>; 1746 ranges = <0x0 0xae000 0x1000>; 1747 1748 gpio3: gpio@0 { 1749 compatible = "ti,omap4-gpio"; 1750 gpio-ranges = <&am33xx_pinmux 0 66 5>, 1751 <&am33xx_pinmux 5 98 2>, 1752 <&am33xx_pinmux 7 75 2>, 1753 <&am33xx_pinmux 13 141 1>, 1754 <&am33xx_pinmux 14 100 8>; 1755 gpio-controller; 1756 #gpio-cells = <2>; 1757 interrupt-controller; 1758 #interrupt-cells = <2>; 1759 reg = <0x0 0x1000>; 1760 interrupts = <62>; 1761 }; 1762 }; 1763 1764 target-module@b0000 { /* 0x481b0000, ap 58 50.0 */ 1765 compatible = "ti,sysc"; 1766 status = "disabled"; 1767 #address-cells = <1>; 1768 #size-cells = <1>; 1769 ranges = <0x0 0xb0000 0x10000>; 1770 }; 1771 1772 target-module@cc000 { /* 0x481cc000, ap 60 46.0 */ 1773 compatible = "ti,sysc-omap4", "ti,sysc"; 1774 reg = <0xcc020 0x4>; 1775 reg-names = "rev"; 1776 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1777 clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN0_CLKCTRL 0>, 1778 <&dcan0_fck>; 1779 clock-names = "fck", "osc"; 1780 #address-cells = <1>; 1781 #size-cells = <1>; 1782 ranges = <0x0 0xcc000 0x2000>; 1783 1784 dcan0: can@0 { 1785 compatible = "ti,am3352-d_can"; 1786 reg = <0x0 0x2000>; 1787 clocks = <&dcan0_fck>; 1788 clock-names = "fck"; 1789 syscon-raminit = <&scm_conf 0x644 0>; 1790 interrupts = <52>; 1791 status = "disabled"; 1792 }; 1793 }; 1794 1795 target-module@d0000 { /* 0x481d0000, ap 62 42.0 */ 1796 compatible = "ti,sysc-omap4", "ti,sysc"; 1797 reg = <0xd0020 0x4>; 1798 reg-names = "rev"; 1799 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1800 clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN1_CLKCTRL 0>, 1801 <&dcan1_fck>; 1802 clock-names = "fck", "osc"; 1803 #address-cells = <1>; 1804 #size-cells = <1>; 1805 ranges = <0x0 0xd0000 0x2000>; 1806 1807 dcan1: can@0 { 1808 compatible = "ti,am3352-d_can"; 1809 reg = <0x0 0x2000>; 1810 clocks = <&dcan1_fck>; 1811 clock-names = "fck"; 1812 syscon-raminit = <&scm_conf 0x644 1>; 1813 interrupts = <55>; 1814 status = "disabled"; 1815 }; 1816 }; 1817 1818 target-module@d8000 { /* 0x481d8000, ap 64 66.0 */ 1819 compatible = "ti,sysc-omap2", "ti,sysc"; 1820 reg = <0xd82fc 0x4>, 1821 <0xd8110 0x4>, 1822 <0xd8114 0x4>; 1823 reg-names = "rev", "sysc", "syss"; 1824 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 1825 SYSC_OMAP2_ENAWAKEUP | 1826 SYSC_OMAP2_SOFTRESET | 1827 SYSC_OMAP2_AUTOIDLE)>; 1828 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1829 <SYSC_IDLE_NO>, 1830 <SYSC_IDLE_SMART>; 1831 ti,syss-mask = <1>; 1832 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1833 clocks = <&l4ls_clkctrl AM3_L4LS_MMC2_CLKCTRL 0>; 1834 clock-names = "fck"; 1835 #address-cells = <1>; 1836 #size-cells = <1>; 1837 ranges = <0x0 0xd8000 0x1000>; 1838 1839 mmc2: mmc@0 { 1840 compatible = "ti,am335-sdhci"; 1841 ti,needs-special-reset; 1842 dmas = <&edma 2 0 1843 &edma 3 0>; 1844 dma-names = "tx", "rx"; 1845 interrupts = <28>; 1846 reg = <0x0 0x1000>; 1847 status = "disabled"; 1848 }; 1849 }; 1850 }; 1851 1852 segment@200000 { /* 0x48200000 */ 1853 compatible = "simple-bus"; 1854 #address-cells = <1>; 1855 #size-cells = <1>; 1856 }; 1857 1858 segment@300000 { /* 0x48300000 */ 1859 compatible = "simple-bus"; 1860 #address-cells = <1>; 1861 #size-cells = <1>; 1862 ranges = <0x00000000 0x00300000 0x001000>, /* ap 66 */ 1863 <0x00001000 0x00301000 0x001000>, /* ap 67 */ 1864 <0x00002000 0x00302000 0x001000>, /* ap 68 */ 1865 <0x00003000 0x00303000 0x001000>, /* ap 69 */ 1866 <0x00004000 0x00304000 0x001000>, /* ap 70 */ 1867 <0x00005000 0x00305000 0x001000>, /* ap 71 */ 1868 <0x0000e000 0x0030e000 0x001000>, /* ap 72 */ 1869 <0x0000f000 0x0030f000 0x001000>, /* ap 73 */ 1870 <0x00018000 0x00318000 0x004000>, /* ap 74 */ 1871 <0x0001c000 0x0031c000 0x001000>, /* ap 75 */ 1872 <0x00010000 0x00310000 0x002000>, /* ap 76 */ 1873 <0x00012000 0x00312000 0x001000>, /* ap 93 */ 1874 <0x00015000 0x00315000 0x001000>, /* ap 94 */ 1875 <0x00016000 0x00316000 0x001000>, /* ap 95 */ 1876 <0x00017000 0x00317000 0x001000>, /* ap 96 */ 1877 <0x00013000 0x00313000 0x001000>, /* ap 97 */ 1878 <0x00014000 0x00314000 0x001000>, /* ap 98 */ 1879 <0x00020000 0x00320000 0x001000>, /* ap 99 */ 1880 <0x00021000 0x00321000 0x001000>, /* ap 100 */ 1881 <0x00022000 0x00322000 0x001000>, /* ap 101 */ 1882 <0x00023000 0x00323000 0x001000>, /* ap 102 */ 1883 <0x00024000 0x00324000 0x001000>, /* ap 103 */ 1884 <0x00025000 0x00325000 0x001000>; /* ap 104 */ 1885 1886 target-module@0 { /* 0x48300000, ap 66 48.0 */ 1887 compatible = "ti,sysc-omap4", "ti,sysc"; 1888 reg = <0x0 0x4>, 1889 <0x4 0x4>; 1890 reg-names = "rev", "sysc"; 1891 ti,sysc-midle = <SYSC_IDLE_FORCE>, 1892 <SYSC_IDLE_NO>, 1893 <SYSC_IDLE_SMART>, 1894 <SYSC_IDLE_SMART_WKUP>; 1895 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1896 <SYSC_IDLE_NO>, 1897 <SYSC_IDLE_SMART>, 1898 <SYSC_IDLE_SMART_WKUP>; 1899 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1900 clocks = <&l4ls_clkctrl AM3_L4LS_EPWMSS0_CLKCTRL 0>; 1901 clock-names = "fck"; 1902 #address-cells = <1>; 1903 #size-cells = <1>; 1904 ranges = <0x0 0x0 0x1000>; 1905 1906 epwmss0: epwmss@0 { 1907 compatible = "ti,am33xx-pwmss"; 1908 reg = <0x0 0x10>; 1909 #address-cells = <1>; 1910 #size-cells = <1>; 1911 status = "disabled"; 1912 ranges = <0 0 0x1000>; 1913 1914 ecap0: ecap@100 { 1915 compatible = "ti,am3352-ecap", 1916 "ti,am33xx-ecap"; 1917 #pwm-cells = <3>; 1918 reg = <0x100 0x80>; 1919 clocks = <&l4ls_gclk>; 1920 clock-names = "fck"; 1921 interrupts = <31>; 1922 interrupt-names = "ecap0"; 1923 status = "disabled"; 1924 }; 1925 1926 ehrpwm0: pwm@200 { 1927 compatible = "ti,am3352-ehrpwm", 1928 "ti,am33xx-ehrpwm"; 1929 #pwm-cells = <3>; 1930 reg = <0x200 0x80>; 1931 clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>; 1932 clock-names = "tbclk", "fck"; 1933 status = "disabled"; 1934 }; 1935 }; 1936 }; 1937 1938 target-module@2000 { /* 0x48302000, ap 68 52.0 */ 1939 compatible = "ti,sysc-omap4", "ti,sysc"; 1940 reg = <0x2000 0x4>, 1941 <0x2004 0x4>; 1942 reg-names = "rev", "sysc"; 1943 ti,sysc-midle = <SYSC_IDLE_FORCE>, 1944 <SYSC_IDLE_NO>, 1945 <SYSC_IDLE_SMART>, 1946 <SYSC_IDLE_SMART_WKUP>; 1947 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 1948 <SYSC_IDLE_NO>, 1949 <SYSC_IDLE_SMART>, 1950 <SYSC_IDLE_SMART_WKUP>; 1951 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1952 clocks = <&l4ls_clkctrl AM3_L4LS_EPWMSS1_CLKCTRL 0>; 1953 clock-names = "fck"; 1954 #address-cells = <1>; 1955 #size-cells = <1>; 1956 ranges = <0x0 0x2000 0x1000>; 1957 1958 epwmss1: epwmss@0 { 1959 compatible = "ti,am33xx-pwmss"; 1960 reg = <0x0 0x10>; 1961 #address-cells = <1>; 1962 #size-cells = <1>; 1963 status = "disabled"; 1964 ranges = <0 0 0x1000>; 1965 1966 ecap1: ecap@100 { 1967 compatible = "ti,am3352-ecap", 1968 "ti,am33xx-ecap"; 1969 #pwm-cells = <3>; 1970 reg = <0x100 0x80>; 1971 clocks = <&l4ls_gclk>; 1972 clock-names = "fck"; 1973 interrupts = <47>; 1974 interrupt-names = "ecap1"; 1975 status = "disabled"; 1976 }; 1977 1978 ehrpwm1: pwm@200 { 1979 compatible = "ti,am3352-ehrpwm", 1980 "ti,am33xx-ehrpwm"; 1981 #pwm-cells = <3>; 1982 reg = <0x200 0x80>; 1983 clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>; 1984 clock-names = "tbclk", "fck"; 1985 status = "disabled"; 1986 }; 1987 }; 1988 }; 1989 1990 target-module@4000 { /* 0x48304000, ap 70 44.0 */ 1991 compatible = "ti,sysc-omap4", "ti,sysc"; 1992 reg = <0x4000 0x4>, 1993 <0x4004 0x4>; 1994 reg-names = "rev", "sysc"; 1995 ti,sysc-midle = <SYSC_IDLE_FORCE>, 1996 <SYSC_IDLE_NO>, 1997 <SYSC_IDLE_SMART>, 1998 <SYSC_IDLE_SMART_WKUP>; 1999 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2000 <SYSC_IDLE_NO>, 2001 <SYSC_IDLE_SMART>, 2002 <SYSC_IDLE_SMART_WKUP>; 2003 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2004 clocks = <&l4ls_clkctrl AM3_L4LS_EPWMSS2_CLKCTRL 0>; 2005 clock-names = "fck"; 2006 #address-cells = <1>; 2007 #size-cells = <1>; 2008 ranges = <0x0 0x4000 0x1000>; 2009 2010 epwmss2: epwmss@0 { 2011 compatible = "ti,am33xx-pwmss"; 2012 reg = <0x0 0x10>; 2013 #address-cells = <1>; 2014 #size-cells = <1>; 2015 status = "disabled"; 2016 ranges = <0 0 0x1000>; 2017 2018 ecap2: ecap@100 { 2019 compatible = "ti,am3352-ecap", 2020 "ti,am33xx-ecap"; 2021 #pwm-cells = <3>; 2022 reg = <0x100 0x80>; 2023 clocks = <&l4ls_gclk>; 2024 clock-names = "fck"; 2025 interrupts = <61>; 2026 interrupt-names = "ecap2"; 2027 status = "disabled"; 2028 }; 2029 2030 ehrpwm2: pwm@200 { 2031 compatible = "ti,am3352-ehrpwm", 2032 "ti,am33xx-ehrpwm"; 2033 #pwm-cells = <3>; 2034 reg = <0x200 0x80>; 2035 clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>; 2036 clock-names = "tbclk", "fck"; 2037 status = "disabled"; 2038 }; 2039 }; 2040 }; 2041 2042 target-module@e000 { /* 0x4830e000, ap 72 4a.0 */ 2043 compatible = "ti,sysc-omap4", "ti,sysc"; 2044 reg = <0xe000 0x4>, 2045 <0xe054 0x4>; 2046 reg-names = "rev", "sysc"; 2047 ti,sysc-midle = <SYSC_IDLE_FORCE>, 2048 <SYSC_IDLE_NO>, 2049 <SYSC_IDLE_SMART>; 2050 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2051 <SYSC_IDLE_NO>, 2052 <SYSC_IDLE_SMART>; 2053 /* Domains (P, C): per_pwrdm, lcdc_clkdm */ 2054 clocks = <&lcdc_clkctrl AM3_LCDC_LCDC_CLKCTRL 0>; 2055 clock-names = "fck"; 2056 #address-cells = <1>; 2057 #size-cells = <1>; 2058 ranges = <0x0 0xe000 0x1000>; 2059 2060 lcdc: lcdc@0 { 2061 compatible = "ti,am33xx-tilcdc"; 2062 reg = <0x0 0x1000>; 2063 interrupts = <36>; 2064 status = "disabled"; 2065 }; 2066 }; 2067 2068 target-module@10000 { /* 0x48310000, ap 76 4e.1 */ 2069 compatible = "ti,sysc-omap2", "ti,sysc"; 2070 reg = <0x11fe0 0x4>, 2071 <0x11fe4 0x4>; 2072 reg-names = "rev", "sysc"; 2073 ti,sysc-mask = <SYSC_OMAP2_AUTOIDLE>; 2074 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 2075 <SYSC_IDLE_NO>; 2076 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 2077 clocks = <&l4ls_clkctrl AM3_L4LS_RNG_CLKCTRL 0>; 2078 clock-names = "fck"; 2079 #address-cells = <1>; 2080 #size-cells = <1>; 2081 ranges = <0x0 0x10000 0x2000>; 2082 2083 rng: rng@0 { 2084 compatible = "ti,omap4-rng"; 2085 reg = <0x0 0x2000>; 2086 interrupts = <111>; 2087 }; 2088 }; 2089 2090 target-module@13000 { /* 0x48313000, ap 97 62.0 */ 2091 compatible = "ti,sysc"; 2092 status = "disabled"; 2093 #address-cells = <1>; 2094 #size-cells = <1>; 2095 ranges = <0x0 0x13000 0x1000>; 2096 }; 2097 2098 target-module@15000 { /* 0x48315000, ap 94 56.0 */ 2099 compatible = "ti,sysc"; 2100 status = "disabled"; 2101 #address-cells = <1>; 2102 #size-cells = <1>; 2103 ranges = <0x00000000 0x00015000 0x00001000>, 2104 <0x00001000 0x00016000 0x00001000>; 2105 }; 2106 2107 target-module@18000 { /* 0x48318000, ap 74 4c.0 */ 2108 compatible = "ti,sysc"; 2109 status = "disabled"; 2110 #address-cells = <1>; 2111 #size-cells = <1>; 2112 ranges = <0x0 0x18000 0x4000>; 2113 }; 2114 2115 target-module@20000 { /* 0x48320000, ap 99 34.0 */ 2116 compatible = "ti,sysc"; 2117 status = "disabled"; 2118 #address-cells = <1>; 2119 #size-cells = <1>; 2120 ranges = <0x0 0x20000 0x1000>; 2121 }; 2122 2123 target-module@22000 { /* 0x48322000, ap 101 3e.0 */ 2124 compatible = "ti,sysc"; 2125 status = "disabled"; 2126 #address-cells = <1>; 2127 #size-cells = <1>; 2128 ranges = <0x0 0x22000 0x1000>; 2129 }; 2130 2131 target-module@24000 { /* 0x48324000, ap 103 68.0 */ 2132 compatible = "ti,sysc"; 2133 status = "disabled"; 2134 #address-cells = <1>; 2135 #size-cells = <1>; 2136 ranges = <0x0 0x24000 0x1000>; 2137 }; 2138 }; 2139}; 2140 2141