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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
4 */
5
6/* AM437x GP EVM */
7
8/dts-v1/;
9
10#include "am4372.dtsi"
11#include <dt-bindings/pinctrl/am43xx.h>
12#include <dt-bindings/pwm/pwm.h>
13#include <dt-bindings/gpio/gpio.h>
14
15/ {
16	model = "TI AM437x GP EVM";
17	compatible = "ti,am437x-gp-evm","ti,am4372","ti,am43";
18
19	aliases {
20		display0 = &lcd0;
21	};
22
23	chosen {
24		stdout-path = &uart0;
25	};
26
27	evm_v3_3d: fixedregulator-v3_3d {
28		compatible = "regulator-fixed";
29		regulator-name = "evm_v3_3d";
30		regulator-min-microvolt = <3300000>;
31		regulator-max-microvolt = <3300000>;
32		enable-active-high;
33	};
34
35	vtt_fixed: fixedregulator-vtt {
36		compatible = "regulator-fixed";
37		regulator-name = "vtt_fixed";
38		regulator-min-microvolt = <1500000>;
39		regulator-max-microvolt = <1500000>;
40		regulator-always-on;
41		regulator-boot-on;
42		enable-active-high;
43		gpio = <&gpio5 7 GPIO_ACTIVE_HIGH>;
44	};
45
46	vmmcwl_fixed: fixedregulator-mmcwl {
47		compatible = "regulator-fixed";
48		regulator-name = "vmmcwl_fixed";
49		regulator-min-microvolt = <1800000>;
50		regulator-max-microvolt = <1800000>;
51		gpio = <&gpio1 20 GPIO_ACTIVE_HIGH>;
52		enable-active-high;
53	};
54
55	lcd_bl: backlight {
56		compatible = "pwm-backlight";
57		pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
58		brightness-levels = <0 51 53 56 62 75 101 152 255>;
59		default-brightness-level = <8>;
60	};
61
62	matrix_keypad: matrix_keypad0 {
63		compatible = "gpio-matrix-keypad";
64		debounce-delay-ms = <5>;
65		col-scan-delay-us = <2>;
66
67		pinctrl-names = "default", "sleep";
68		pinctrl-0 = <&matrix_keypad_default>;
69		pinctrl-1 = <&matrix_keypad_sleep>;
70
71		wakeup-source;
72
73		row-gpios = <&gpio0 3 GPIO_ACTIVE_HIGH /* Bank0, pin3 */
74				&gpio4 3 GPIO_ACTIVE_HIGH /* Bank4, pin3 */
75				&gpio4 2 GPIO_ACTIVE_HIGH>; /* Bank4, pin2 */
76
77		col-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH /* Bank3, pin19 */
78				&gpio3 20 GPIO_ACTIVE_HIGH>; /* Bank3, pin20 */
79
80		linux,keymap = <0x00000201      /* P1 */
81				0x00010202      /* P2 */
82				0x01000067      /* UP */
83				0x0101006a      /* RIGHT */
84				0x02000069      /* LEFT */
85				0x0201006c>;      /* DOWN */
86		};
87
88	lcd0: display {
89		compatible = "osddisplays,osd070t1718-19ts", "panel-dpi";
90		label = "lcd";
91
92		backlight = <&lcd_bl>;
93
94		port {
95			lcd_in: endpoint {
96				remote-endpoint = <&dpi_out>;
97			};
98		};
99	};
100
101	/* fixed 12MHz oscillator */
102	refclk: oscillator {
103		#clock-cells = <0>;
104		compatible = "fixed-clock";
105		clock-frequency = <12000000>;
106	};
107
108	/* fixed 32k external oscillator clock */
109	clk_32k_rtc: clk_32k_rtc {
110		#clock-cells = <0>;
111		compatible = "fixed-clock";
112		clock-frequency = <32768>;
113	};
114
115	sound0: sound0 {
116		compatible = "simple-audio-card";
117		simple-audio-card,name = "AM437x-GP-EVM";
118		simple-audio-card,widgets =
119			"Headphone", "Headphone Jack",
120			"Line", "Line In";
121		simple-audio-card,routing =
122			"Headphone Jack",	"HPLOUT",
123			"Headphone Jack",	"HPROUT",
124			"LINE1L",		"Line In",
125			"LINE1R",		"Line In";
126		simple-audio-card,format = "dsp_b";
127		simple-audio-card,bitclock-master = <&sound0_master>;
128		simple-audio-card,frame-master = <&sound0_master>;
129		simple-audio-card,bitclock-inversion;
130
131		simple-audio-card,cpu {
132			sound-dai = <&mcasp1>;
133			system-clock-frequency = <12000000>;
134		};
135
136		sound0_master: simple-audio-card,codec {
137			sound-dai = <&tlv320aic3106>;
138			system-clock-frequency = <12000000>;
139		};
140	};
141
142	beeper: beeper {
143		compatible = "gpio-beeper";
144		pinctrl-names = "default";
145		pinctrl-0 = <&beeper_pins_default>;
146		pinctrl-1 = <&beeper_pins_sleep>;
147		gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
148	};
149};
150
151&am43xx_pinmux {
152	pinctrl-names = "default", "sleep";
153	pinctrl-0 = <&wlan_pins_default &ddr3_vtt_toggle_default &unused_pins &debugss_pins>;
154	pinctrl-1 = <&wlan_pins_sleep>;
155
156	ddr3_vtt_toggle_default: ddr_vtt_toggle_default {
157		pinctrl-single,pins = <
158			0x25C (DS0_PULL_UP_DOWN_EN | PIN_OUTPUT_PULLUP | DS0_FORCE_OFF_MODE | MUX_MODE7) /* spi0_cs0.gpio5_7 */
159		>;
160	};
161
162	i2c0_pins: i2c0_pins {
163		pinctrl-single,pins = <
164			AM4372_IOPAD(0x988, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_sda.i2c0_sda */
165			AM4372_IOPAD(0x98c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_scl.i2c0_scl */
166		>;
167	};
168
169	i2c1_pins: i2c1_pins {
170		pinctrl-single,pins = <
171			AM4372_IOPAD(0x95c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_cs0.i2c1_scl */
172			AM4372_IOPAD(0x958, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_d1.i2c1_sda  */
173		>;
174	};
175
176	mmc1_pins: pinmux_mmc1_pins {
177		pinctrl-single,pins = <
178			AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
179		>;
180	};
181
182	ecap0_pins: backlight_pins {
183		pinctrl-single,pins = <
184			AM4372_IOPAD(0x964, MUX_MODE0)       /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
185		>;
186	};
187
188	pixcir_ts_pins: pixcir_ts_pins {
189		pinctrl-single,pins = <
190			AM4372_IOPAD(0xa64, PIN_INPUT_PULLUP | MUX_MODE7)  /* spi2_d0.gpio3_22 */
191		>;
192	};
193
194	cpsw_default: cpsw_default {
195		pinctrl-single,pins = <
196			/* Slave 1 */
197			AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txen.rgmii1_txen */
198			AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxdv.rgmii1_rxctl */
199			AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd1.rgmii1_txd3 */
200			AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd0.rgmii1_txd2 */
201			AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd1.rgmii1_txd1 */
202			AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd0.rgmii1_txd0 */
203			AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txclk.rmii1_tclk */
204			AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxclk.rmii1_rclk */
205			AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd1.rgmii1_rxd3 */
206			AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd0.rgmii1_rxd2 */
207			AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd1.rgmii1_rxd1 */
208			AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd0.rgmii1_rxd0 */
209		>;
210	};
211
212	cpsw_sleep: cpsw_sleep {
213		pinctrl-single,pins = <
214			/* Slave 1 reset value */
215			AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
216			AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
217			AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
218			AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
219			AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
220			AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
221			AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
222			AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
223			AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
224			AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
225			AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
226			AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
227		>;
228	};
229
230	davinci_mdio_default: davinci_mdio_default {
231		pinctrl-single,pins = <
232			/* MDIO */
233			AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
234			AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)			/* mdio_clk.mdio_clk */
235		>;
236	};
237
238	davinci_mdio_sleep: davinci_mdio_sleep {
239		pinctrl-single,pins = <
240			/* MDIO reset value */
241			AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
242			AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
243		>;
244	};
245
246	nand_flash_x8: nand_flash_x8 {
247		pinctrl-single,pins = <
248			AM4372_IOPAD(0x800, PIN_INPUT  | MUX_MODE0)	/* gpmc_ad0.gpmc_ad0 */
249			AM4372_IOPAD(0x804, PIN_INPUT  | MUX_MODE0)	/* gpmc_ad1.gpmc_ad1 */
250			AM4372_IOPAD(0x808, PIN_INPUT  | MUX_MODE0)	/* gpmc_ad2.gpmc_ad2 */
251			AM4372_IOPAD(0x80c, PIN_INPUT  | MUX_MODE0)	/* gpmc_ad3.gpmc_ad3 */
252			AM4372_IOPAD(0x810, PIN_INPUT  | MUX_MODE0)	/* gpmc_ad4.gpmc_ad4 */
253			AM4372_IOPAD(0x814, PIN_INPUT  | MUX_MODE0)	/* gpmc_ad5.gpmc_ad5 */
254			AM4372_IOPAD(0x818, PIN_INPUT  | MUX_MODE0)	/* gpmc_ad6.gpmc_ad6 */
255			AM4372_IOPAD(0x81c, PIN_INPUT  | MUX_MODE0)	/* gpmc_ad7.gpmc_ad7 */
256			AM4372_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_wait0.gpmc_wait0 */
257			AM4372_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE7)	/* gpmc_wpn.gpmc_wpn */
258			AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)		/* gpmc_csn0.gpmc_csn0  */
259			AM4372_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)		/* gpmc_advn_ale.gpmc_advn_ale */
260			AM4372_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)		/* gpmc_oen_ren.gpmc_oen_ren */
261			AM4372_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)		/* gpmc_wen.gpmc_wen */
262			AM4372_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)		/* gpmc_be0n_cle.gpmc_be0n_cle */
263		>;
264	};
265
266	dss_pins: dss_pins {
267		pinctrl-single,pins = <
268			AM4372_IOPAD(0x820, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 8 -> DSS DATA 23 */
269			AM4372_IOPAD(0x824, PIN_OUTPUT_PULLUP | MUX_MODE1)
270			AM4372_IOPAD(0x828, PIN_OUTPUT_PULLUP | MUX_MODE1)
271			AM4372_IOPAD(0x82c, PIN_OUTPUT_PULLUP | MUX_MODE1)
272			AM4372_IOPAD(0x830, PIN_OUTPUT_PULLUP | MUX_MODE1)
273			AM4372_IOPAD(0x834, PIN_OUTPUT_PULLUP | MUX_MODE1)
274			AM4372_IOPAD(0x838, PIN_OUTPUT_PULLUP | MUX_MODE1)
275			AM4372_IOPAD(0x83c, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 15 -> DSS DATA 16 */
276			AM4372_IOPAD(0x8a0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */
277			AM4372_IOPAD(0x8a4, PIN_OUTPUT_PULLUP | MUX_MODE0)
278			AM4372_IOPAD(0x8a8, PIN_OUTPUT_PULLUP | MUX_MODE0)
279			AM4372_IOPAD(0x8ac, PIN_OUTPUT_PULLUP | MUX_MODE0)
280			AM4372_IOPAD(0x8b0, PIN_OUTPUT_PULLUP | MUX_MODE0)
281			AM4372_IOPAD(0x8b4, PIN_OUTPUT_PULLUP | MUX_MODE0)
282			AM4372_IOPAD(0x8b8, PIN_OUTPUT_PULLUP | MUX_MODE0)
283			AM4372_IOPAD(0x8bc, PIN_OUTPUT_PULLUP | MUX_MODE0)
284			AM4372_IOPAD(0x8c0, PIN_OUTPUT_PULLUP | MUX_MODE0)
285			AM4372_IOPAD(0x8c4, PIN_OUTPUT_PULLUP | MUX_MODE0)
286			AM4372_IOPAD(0x8c8, PIN_OUTPUT_PULLUP | MUX_MODE0)
287			AM4372_IOPAD(0x8cc, PIN_OUTPUT_PULLUP | MUX_MODE0)
288			AM4372_IOPAD(0x8d0, PIN_OUTPUT_PULLUP | MUX_MODE0)
289			AM4372_IOPAD(0x8d4, PIN_OUTPUT_PULLUP | MUX_MODE0)
290			AM4372_IOPAD(0x8d8, PIN_OUTPUT_PULLUP | MUX_MODE0)
291			AM4372_IOPAD(0x8dc, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */
292			AM4372_IOPAD(0x8e0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
293			AM4372_IOPAD(0x8e4, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
294			AM4372_IOPAD(0x8e8, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */
295			AM4372_IOPAD(0x8ec, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */
296
297		>;
298	};
299
300	display_mux_pins: display_mux_pins {
301		pinctrl-single,pins = <
302			/* GPIO 5_8 to select LCD / HDMI */
303			AM4372_IOPAD(0xa38, PIN_OUTPUT_PULLUP | MUX_MODE7)
304		>;
305	};
306
307	dcan0_default: dcan0_default_pins {
308		pinctrl-single,pins = <
309			AM4372_IOPAD(0x978, PIN_OUTPUT | MUX_MODE2)		/* uart1_ctsn.d_can0_tx */
310			AM4372_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE2)	/* uart1_rtsn.d_can0_rx */
311		>;
312	};
313
314	dcan0_sleep: dcan0_sleep_pins {
315		pinctrl-single,pins = <
316			AM4372_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE7)	/* uart1_ctsn.gpio0_12 */
317			AM4372_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE7)	/* uart1_rtsn.gpio0_13 */
318		>;
319	};
320
321	dcan1_default: dcan1_default_pins {
322		pinctrl-single,pins = <
323			AM4372_IOPAD(0x980, PIN_OUTPUT | MUX_MODE2)		/* uart1_rxd.d_can1_tx */
324			AM4372_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE2)	/* uart1_txd.d_can1_rx */
325		>;
326	};
327
328	dcan1_sleep: dcan1_sleep_pins {
329		pinctrl-single,pins = <
330			AM4372_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE7)	/* uart1_rxd.gpio0_14 */
331			AM4372_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE7)	/* uart1_txd.gpio0_15 */
332		>;
333	};
334
335	vpfe0_pins_default: vpfe0_pins_default {
336		pinctrl-single,pins = <
337			AM4372_IOPAD(0x9b0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_hd mode 0*/
338			AM4372_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_vd mode 0*/
339			AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_pclk mode 0*/
340			AM4372_IOPAD(0x9c4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data8 mode 0*/
341			AM4372_IOPAD(0x9c8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data9 mode 0*/
342			AM4372_IOPAD(0xa08, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data0 mode 0*/
343			AM4372_IOPAD(0xa0c, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data1 mode 0*/
344			AM4372_IOPAD(0xa10, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data2 mode 0*/
345			AM4372_IOPAD(0xa14, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data3 mode 0*/
346			AM4372_IOPAD(0xa18, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data4 mode 0*/
347			AM4372_IOPAD(0xa1c, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data5 mode 0*/
348			AM4372_IOPAD(0xa20, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data6 mode 0*/
349			AM4372_IOPAD(0xa24, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data7 mode 0*/
350		>;
351	};
352
353	vpfe0_pins_sleep: vpfe0_pins_sleep {
354		pinctrl-single,pins = <
355			AM4372_IOPAD(0x9b0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_hd mode 0*/
356			AM4372_IOPAD(0x9b4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_vd mode 0*/
357			AM4372_IOPAD(0x9c0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_pclk mode 0*/
358			AM4372_IOPAD(0x9c4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data8 mode 0*/
359			AM4372_IOPAD(0x9c8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data9 mode 0*/
360			AM4372_IOPAD(0xa08, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data0 mode 0*/
361			AM4372_IOPAD(0xa0c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data1 mode 0*/
362			AM4372_IOPAD(0xa10, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data2 mode 0*/
363			AM4372_IOPAD(0xa14, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data3 mode 0*/
364			AM4372_IOPAD(0xa18, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data4 mode 0*/
365			AM4372_IOPAD(0xa1c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data5 mode 0*/
366			AM4372_IOPAD(0xa20, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data6 mode 0*/
367			AM4372_IOPAD(0xa24, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data7 mode 0*/
368		>;
369	};
370
371	vpfe1_pins_default: vpfe1_pins_default {
372		pinctrl-single,pins = <
373			AM4372_IOPAD(0x9cc, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data9 mode 0*/
374			AM4372_IOPAD(0x9d0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data8 mode 0*/
375			AM4372_IOPAD(0x9d4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_hd mode 0*/
376			AM4372_IOPAD(0x9d8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_vd mode 0*/
377			AM4372_IOPAD(0x9dC, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_pclk mode 0*/
378			AM4372_IOPAD(0x9e8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data0 mode 0*/
379			AM4372_IOPAD(0x9ec, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data1 mode 0*/
380			AM4372_IOPAD(0x9f0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data2 mode 0*/
381			AM4372_IOPAD(0x9f4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data3 mode 0*/
382			AM4372_IOPAD(0x9f8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data4 mode 0*/
383			AM4372_IOPAD(0x9fc, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data5 mode 0*/
384			AM4372_IOPAD(0xa00, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data6 mode 0*/
385			AM4372_IOPAD(0xa04, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data7 mode 0*/
386		>;
387	};
388
389	vpfe1_pins_sleep: vpfe1_pins_sleep {
390		pinctrl-single,pins = <
391			AM4372_IOPAD(0x9cc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data9 mode 0*/
392			AM4372_IOPAD(0x9d0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data8 mode 0*/
393			AM4372_IOPAD(0x9d4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_hd mode 0*/
394			AM4372_IOPAD(0x9d8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_vd mode 0*/
395			AM4372_IOPAD(0x9dc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_pclk mode 0*/
396			AM4372_IOPAD(0x9e8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data0 mode 0*/
397			AM4372_IOPAD(0x9ec, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data1 mode 0*/
398			AM4372_IOPAD(0x9f0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data2 mode 0*/
399			AM4372_IOPAD(0x9f4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data3 mode 0*/
400			AM4372_IOPAD(0x9f8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data4 mode 0*/
401			AM4372_IOPAD(0x9fc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data5 mode 0*/
402			AM4372_IOPAD(0xa00, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data6 mode 0*/
403			AM4372_IOPAD(0xa04, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data7 mode 0*/
404		>;
405	};
406
407	mmc3_pins_default: pinmux_mmc3_pins_default {
408		pinctrl-single,pins = <
409			AM4372_IOPAD(0x88c, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_clk.mmc2_clk */
410			AM4372_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_csn3.mmc2_cmd */
411			AM4372_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_a1.mmc2_dat0 */
412			AM4372_IOPAD(0x848, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_a2.mmc2_dat1 */
413			AM4372_IOPAD(0x84c, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_a3.mmc2_dat2 */
414			AM4372_IOPAD(0x878, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_be1n.mmc2_dat3 */
415		>;
416	};
417
418	mmc3_pins_sleep: pinmux_mmc3_pins_sleep {
419		pinctrl-single,pins = <
420			AM4372_IOPAD(0x88c, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_clk.mmc2_clk */
421			AM4372_IOPAD(0x888, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_csn3.mmc2_cmd */
422			AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a1.mmc2_dat0 */
423			AM4372_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a2.mmc2_dat1 */
424			AM4372_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a3.mmc2_dat2 */
425			AM4372_IOPAD(0x878, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_be1n.mmc2_dat3 */
426		>;
427	};
428
429	wlan_pins_default: pinmux_wlan_pins_default {
430		pinctrl-single,pins = <
431			AM4372_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE7)		/* gpmc_a4.gpio1_20 WL_EN */
432			AM4372_IOPAD(0x85c, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7)	/* gpmc_a7.gpio1_23 WL_IRQ*/
433			AM4372_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE7)		/* gpmc_a0.gpio1_16 BT_EN*/
434		>;
435	};
436
437	wlan_pins_sleep: pinmux_wlan_pins_sleep {
438		pinctrl-single,pins = <
439			AM4372_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE7)		/* gpmc_a4.gpio1_20 WL_EN */
440			AM4372_IOPAD(0x85c, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7)	/* gpmc_a7.gpio1_23 WL_IRQ*/
441			AM4372_IOPAD(0x840, PIN_OUTPUT_PULLUP | MUX_MODE7)		/* gpmc_a0.gpio1_16 BT_EN*/
442		>;
443	};
444
445	uart3_pins: uart3_pins {
446		pinctrl-single,pins = <
447			AM4372_IOPAD(0xa28, PIN_INPUT | MUX_MODE0)		/* uart3_rxd.uart3_rxd */
448			AM4372_IOPAD(0xa2c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_txd.uart3_txd */
449			AM4372_IOPAD(0xa30, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart3_ctsn.uart3_ctsn */
450			AM4372_IOPAD(0xa34, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_rtsn.uart3_rtsn */
451		>;
452	};
453
454	mcasp1_pins: mcasp1_pins {
455		pinctrl-single,pins = <
456			AM4372_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4)	/* mii1_col.mcasp1_axr2 */
457			AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* mii1_crs.mcasp1_aclkx */
458			AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* mii1_rxerr.mcasp1_fsx */
459			AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* rmii1_ref_clk.mcasp1_axr3 */
460		>;
461	};
462
463	mcasp1_sleep_pins: mcasp1_sleep_pins {
464		pinctrl-single,pins = <
465			AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
466			AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
467			AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
468			AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
469		>;
470	};
471
472	gpio0_pins: gpio0_pins {
473		pinctrl-single,pins = <
474			AM4372_IOPAD(0xa6c, PIN_OUTPUT | MUX_MODE9) /* spi2_cs0.gpio0_23 SEL_eMMCorNANDn */
475		>;
476	};
477
478	emmc_pins_default: emmc_pins_default {
479		pinctrl-single,pins = <
480			AM4372_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
481			AM4372_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
482			AM4372_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
483			AM4372_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
484			AM4372_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
485			AM4372_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
486			AM4372_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
487			AM4372_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
488			AM4372_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
489			AM4372_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
490		>;
491	};
492
493	emmc_pins_sleep: emmc_pins_sleep {
494		pinctrl-single,pins = <
495			AM4372_IOPAD(0x800, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad0.gpio1_0 */
496			AM4372_IOPAD(0x804, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad1.gpio1_1 */
497			AM4372_IOPAD(0x808, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad2.gpio1_2 */
498			AM4372_IOPAD(0x80c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad3.gpio1_3 */
499			AM4372_IOPAD(0x810, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */
500			AM4372_IOPAD(0x814, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */
501			AM4372_IOPAD(0x818, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */
502			AM4372_IOPAD(0x81c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */
503			AM4372_IOPAD(0x880, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn1.gpio1_30 */
504			AM4372_IOPAD(0x884, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn2.gpio1_31 */
505		>;
506	};
507
508	beeper_pins_default: beeper_pins_default {
509		pinctrl-single,pins = <
510			AM4372_IOPAD(0x9e0, PIN_OUTPUT_PULLUP | MUX_MODE7)	/* cam1_field.gpio4_12 */
511		>;
512	};
513
514	beeper_pins_sleep: beeper_pins_sleep {
515		pinctrl-single,pins = <
516			AM4372_IOPAD(0x9e0, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* cam1_field.gpio4_12 */
517		>;
518	};
519
520	unused_pins: unused_pins {
521		pinctrl-single,pins = <
522			AM4372_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
523			AM4372_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
524			AM4372_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
525			AM4372_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
526			AM4372_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
527			AM4372_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
528			AM4372_IOPAD(0x950, PIN_INPUT_PULLDOWN | MUX_MODE7)
529			AM4372_IOPAD(0x990, PIN_INPUT_PULLDOWN | MUX_MODE7)
530			AM4372_IOPAD(0x994, PIN_INPUT_PULLDOWN | MUX_MODE7)
531			AM4372_IOPAD(0x998, PIN_INPUT_PULLDOWN | MUX_MODE7)
532			AM4372_IOPAD(0x99c, PIN_INPUT_PULLDOWN | MUX_MODE7)
533			AM4372_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE7)
534			AM4372_IOPAD(0xa3c, PIN_INPUT | PULL_DISABLE | MUX_MODE7)
535			AM4372_IOPAD(0xa40, PIN_INPUT_PULLDOWN | MUX_MODE7)
536			AM4372_IOPAD(0xa44, PIN_INPUT_PULLDOWN | MUX_MODE7)
537			AM4372_IOPAD(0xa48, PIN_INPUT_PULLDOWN | MUX_MODE7)
538			AM4372_IOPAD(0xa4c, PIN_INPUT_PULLDOWN | MUX_MODE7)
539			AM4372_IOPAD(0xa50, PIN_INPUT_PULLDOWN | MUX_MODE7)
540			AM4372_IOPAD(0xa54, PIN_INPUT | PULL_DISABLE | MUX_MODE7)
541			AM4372_IOPAD(0xa58, PIN_INPUT_PULLDOWN | MUX_MODE7)
542			AM4372_IOPAD(0xa60, PIN_INPUT | PULL_DISABLE | MUX_MODE7)
543			AM4372_IOPAD(0xa68, PIN_INPUT_PULLDOWN | MUX_MODE7)
544			AM4372_IOPAD(0xa70, PIN_INPUT_PULLDOWN | MUX_MODE7)
545			AM4372_IOPAD(0xa78, PIN_INPUT_PULLDOWN | MUX_MODE7)
546			AM4372_IOPAD(0xa7c, PIN_INPUT | PULL_DISABLE)
547			AM4372_IOPAD(0xac8, PIN_INPUT_PULLDOWN)
548			AM4372_IOPAD(0xad4, PIN_INPUT_PULLDOWN)
549			AM4372_IOPAD(0xad8, PIN_INPUT_PULLDOWN | MUX_MODE7)
550			AM4372_IOPAD(0xadc, PIN_INPUT_PULLDOWN | MUX_MODE7)
551			AM4372_IOPAD(0xae0, PIN_INPUT_PULLDOWN | MUX_MODE7)
552			AM4372_IOPAD(0xae4, PIN_INPUT_PULLDOWN | MUX_MODE7)
553			AM4372_IOPAD(0xae8, PIN_INPUT_PULLDOWN | MUX_MODE7)
554			AM4372_IOPAD(0xaec, PIN_INPUT_PULLDOWN | MUX_MODE7)
555			AM4372_IOPAD(0xaf0, PIN_INPUT_PULLDOWN | MUX_MODE7)
556			AM4372_IOPAD(0xaf4, PIN_INPUT_PULLDOWN | MUX_MODE7)
557			AM4372_IOPAD(0xaf8, PIN_INPUT_PULLDOWN | MUX_MODE7)
558			AM4372_IOPAD(0xafc, PIN_INPUT_PULLDOWN | MUX_MODE7)
559			AM4372_IOPAD(0xb00, PIN_INPUT_PULLDOWN | MUX_MODE7)
560			AM4372_IOPAD(0xb04, PIN_INPUT_PULLDOWN | MUX_MODE7)
561			AM4372_IOPAD(0xb08, PIN_INPUT_PULLDOWN | MUX_MODE7)
562			AM4372_IOPAD(0xb0c, PIN_INPUT_PULLDOWN | MUX_MODE7)
563			AM4372_IOPAD(0xb10, PIN_INPUT_PULLDOWN | MUX_MODE7)
564			AM4372_IOPAD(0xb14, PIN_INPUT_PULLDOWN | MUX_MODE7)
565			AM4372_IOPAD(0xb18, PIN_INPUT_PULLDOWN | MUX_MODE7)
566		>;
567	};
568
569	debugss_pins: pinmux_debugss_pins {
570		pinctrl-single,pins = <
571			AM4372_IOPAD(0xa90, PIN_INPUT_PULLDOWN)
572			AM4372_IOPAD(0xa94, PIN_INPUT_PULLDOWN)
573			AM4372_IOPAD(0xa98, PIN_INPUT_PULLDOWN)
574			AM4372_IOPAD(0xa9c, PIN_INPUT_PULLDOWN)
575			AM4372_IOPAD(0xaa0, PIN_INPUT_PULLDOWN)
576			AM4372_IOPAD(0xaa4, PIN_INPUT_PULLDOWN)
577			AM4372_IOPAD(0xaa8, PIN_INPUT_PULLDOWN)
578		>;
579	};
580
581	uart0_pins_default: uart0_pins_default {
582		pinctrl-single,pins = <
583			AM4372_IOPAD(0x968, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0) /* uart0_ctsn.uart0_ctsn */
584			AM4372_IOPAD(0x96C, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0) /* uart0_rtsn.uart0_rtsn */
585			AM4372_IOPAD(0x970, PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_rxd.uart0_rxd */
586			AM4372_IOPAD(0x974, PIN_INPUT | PULL_DISABLE | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_txd.uart0_txd */
587		>;
588	};
589
590	uart0_pins_sleep: uart0_pins_sleep {
591		pinctrl-single,pins = <
592			AM4372_IOPAD(0x968, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* uart0_ctsn.uart0_ctsn */
593			AM4372_IOPAD(0x96C, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* uart0_rtsn.uart0_rtsn */
594			AM4372_IOPAD(0x970, PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_rxd.uart0_rxd */
595			AM4372_IOPAD(0x974, PIN_INPUT_PULLDOWN | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_txd.uart0_txd */
596		>;
597	};
598
599	matrix_keypad_default: matrix_keypad_default {
600		pinctrl-single,pins = <
601			AM4372_IOPAD(0x9a4, PIN_OUTPUT | MUX_MODE7)
602			AM4372_IOPAD(0x9a8, PIN_OUTPUT | MUX_MODE7)
603			AM4372_IOPAD(0x9ac, PIN_INPUT | PULL_DISABLE | MUX_MODE9)
604			AM4372_IOPAD(0x954, PIN_INPUT_PULLDOWN | MUX_MODE0)
605		>;
606	};
607
608	matrix_keypad_sleep: matrix_keypad_sleep {
609		pinctrl-single,pins = <
610			AM4372_IOPAD(0x9a4, PULL_UP | MUX_MODE7)
611			AM4372_IOPAD(0x9a8, PULL_UP | MUX_MODE7)
612			AM4372_IOPAD(0x9ac, PIN_INPUT | PULL_DISABLE | MUX_MODE9)
613			AM4372_IOPAD(0x954, PIN_INPUT_PULLDOWN | MUX_MODE0)
614		>;
615	};
616};
617
618&uart0 {
619	status = "okay";
620	pinctrl-names = "default", "sleep";
621	pinctrl-0 = <&uart0_pins_default>;
622	pinctrl-1 = <&uart0_pins_sleep>;
623};
624
625&i2c0 {
626	status = "okay";
627	pinctrl-names = "default";
628	pinctrl-0 = <&i2c0_pins>;
629	clock-frequency = <100000>;
630
631	tps65218: tps65218@24 {
632		reg = <0x24>;
633		compatible = "ti,tps65218";
634		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* NMIn */
635		interrupt-controller;
636		#interrupt-cells = <2>;
637
638		dcdc1: regulator-dcdc1 {
639			regulator-name = "vdd_core";
640			regulator-min-microvolt = <912000>;
641			regulator-max-microvolt = <1144000>;
642			regulator-boot-on;
643			regulator-always-on;
644		};
645
646		dcdc2: regulator-dcdc2 {
647			regulator-name = "vdd_mpu";
648			regulator-min-microvolt = <912000>;
649			regulator-max-microvolt = <1378000>;
650			regulator-boot-on;
651			regulator-always-on;
652		};
653
654		dcdc3: regulator-dcdc3 {
655			regulator-name = "vdcdc3";
656			regulator-boot-on;
657			regulator-always-on;
658			regulator-state-mem {
659				regulator-on-in-suspend;
660			};
661			regulator-state-disk {
662				regulator-off-in-suspend;
663			};
664		};
665
666		dcdc5: regulator-dcdc5 {
667			regulator-name = "v1_0bat";
668			regulator-min-microvolt = <1000000>;
669			regulator-max-microvolt = <1000000>;
670			regulator-boot-on;
671			regulator-always-on;
672			regulator-state-mem {
673				regulator-on-in-suspend;
674			};
675		};
676
677		dcdc6: regulator-dcdc6 {
678			regulator-name = "v1_8bat";
679			regulator-min-microvolt = <1800000>;
680			regulator-max-microvolt = <1800000>;
681			regulator-boot-on;
682			regulator-always-on;
683			regulator-state-mem {
684				regulator-on-in-suspend;
685			};
686		};
687
688		ldo1: regulator-ldo1 {
689			regulator-min-microvolt = <1800000>;
690			regulator-max-microvolt = <1800000>;
691			regulator-boot-on;
692			regulator-always-on;
693		};
694	};
695
696	ov2659@30 {
697		compatible = "ovti,ov2659";
698		reg = <0x30>;
699
700		clocks = <&refclk 0>;
701		clock-names = "xvclk";
702
703		port {
704			ov2659_0: endpoint {
705				remote-endpoint = <&vpfe1_ep>;
706				link-frequencies = /bits/ 64 <70000000>;
707			};
708		};
709	};
710};
711
712&i2c1 {
713	status = "okay";
714	pinctrl-names = "default";
715	pinctrl-0 = <&i2c1_pins>;
716	pixcir_ts@5c {
717		compatible = "pixcir,pixcir_tangoc";
718		pinctrl-names = "default";
719		pinctrl-0 = <&pixcir_ts_pins>;
720		reg = <0x5c>;
721
722		attb-gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
723
724		/*
725		 * 0x264 represents the offset of padconf register of
726		 * gpio3_22 from am43xx_pinmux base.
727		 */
728		interrupts-extended = <&gpio3 22 IRQ_TYPE_EDGE_FALLING>,
729				      <&am43xx_pinmux 0x264>;
730		interrupt-names = "tsc", "wakeup";
731
732		touchscreen-size-x = <1024>;
733		touchscreen-size-y = <600>;
734		wakeup-source;
735	};
736
737	ov2659@30 {
738		compatible = "ovti,ov2659";
739		reg = <0x30>;
740
741		clocks = <&refclk 0>;
742		clock-names = "xvclk";
743
744		port {
745			ov2659_1: endpoint {
746				remote-endpoint = <&vpfe0_ep>;
747				link-frequencies = /bits/ 64 <70000000>;
748			};
749		};
750	};
751
752	tlv320aic3106: tlv320aic3106@1b {
753		#sound-dai-cells = <0>;
754		compatible = "ti,tlv320aic3106";
755		reg = <0x1b>;
756		status = "okay";
757
758		/* Regulators */
759		IOVDD-supply = <&evm_v3_3d>; /* V3_3D -> <tps63031> EN: V1_8D -> VBAT */
760		AVDD-supply = <&evm_v3_3d>; /* v3_3AUD -> V3_3D -> ... */
761		DRVDD-supply = <&evm_v3_3d>; /* v3_3AUD -> V3_3D -> ... */
762		DVDD-supply = <&ldo1>; /* V1_8D -> LDO1 */
763	};
764};
765
766&epwmss0 {
767	status = "okay";
768};
769
770&tscadc {
771	status = "okay";
772
773	adc {
774		ti,adc-channels = <0 1 2 3 4 5 6 7>;
775	};
776};
777
778&ecap0 {
779	status = "okay";
780	pinctrl-names = "default";
781	pinctrl-0 = <&ecap0_pins>;
782};
783
784&gpio0 {
785	pinctrl-names = "default";
786	pinctrl-0 = <&gpio0_pins>;
787	status = "okay";
788
789	p23 {
790		gpio-hog;
791		gpios = <23 GPIO_ACTIVE_HIGH>;
792		/* SelEMMCorNAND selects between eMMC and NAND:
793		 * Low: NAND
794		 * High: eMMC
795		 * When changing this line make sure the newly
796		 * selected device node is enabled and the previously
797		 * selected device node is disabled.
798		 */
799		output-low;
800		line-name = "SelEMMCorNAND";
801	};
802};
803
804&gpio1 {
805	status = "okay";
806};
807
808&gpio3 {
809	status = "okay";
810};
811
812&gpio4 {
813	status = "okay";
814};
815
816&gpio5_target {
817	ti,no-reset-on-init;
818};
819
820&gpio5 {
821	pinctrl-names = "default";
822	pinctrl-0 = <&display_mux_pins>;
823	status = "okay";
824
825	p8 {
826		/*
827		 * SelLCDorHDMI selects between display and audio paths:
828		 * Low: HDMI display with audio via HDMI
829		 * High: LCD display with analog audio via aic3111 codec
830		 */
831		gpio-hog;
832		gpios = <8 GPIO_ACTIVE_HIGH>;
833		output-high;
834		line-name = "SelLCDorHDMI";
835	};
836};
837
838&mmc1 {
839	status = "okay";
840	vmmc-supply = <&evm_v3_3d>;
841	bus-width = <4>;
842	pinctrl-names = "default";
843	pinctrl-0 = <&mmc1_pins>;
844	cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
845};
846
847/* eMMC sits on mmc2 */
848&mmc2 {
849	/*
850	 * When enabling eMMC, disable GPMC/NAND and set
851	 * SelEMMCorNAND to output-high
852	 */
853	status = "disabled";
854	vmmc-supply = <&evm_v3_3d>;
855	bus-width = <8>;
856	pinctrl-names = "default", "sleep";
857	pinctrl-0 = <&emmc_pins_default>;
858	pinctrl-1 = <&emmc_pins_sleep>;
859	non-removable;
860};
861
862&mmc3 {
863	status = "okay";
864	/* these are on the crossbar and are outlined in the
865	   xbar-event-map element */
866	dmas = <&edma_xbar 30 0 1>,
867		<&edma_xbar 31 0 2>;
868	dma-names = "tx", "rx";
869	vmmc-supply = <&vmmcwl_fixed>;
870	bus-width = <4>;
871	pinctrl-names = "default", "sleep";
872	pinctrl-0 = <&mmc3_pins_default>;
873	pinctrl-1 = <&mmc3_pins_sleep>;
874	cap-power-off-card;
875	keep-power-in-suspend;
876	non-removable;
877
878	#address-cells = <1>;
879	#size-cells = <0>;
880	wlcore: wlcore@0 {
881		compatible = "ti,wl1835";
882		reg = <2>;
883		interrupt-parent = <&gpio1>;
884		interrupts = <23 IRQ_TYPE_EDGE_RISING>;
885	};
886};
887
888&uart3 {
889	status = "okay";
890	pinctrl-names = "default";
891	pinctrl-0 = <&uart3_pins>;
892};
893
894&usb2_phy1 {
895	status = "okay";
896};
897
898&usb1 {
899	dr_mode = "otg";
900	status = "okay";
901};
902
903&usb2_phy2 {
904	status = "okay";
905};
906
907&usb2 {
908	dr_mode = "host";
909	status = "okay";
910};
911
912&mac_sw {
913	pinctrl-names = "default", "sleep";
914	pinctrl-0 = <&cpsw_default>;
915	pinctrl-1 = <&cpsw_sleep>;
916	status = "okay";
917};
918
919&davinci_mdio_sw {
920	pinctrl-names = "default", "sleep";
921	pinctrl-0 = <&davinci_mdio_default>;
922	pinctrl-1 = <&davinci_mdio_sleep>;
923
924	ethphy0: ethernet-phy@0 {
925		reg = <0>;
926	};
927};
928
929&cpsw_port1 {
930	phy-handle = <&ethphy0>;
931	phy-mode = "rgmii-rxid";
932	ti,dual-emac-pvid = <1>;
933};
934
935&cpsw_port2 {
936	status = "disabled";
937};
938
939&elm {
940	status = "okay";
941};
942
943&gpmc {
944	/*
945	 * When enabling GPMC, disable eMMC and set
946	 * SelEMMCorNAND to output-low
947	 */
948	status = "okay";
949	pinctrl-names = "default";
950	pinctrl-0 = <&nand_flash_x8>;
951	ranges = <0 0 0x08000000 0x01000000>;	/* CS0 space. Min partition = 16MB */
952	nand@0,0 {
953		compatible = "ti,omap2-nand";
954		reg = <0 0 4>;		/* device IO registers */
955		interrupt-parent = <&gpmc>;
956		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
957			     <1 IRQ_TYPE_NONE>;	/* termcount */
958		rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>;	/* gpmc_wait0 */
959		ti,nand-xfer-type = "prefetch-dma";
960		ti,nand-ecc-opt = "bch16";
961		ti,elm-id = <&elm>;
962		nand-bus-width = <8>;
963		gpmc,device-width = <1>;
964		gpmc,sync-clk-ps = <0>;
965		gpmc,cs-on-ns = <0>;
966		gpmc,cs-rd-off-ns = <40>;
967		gpmc,cs-wr-off-ns = <40>;
968		gpmc,adv-on-ns = <0>;
969		gpmc,adv-rd-off-ns = <25>;
970		gpmc,adv-wr-off-ns = <25>;
971		gpmc,we-on-ns = <0>;
972		gpmc,we-off-ns = <20>;
973		gpmc,oe-on-ns = <3>;
974		gpmc,oe-off-ns = <30>;
975		gpmc,access-ns = <30>;
976		gpmc,rd-cycle-ns = <40>;
977		gpmc,wr-cycle-ns = <40>;
978		gpmc,bus-turnaround-ns = <0>;
979		gpmc,cycle2cycle-delay-ns = <0>;
980		gpmc,clk-activation-ns = <0>;
981		gpmc,wr-access-ns = <40>;
982		gpmc,wr-data-mux-bus-ns = <0>;
983		/* MTD partition table */
984		/* All SPL-* partitions are sized to minimal length
985		 * which can be independently programmable. For
986		 * NAND flash this is equal to size of erase-block */
987		#address-cells = <1>;
988		#size-cells = <1>;
989		partition@0 {
990			label = "NAND.SPL";
991			reg = <0x00000000 0x00040000>;
992		};
993		partition@1 {
994			label = "NAND.SPL.backup1";
995			reg = <0x00040000 0x00040000>;
996		};
997		partition@2 {
998			label = "NAND.SPL.backup2";
999			reg = <0x00080000 0x00040000>;
1000		};
1001		partition@3 {
1002			label = "NAND.SPL.backup3";
1003			reg = <0x000c0000 0x00040000>;
1004		};
1005		partition@4 {
1006			label = "NAND.u-boot-spl-os";
1007			reg = <0x00100000 0x00080000>;
1008		};
1009		partition@5 {
1010			label = "NAND.u-boot";
1011			reg = <0x00180000 0x00100000>;
1012		};
1013		partition@6 {
1014			label = "NAND.u-boot-env";
1015			reg = <0x00280000 0x00040000>;
1016		};
1017		partition@7 {
1018			label = "NAND.u-boot-env.backup1";
1019			reg = <0x002c0000 0x00040000>;
1020		};
1021		partition@8 {
1022			label = "NAND.kernel";
1023			reg = <0x00300000 0x00700000>;
1024		};
1025		partition@9 {
1026			label = "NAND.file-system";
1027			reg = <0x00a00000 0x1f600000>;
1028		};
1029	};
1030};
1031
1032&dss {
1033	status = "okay";
1034
1035	pinctrl-names = "default";
1036	pinctrl-0 = <&dss_pins>;
1037
1038	port {
1039		dpi_out: endpoint {
1040			remote-endpoint = <&lcd_in>;
1041			data-lines = <24>;
1042		};
1043	};
1044};
1045
1046&dcan0 {
1047	pinctrl-names = "default", "sleep";
1048	pinctrl-0 = <&dcan0_default>;
1049	pinctrl-1 = <&dcan0_sleep>;
1050	status = "okay";
1051};
1052
1053&dcan1 {
1054	pinctrl-names = "default", "sleep";
1055	pinctrl-0 = <&dcan1_default>;
1056	pinctrl-1 = <&dcan1_sleep>;
1057	status = "okay";
1058};
1059
1060&vpfe0 {
1061	status = "okay";
1062	pinctrl-names = "default", "sleep";
1063	pinctrl-0 = <&vpfe0_pins_default>;
1064	pinctrl-1 = <&vpfe0_pins_sleep>;
1065
1066	port {
1067		vpfe0_ep: endpoint {
1068			remote-endpoint = <&ov2659_1>;
1069			ti,am437x-vpfe-interface = <0>;
1070			bus-width = <8>;
1071			hsync-active = <0>;
1072			vsync-active = <0>;
1073		};
1074	};
1075};
1076
1077&vpfe1 {
1078	status = "okay";
1079	pinctrl-names = "default", "sleep";
1080	pinctrl-0 = <&vpfe1_pins_default>;
1081	pinctrl-1 = <&vpfe1_pins_sleep>;
1082
1083	port {
1084		vpfe1_ep: endpoint {
1085			remote-endpoint = <&ov2659_0>;
1086			ti,am437x-vpfe-interface = <0>;
1087			bus-width = <8>;
1088			hsync-active = <0>;
1089			vsync-active = <0>;
1090		};
1091	};
1092};
1093
1094&mcasp1 {
1095	#sound-dai-cells = <0>;
1096	pinctrl-names = "default", "sleep";
1097	pinctrl-0 = <&mcasp1_pins>;
1098	pinctrl-1 = <&mcasp1_sleep_pins>;
1099
1100	status = "okay";
1101
1102	op-mode = <0>; /* MCASP_IIS_MODE */
1103	tdm-slots = <2>;
1104	/* 4 serializers */
1105	serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
1106		0 0 1 2
1107	>;
1108	tx-num-evt = <32>;
1109	rx-num-evt = <32>;
1110};
1111
1112&rtc {
1113	clocks = <&clk_32k_rtc>, <&clk_32768_ck>;
1114	clock-names = "ext-clk", "int-clk";
1115	status = "okay";
1116};
1117
1118&cpu {
1119	cpu0-supply = <&dcdc2>;
1120};
1121