1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Samsung's Exynos4210 based Universal C210 board device tree source 4 * 5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd. 6 * http://www.samsung.com 7 * 8 * Device tree source file for Samsung's Universal C210 board which is based on 9 * Samsung's Exynos4210 rev0 SoC. 10 */ 11 12/dts-v1/; 13#include "exynos4210.dtsi" 14#include <dt-bindings/gpio/gpio.h> 15 16/ { 17 model = "Samsung Universal C210 based on Exynos4210 rev0"; 18 compatible = "samsung,universal_c210", "samsung,exynos4210", "samsung,exynos4"; 19 20 memory@40000000 { 21 device_type = "memory"; 22 reg = <0x40000000 0x10000000 23 0x50000000 0x10000000>; 24 }; 25 26 chosen { 27 bootargs = "root=/dev/mmcblk0p5 rw rootwait earlyprintk panic=5 maxcpus=1"; 28 stdout-path = "serial2:115200n8"; 29 }; 30 31 32 fixed-rate-clocks { 33 xxti { 34 compatible = "samsung,clock-xxti"; 35 clock-frequency = <0>; 36 }; 37 38 xusbxti { 39 compatible = "samsung,clock-xusbxti"; 40 clock-frequency = <24000000>; 41 }; 42 43 pmic_ap_clk: pmic-ap-clk { 44 /* Workaround for missing clock on PMIC */ 45 compatible = "fixed-clock"; 46 #clock-cells = <0>; 47 clock-frequency = <32768>; 48 }; 49 }; 50 51 vemmc_reg: voltage-regulator { 52 compatible = "regulator-fixed"; 53 regulator-name = "VMEM_VDD_2_8V"; 54 regulator-min-microvolt = <2800000>; 55 regulator-max-microvolt = <2800000>; 56 gpio = <&gpe1 3 GPIO_ACTIVE_HIGH>; 57 enable-active-high; 58 }; 59 60 wlan_pwrseq: sdhci3-pwrseq { 61 compatible = "mmc-pwrseq-simple"; 62 reset-gpios = <&gpe3 1 GPIO_ACTIVE_LOW>; 63 }; 64 65 gpio-keys { 66 compatible = "gpio-keys"; 67 68 vol-up-key { 69 gpios = <&gpx2 0 GPIO_ACTIVE_LOW>; 70 linux,code = <115>; 71 label = "volume up"; 72 debounce-interval = <1>; 73 }; 74 75 vol-down-key { 76 gpios = <&gpx2 1 GPIO_ACTIVE_LOW>; 77 linux,code = <114>; 78 label = "volume down"; 79 debounce-interval = <1>; 80 }; 81 82 config-key { 83 gpios = <&gpx2 2 GPIO_ACTIVE_LOW>; 84 linux,code = <171>; 85 label = "config"; 86 debounce-interval = <1>; 87 wakeup-source; 88 }; 89 90 camera-key { 91 gpios = <&gpx2 3 GPIO_ACTIVE_LOW>; 92 linux,code = <212>; 93 label = "camera"; 94 debounce-interval = <1>; 95 }; 96 97 power-key { 98 gpios = <&gpx2 7 GPIO_ACTIVE_LOW>; 99 linux,code = <116>; 100 label = "power"; 101 debounce-interval = <1>; 102 wakeup-source; 103 }; 104 105 ok-key { 106 gpios = <&gpx3 5 GPIO_ACTIVE_LOW>; 107 linux,code = <352>; 108 label = "ok"; 109 debounce-interval = <1>; 110 }; 111 }; 112 113 tsp_reg: voltage-regulator { 114 compatible = "regulator-fixed"; 115 regulator-name = "TSP_2_8V"; 116 regulator-min-microvolt = <2800000>; 117 regulator-max-microvolt = <2800000>; 118 gpio = <&gpe2 3 GPIO_ACTIVE_HIGH>; 119 enable-active-high; 120 }; 121 122 spi-3 { 123 compatible = "spi-gpio"; 124 #address-cells = <1>; 125 #size-cells = <0>; 126 127 sck-gpios = <&gpy3 1 GPIO_ACTIVE_HIGH>; 128 mosi-gpios = <&gpy3 3 GPIO_ACTIVE_HIGH>; 129 num-chipselects = <1>; 130 cs-gpios = <&gpy4 3 GPIO_ACTIVE_LOW>; 131 132 lcd@0 { 133 compatible = "samsung,ld9040"; 134 reg = <0>; 135 vdd3-supply = <&ldo7_reg>; 136 vci-supply = <&ldo17_reg>; 137 reset-gpios = <&gpy4 5 GPIO_ACTIVE_HIGH>; 138 spi-max-frequency = <1200000>; 139 power-on-delay = <10>; 140 reset-delay = <10>; 141 panel-width-mm = <90>; 142 panel-height-mm = <154>; 143 display-timings { 144 timing { 145 clock-frequency = <23492370>; 146 hactive = <480>; 147 vactive = <800>; 148 hback-porch = <16>; 149 hfront-porch = <16>; 150 vback-porch = <2>; 151 vfront-porch = <28>; 152 hsync-len = <2>; 153 vsync-len = <1>; 154 hsync-active = <0>; 155 vsync-active = <0>; 156 de-active = <0>; 157 pixelclk-active = <0>; 158 }; 159 }; 160 port { 161 lcd_ep: endpoint { 162 remote-endpoint = <&fimd_dpi_ep>; 163 }; 164 }; 165 }; 166 }; 167 168 hdmi_en: voltage-regulator-hdmi-5v { 169 compatible = "regulator-fixed"; 170 regulator-name = "HDMI_5V"; 171 regulator-min-microvolt = <5000000>; 172 regulator-max-microvolt = <5000000>; 173 gpio = <&gpe0 1 GPIO_ACTIVE_HIGH>; 174 enable-active-high; 175 }; 176 177 hdmi_ddc: i2c-ddc { 178 compatible = "i2c-gpio"; 179 sda-gpios = <&gpe4 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 180 scl-gpios = <&gpe4 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 181 i2c-gpio,delay-us = <100>; 182 #address-cells = <1>; 183 #size-cells = <0>; 184 185 pinctrl-0 = <&i2c_ddc_bus>; 186 pinctrl-names = "default"; 187 status = "okay"; 188 }; 189}; 190 191&camera { 192 status = "okay"; 193 194 pinctrl-names = "default"; 195 pinctrl-0 = <>; 196}; 197 198&cpu0 { 199 cpu0-supply = <&vdd_arm_reg>; 200}; 201 202&cpu_thermal { 203 cooling-maps { 204 map0 { 205 /* Corresponds to 800MHz */ 206 cooling-device = <&cpu0 2 2>; 207 }; 208 map1 { 209 /* Corresponds to 200MHz */ 210 cooling-device = <&cpu0 4 4>; 211 }; 212 }; 213}; 214 215&ehci { 216 status = "okay"; 217 phys = <&exynos_usbphy 1>; 218 phy-names = "host"; 219}; 220 221&exynos_usbphy { 222 status = "okay"; 223 vbus-supply = <&safeout1_reg>; 224}; 225 226&fimc_0 { 227 status = "okay"; 228 assigned-clocks = <&clock CLK_MOUT_FIMC0>, 229 <&clock CLK_SCLK_FIMC0>; 230 assigned-clock-parents = <&clock CLK_SCLK_MPLL>; 231 assigned-clock-rates = <0>, <160000000>; 232}; 233 234&fimc_1 { 235 status = "okay"; 236 assigned-clocks = <&clock CLK_MOUT_FIMC1>, 237 <&clock CLK_SCLK_FIMC1>; 238 assigned-clock-parents = <&clock CLK_SCLK_MPLL>; 239 assigned-clock-rates = <0>, <160000000>; 240}; 241 242&fimc_2 { 243 status = "okay"; 244 assigned-clocks = <&clock CLK_MOUT_FIMC2>, 245 <&clock CLK_SCLK_FIMC2>; 246 assigned-clock-parents = <&clock CLK_SCLK_MPLL>; 247 assigned-clock-rates = <0>, <160000000>; 248}; 249 250&fimc_3 { 251 status = "okay"; 252 assigned-clocks = <&clock CLK_MOUT_FIMC3>, 253 <&clock CLK_SCLK_FIMC3>; 254 assigned-clock-parents = <&clock CLK_SCLK_MPLL>; 255 assigned-clock-rates = <0>, <160000000>; 256}; 257 258&fimd { 259 pinctrl-0 = <&lcd_clk>, <&lcd_data24>; 260 pinctrl-names = "default"; 261 status = "okay"; 262 samsung,invert-vden; 263 samsung,invert-vclk; 264 #address-cells = <1>; 265 #size-cells = <0>; 266 port@3 { 267 reg = <3>; 268 fimd_dpi_ep: endpoint { 269 remote-endpoint = <&lcd_ep>; 270 }; 271 }; 272}; 273 274&gpu { 275 mali-supply = <&buck2_reg>; 276 status = "okay"; 277}; 278 279&hdmi { 280 hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>; 281 pinctrl-names = "default"; 282 pinctrl-0 = <&hdmi_hpd>; 283 hdmi-en-supply = <&hdmi_en>; 284 vdd-supply = <&ldo3_reg>; 285 vdd_osc-supply = <&ldo4_reg>; 286 vdd_pll-supply = <&ldo3_reg>; 287 ddc = <&hdmi_ddc>; 288 status = "okay"; 289}; 290 291&hsotg { 292 vusb_d-supply = <&ldo3_reg>; 293 vusb_a-supply = <&ldo8_reg>; 294 dr_mode = "peripheral"; 295 status = "okay"; 296}; 297 298&i2c_3 { 299 samsung,i2c-sda-delay = <100>; 300 samsung,i2c-slave-addr = <0x10>; 301 samsung,i2c-max-bus-freq = <100000>; 302 pinctrl-0 = <&i2c3_bus>; 303 pinctrl-names = "default"; 304 status = "okay"; 305 306 tsp@4a { 307 /* TBD: Atmel maXtouch touchscreen */ 308 reg = <0x4a>; 309 }; 310}; 311 312&i2c_5 { 313 samsung,i2c-sda-delay = <100>; 314 samsung,i2c-slave-addr = <0x10>; 315 samsung,i2c-max-bus-freq = <100000>; 316 pinctrl-0 = <&i2c5_bus>; 317 pinctrl-names = "default"; 318 status = "okay"; 319 320 vdd_arm_reg: pmic@60 { 321 compatible = "maxim,max8952"; 322 reg = <0x60>; 323 324 max8952,vid-gpios = <&gpx0 3 GPIO_ACTIVE_HIGH>, 325 <&gpx0 4 GPIO_ACTIVE_HIGH>; 326 max8952,default-mode = <0>; 327 max8952,dvs-mode-microvolt = <1250000>, <1200000>, 328 <1050000>, <950000>; 329 max8952,sync-freq = <0>; 330 max8952,ramp-speed = <0>; 331 332 regulator-name = "VARM_1.2V_C210"; 333 regulator-min-microvolt = <770000>; 334 regulator-max-microvolt = <1400000>; 335 regulator-always-on; 336 regulator-boot-on; 337 }; 338 339 pmic@66 { 340 compatible = "national,lp3974"; 341 interrupts-extended = <&gpx0 7 0>, <&gpx2 7 0>; 342 pinctrl-names = "default"; 343 pinctrl-0 = <&lp3974_irq>; 344 reg = <0x66>; 345 346 max8998,pmic-buck1-default-dvs-idx = <0>; 347 max8998,pmic-buck1-dvs-gpios = <&gpx0 5 GPIO_ACTIVE_HIGH>, 348 <&gpx0 6 GPIO_ACTIVE_HIGH>; 349 max8998,pmic-buck1-dvs-voltage = <1100000>, <1000000>, 350 <1100000>, <1000000>; 351 352 max8998,pmic-buck2-default-dvs-idx = <0>; 353 max8998,pmic-buck2-dvs-gpio = <&gpe2 0 GPIO_ACTIVE_HIGH>; 354 max8998,pmic-buck2-dvs-voltage = <1200000>, <1100000>; 355 356 regulators { 357 ldo2_reg: LDO2 { 358 regulator-name = "VALIVE_1.2V"; 359 regulator-min-microvolt = <1200000>; 360 regulator-max-microvolt = <1200000>; 361 regulator-always-on; 362 }; 363 364 ldo3_reg: LDO3 { 365 regulator-name = "VUSB+MIPI_1.1V"; 366 regulator-min-microvolt = <1100000>; 367 regulator-max-microvolt = <1100000>; 368 regulator-always-on; 369 }; 370 371 ldo4_reg: LDO4 { 372 regulator-name = "VADC_3.3V"; 373 regulator-min-microvolt = <3300000>; 374 regulator-max-microvolt = <3300000>; 375 }; 376 377 ldo5_reg: LDO5 { 378 regulator-name = "VTF_2.8V"; 379 regulator-min-microvolt = <2800000>; 380 regulator-max-microvolt = <2800000>; 381 }; 382 383 ldo6_reg: LDO6 { 384 regulator-name = "LDO6"; 385 regulator-min-microvolt = <2000000>; 386 regulator-max-microvolt = <2000000>; 387 }; 388 389 ldo7_reg: LDO7 { 390 regulator-name = "VLCD+VMIPI_1.8V"; 391 regulator-min-microvolt = <1800000>; 392 regulator-max-microvolt = <1800000>; 393 }; 394 395 ldo8_reg: LDO8 { 396 regulator-name = "VUSB+VDAC_3.3V"; 397 regulator-min-microvolt = <3300000>; 398 regulator-max-microvolt = <3300000>; 399 regulator-always-on; 400 }; 401 402 ldo9_reg: LDO9 { 403 regulator-name = "VCC_2.8V"; 404 regulator-min-microvolt = <2800000>; 405 regulator-max-microvolt = <2800000>; 406 regulator-always-on; 407 }; 408 409 ldo10_reg: LDO10 { 410 regulator-name = "VPLL_1.1V"; 411 regulator-min-microvolt = <1100000>; 412 regulator-max-microvolt = <1100000>; 413 regulator-boot-on; 414 regulator-always-on; 415 }; 416 417 ldo11_reg: LDO11 { 418 regulator-name = "CAM_AF_3.3V"; 419 regulator-min-microvolt = <3300000>; 420 regulator-max-microvolt = <3300000>; 421 }; 422 423 ldo12_reg: LDO12 { 424 regulator-name = "PS_2.8V"; 425 regulator-min-microvolt = <2800000>; 426 regulator-max-microvolt = <2800000>; 427 }; 428 429 ldo13_reg: LDO13 { 430 regulator-name = "VHIC_1.2V"; 431 regulator-min-microvolt = <1200000>; 432 regulator-max-microvolt = <1200000>; 433 }; 434 435 ldo14_reg: LDO14 { 436 regulator-name = "CAM_I_HOST_1.8V"; 437 regulator-min-microvolt = <1800000>; 438 regulator-max-microvolt = <1800000>; 439 }; 440 441 ldo15_reg: LDO15 { 442 regulator-name = "CAM_S_DIG+FM33_CORE_1.2V"; 443 regulator-min-microvolt = <1200000>; 444 regulator-max-microvolt = <1200000>; 445 }; 446 447 ldo16_reg: LDO16 { 448 regulator-name = "CAM_S_ANA_2.8V"; 449 regulator-min-microvolt = <2800000>; 450 regulator-max-microvolt = <2800000>; 451 }; 452 453 ldo17_reg: LDO17 { 454 regulator-name = "VCC_3.0V_LCD"; 455 regulator-min-microvolt = <3000000>; 456 regulator-max-microvolt = <3000000>; 457 }; 458 459 buck1_reg: BUCK1 { 460 regulator-name = "VINT_1.1V"; 461 regulator-min-microvolt = <750000>; 462 regulator-max-microvolt = <1500000>; 463 regulator-boot-on; 464 regulator-always-on; 465 }; 466 467 buck2_reg: BUCK2 { 468 regulator-name = "VG3D_1.1V"; 469 regulator-min-microvolt = <750000>; 470 regulator-max-microvolt = <1500000>; 471 regulator-boot-on; 472 }; 473 474 buck3_reg: BUCK3 { 475 regulator-name = "VCC_1.8V"; 476 regulator-min-microvolt = <1800000>; 477 regulator-max-microvolt = <1800000>; 478 regulator-always-on; 479 }; 480 481 buck4_reg: BUCK4 { 482 regulator-name = "VMEM_1.2V"; 483 regulator-min-microvolt = <1200000>; 484 regulator-max-microvolt = <1200000>; 485 regulator-always-on; 486 }; 487 488 ap32khz_reg: EN32KHz-AP { 489 regulator-name = "32KHz AP"; 490 regulator-always-on; 491 }; 492 493 cp32khz_reg: EN32KHz-CP { 494 regulator-name = "32KHz CP"; 495 }; 496 497 vichg_reg: ENVICHG { 498 regulator-name = "VICHG"; 499 }; 500 501 safeout1_reg: ESAFEOUT1 { 502 regulator-name = "SAFEOUT1"; 503 }; 504 505 safeout2_reg: ESAFEOUT2 { 506 regulator-name = "SAFEOUT2"; 507 regulator-boot-on; 508 }; 509 }; 510 }; 511}; 512 513&i2c_8 { 514 status = "okay"; 515}; 516 517&mct { 518 compatible = "none"; 519}; 520 521&mdma1 { 522 /* Use the secure mdma0 */ 523 status = "disabled"; 524}; 525 526&mixer { 527 status = "okay"; 528}; 529 530&ohci { 531 status = "okay"; 532}; 533 534&pinctrl_1 { 535 lp3974_irq: lp3974-irq { 536 samsung,pins = "gpx0-7", "gpx2-7"; 537 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 538 }; 539 540 hdmi_hpd: hdmi-hpd { 541 samsung,pins = "gpx3-7"; 542 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 543 }; 544}; 545 546&pinctrl_0 { 547 i2c_ddc_bus: i2c-ddc-bus { 548 samsung,pins = "gpe4-2", "gpe4-3"; 549 samsung,pin-function = <EXYNOS_PIN_FUNC_2>; 550 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 551 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; 552 }; 553}; 554 555&pwm { 556 compatible = "samsung,s5p6440-pwm"; 557 status = "okay"; 558}; 559 560&rtc { 561 status = "okay"; 562 clocks = <&clock CLK_RTC>, <&pmic_ap_clk>; 563 clock-names = "rtc", "rtc_src"; 564}; 565 566&sdhci_0 { 567 bus-width = <8>; 568 non-removable; 569 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus8>; 570 pinctrl-names = "default"; 571 vmmc-supply = <&vemmc_reg>; 572 status = "okay"; 573}; 574 575&sdhci_2 { 576 bus-width = <4>; 577 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>; 578 pinctrl-names = "default"; 579 vmmc-supply = <&ldo5_reg>; 580 cd-gpios = <&gpx3 4 GPIO_ACTIVE_LOW>; 581 status = "okay"; 582}; 583 584&sdhci_3 { 585 status = "okay"; 586 587 #address-cells = <1>; 588 #size-cells = <0>; 589 590 non-removable; 591 bus-width = <4>; 592 mmc-pwrseq = <&wlan_pwrseq>; 593 vmmc-supply = <&ldo5_reg>; 594 595 pinctrl-names = "default"; 596 pinctrl-0 = <&sd3_clk>, <&sd3_cmd>, <&sd3_bus4>; 597 598 brcmf: wifi@1 { 599 compatible = "brcm,bcm4330-fmac"; 600 reg = <1>; 601 interrupt-parent = <&gpx2>; 602 interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; 603 interrupt-names = "host-wake"; 604 }; 605}; 606 607&serial_0 { 608 status = "okay"; 609 /delete-property/dmas; 610 /delete-property/dma-names; 611}; 612 613&serial_1 { 614 status = "okay"; 615 /delete-property/dmas; 616 /delete-property/dma-names; 617}; 618 619&serial_2 { 620 status = "okay"; 621 /delete-property/dmas; 622 /delete-property/dma-names; 623}; 624 625&serial_3 { 626 status = "okay"; 627 /delete-property/dmas; 628 /delete-property/dma-names; 629}; 630 631&soc { 632 mdma0: mdma@12840000 { 633 compatible = "arm,pl330", "arm,primecell"; 634 reg = <0x12840000 0x1000>; 635 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; 636 clocks = <&clock CLK_MDMA>; 637 clock-names = "apb_pclk"; 638 #dma-cells = <1>; 639 #dma-channels = <8>; 640 #dma-requests = <1>; 641 power-domains = <&pd_lcd0>; 642 }; 643}; 644 645&sysram { 646 smp-sram@0 { 647 status = "disabled"; 648 }; 649 650 smp-sram@5000 { 651 compatible = "samsung,exynos4210-sysram"; 652 reg = <0x5000 0x1000>; 653 }; 654 655 smp-sram@1f000 { 656 status = "disabled"; 657 }; 658}; 659