1// SPDX-License-Identifier: (GPL-2.0+) 2/* 3 * Copyright (C) 2015 DH electronics GmbH 4 * Copyright (C) 2018 Marek Vasut <marex@denx.de> 5 */ 6 7#include "imx6q.dtsi" 8#include <dt-bindings/pwm/pwm.h> 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/clock/imx6qdl-clock.h> 11#include <dt-bindings/input/input.h> 12 13/ { 14 aliases { 15 mmc0 = &usdhc2; 16 mmc1 = &usdhc3; 17 mmc2 = &usdhc4; 18 mmc3 = &usdhc1; 19 }; 20 21 memory@10000000 { 22 device_type = "memory"; 23 reg = <0x10000000 0x40000000>; 24 }; 25 26 reg_usb_otg_vbus: regulator-usb-otg-vbus { 27 compatible = "regulator-fixed"; 28 regulator-name = "usb_otg_vbus"; 29 regulator-min-microvolt = <5000000>; 30 regulator-max-microvolt = <5000000>; 31 }; 32 33 reg_usb_h1_vbus: regulator-usb-h1-vbus { 34 compatible = "regulator-fixed"; 35 regulator-name = "usb_h1_vbus"; 36 regulator-min-microvolt = <5000000>; 37 regulator-max-microvolt = <5000000>; 38 gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>; 39 enable-active-high; 40 }; 41 42 reg_3p3v: regulator-3P3V { 43 compatible = "regulator-fixed"; 44 regulator-name = "3P3V"; 45 regulator-min-microvolt = <3300000>; 46 regulator-max-microvolt = <3300000>; 47 regulator-always-on; 48 }; 49}; 50 51&can1 { 52 pinctrl-names = "default"; 53 pinctrl-0 = <&pinctrl_flexcan1>; 54}; 55 56&can2 { 57 pinctrl-names = "default"; 58 pinctrl-0 = <&pinctrl_flexcan2>; 59}; 60 61&ecspi1 { 62 cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>, <&gpio4 11 GPIO_ACTIVE_LOW>; 63 pinctrl-names = "default"; 64 pinctrl-0 = <&pinctrl_ecspi1>; 65 status = "okay"; 66 67 flash@0 { /* S25FL116K */ 68 #address-cells = <1>; 69 #size-cells = <1>; 70 compatible = "jedec,spi-nor"; 71 spi-max-frequency = <50000000>; 72 reg = <0>; 73 m25p,fast-read; 74 }; 75}; 76 77&ecspi2 { 78 cs-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>; 79 pinctrl-names = "default"; 80 pinctrl-0 = <&pinctrl_ecspi2>; 81 status = "okay"; 82}; 83 84&fec { 85 pinctrl-names = "default"; 86 pinctrl-0 = <&pinctrl_enet_100M>; 87 phy-mode = "rmii"; 88 phy-handle = <ðphy0>; 89 status = "okay"; 90 91 mdio { 92 #address-cells = <1>; 93 #size-cells = <0>; 94 95 ethphy0: ethernet-phy@0 { /* SMSC LAN8710Ai */ 96 reg = <0>; 97 max-speed = <100>; 98 reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; 99 reset-assert-us = <1000>; 100 reset-deassert-us = <1000>; 101 smsc,disable-energy-detect; /* Make plugin detection reliable */ 102 }; 103 }; 104}; 105 106&i2c1 { 107 clock-frequency = <100000>; 108 pinctrl-names = "default", "gpio"; 109 pinctrl-0 = <&pinctrl_i2c1>; 110 pinctrl-1 = <&pinctrl_i2c1_gpio>; 111 scl-gpios = <&gpio3 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 112 sda-gpios = <&gpio3 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 113 status = "okay"; 114}; 115 116&i2c2 { 117 clock-frequency = <100000>; 118 pinctrl-names = "default", "gpio"; 119 pinctrl-0 = <&pinctrl_i2c2>; 120 pinctrl-1 = <&pinctrl_i2c2_gpio>; 121 scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 122 sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 123 status = "okay"; 124}; 125 126&i2c3 { 127 clock-frequency = <100000>; 128 pinctrl-names = "default", "gpio"; 129 pinctrl-0 = <&pinctrl_i2c3>; 130 pinctrl-1 = <&pinctrl_i2c3_gpio>; 131 scl-gpios = <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 132 sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 133 status = "okay"; 134 135 ltc3676: pmic@3c { 136 compatible = "lltc,ltc3676"; 137 pinctrl-names = "default"; 138 pinctrl-0 = <&pinctrl_pmic_hw300>; 139 reg = <0x3c>; 140 interrupt-parent = <&gpio5>; 141 interrupts = <2 IRQ_TYPE_EDGE_FALLING>; 142 143 regulators { 144 sw1_reg: sw1 { 145 regulator-min-microvolt = <787500>; 146 regulator-max-microvolt = <1527272>; 147 lltc,fb-voltage-divider = <100000 110000>; 148 regulator-suspend-mem-microvolt = <1040000>; 149 regulator-ramp-delay = <7000>; 150 regulator-boot-on; 151 regulator-always-on; 152 }; 153 154 sw2_reg: sw2 { 155 regulator-min-microvolt = <1885714>; 156 regulator-max-microvolt = <3657142>; 157 lltc,fb-voltage-divider = <100000 28000>; 158 regulator-ramp-delay = <7000>; 159 regulator-boot-on; 160 regulator-always-on; 161 }; 162 163 sw3_reg: sw3 { 164 regulator-min-microvolt = <787500>; 165 regulator-max-microvolt = <1527272>; 166 lltc,fb-voltage-divider = <100000 110000>; 167 regulator-suspend-mem-microvolt = <980000>; 168 regulator-ramp-delay = <7000>; 169 regulator-boot-on; 170 regulator-always-on; 171 }; 172 173 sw4_reg: sw4 { 174 regulator-min-microvolt = <855571>; 175 regulator-max-microvolt = <1659291>; 176 lltc,fb-voltage-divider = <100000 93100>; 177 regulator-ramp-delay = <7000>; 178 regulator-boot-on; 179 regulator-always-on; 180 }; 181 182 ldo1_reg: ldo1 { 183 regulator-min-microvolt = <3240306>; 184 regulator-max-microvolt = <3240306>; 185 lltc,fb-voltage-divider = <102000 29400>; 186 regulator-boot-on; 187 regulator-always-on; 188 }; 189 190 ldo2_reg: ldo2 { 191 regulator-min-microvolt = <2484708>; 192 regulator-max-microvolt = <2484708>; 193 lltc,fb-voltage-divider = <100000 41200>; 194 regulator-boot-on; 195 regulator-always-on; 196 }; 197 }; 198 }; 199 200 touchscreen@49 { /* TSC2004 */ 201 compatible = "ti,tsc2004"; 202 reg = <0x49>; 203 vio-supply = <®_3p3v>; 204 pinctrl-names = "default"; 205 pinctrl-0 = <&pinctrl_tsc2004_hw300>; 206 interrupts-extended = <&gpio4 14 IRQ_TYPE_EDGE_FALLING>; 207 status = "disabled"; 208 }; 209 210 eeprom@50 { 211 compatible = "atmel,24c02"; 212 reg = <0x50>; 213 pagesize = <16>; 214 }; 215 216 rtc@56 { 217 compatible = "microcrystal,rv3029"; 218 pinctrl-names = "default"; 219 pinctrl-0 = <&pinctrl_rtc_hw300>; 220 reg = <0x56>; 221 interrupt-parent = <&gpio7>; 222 interrupts = <12 2>; 223 }; 224}; 225 226&iomuxc { 227 pinctrl-names = "default"; 228 pinctrl-0 = <&pinctrl_hog_base>; 229 230 pinctrl_hog_base: hog-base-grp { 231 fsl,pins = < 232 MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x120b0 233 MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x120b0 234 MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x120b0 235 MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x120b0 236 MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x120b0 237 >; 238 }; 239 240 pinctrl_ecspi1: ecspi1-grp { 241 fsl,pins = < 242 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 243 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 244 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 245 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0 246 MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0 247 >; 248 }; 249 250 pinctrl_ecspi2: ecspi2-grp { 251 fsl,pins = < 252 MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO 0x100b1 253 MX6QDL_PAD_CSI0_DAT9__ECSPI2_MOSI 0x100b1 254 MX6QDL_PAD_CSI0_DAT8__ECSPI2_SCLK 0x100b1 255 MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29 0x1b0b0 256 >; 257 }; 258 259 pinctrl_enet_100M: enet-100M-grp { 260 fsl,pins = < 261 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 262 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 263 MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0 264 MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0 265 MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0 266 MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0 267 MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 268 MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0 269 MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0 270 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 271 MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x000b0 272 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x000b1 273 MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x120b0 274 >; 275 }; 276 277 pinctrl_flexcan1: flexcan1-grp { 278 fsl,pins = < 279 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0 280 MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0 281 >; 282 }; 283 284 pinctrl_flexcan2: flexcan2-grp { 285 fsl,pins = < 286 MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX 0x1b0b0 287 MX6QDL_PAD_SD3_DAT1__FLEXCAN2_RX 0x1b0b0 288 >; 289 }; 290 291 pinctrl_i2c1: i2c1-grp { 292 fsl,pins = < 293 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 294 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 295 >; 296 }; 297 298 pinctrl_i2c1_gpio: i2c1-gpio-grp { 299 fsl,pins = < 300 MX6QDL_PAD_EIM_D21__GPIO3_IO21 0x4001b8b1 301 MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x4001b8b1 302 >; 303 }; 304 305 pinctrl_i2c2: i2c2-grp { 306 fsl,pins = < 307 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 308 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 309 >; 310 }; 311 312 pinctrl_i2c2_gpio: i2c2-gpio-grp { 313 fsl,pins = < 314 MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x4001b8b1 315 MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x4001b8b1 316 >; 317 }; 318 319 pinctrl_i2c3: i2c3-grp { 320 fsl,pins = < 321 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 322 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 323 >; 324 }; 325 326 pinctrl_i2c3_gpio: i2c3-gpio-grp { 327 fsl,pins = < 328 MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x4001b8b1 329 MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x4001b8b1 330 >; 331 }; 332 333 pinctrl_pmic_hw300: pmic-hw300-grp { 334 fsl,pins = < 335 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1B0B0 336 >; 337 }; 338 339 pinctrl_rtc_hw300: rtc-hw300-grp { 340 fsl,pins = < 341 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x120B0 342 >; 343 }; 344 345 pinctrl_tsc2004_hw300: tsc2004-hw300-grp { 346 fsl,pins = < 347 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x120B0 348 >; 349 }; 350 351 pinctrl_uart1: uart1-grp { 352 fsl,pins = < 353 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 354 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 355 MX6QDL_PAD_EIM_D20__UART1_RTS_B 0x1b0b1 356 MX6QDL_PAD_EIM_D19__UART1_CTS_B 0x4001b0b1 357 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x4001b0b1 358 MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x4001b0b1 359 MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x4001b0b1 360 MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x4001b0b1 361 >; 362 }; 363 364 pinctrl_uart4: uart4-grp { 365 fsl,pins = < 366 MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1 367 MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1 368 >; 369 }; 370 371 pinctrl_uart5: uart5-grp { 372 fsl,pins = < 373 MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA 0x1b0b1 374 MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA 0x1b0b1 375 MX6QDL_PAD_CSI0_DAT18__UART5_RTS_B 0x1b0b1 376 MX6QDL_PAD_CSI0_DAT19__UART5_CTS_B 0x4001b0b1 377 >; 378 }; 379 380 pinctrl_usbh1: usbh1-grp { 381 fsl,pins = < 382 MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x120B0 383 >; 384 }; 385 386 pinctrl_usbotg: usbotg-grp { 387 fsl,pins = < 388 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 389 >; 390 }; 391 392 pinctrl_usdhc2: usdhc2-grp { 393 fsl,pins = < 394 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 395 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 396 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 397 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 398 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 399 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 400 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x120B0 401 >; 402 }; 403 404 pinctrl_usdhc3: usdhc3-grp { 405 fsl,pins = < 406 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 407 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 408 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 409 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 410 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 411 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 412 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x120B0 413 >; 414 }; 415 416 pinctrl_usdhc4: usdhc4-grp { 417 fsl,pins = < 418 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 419 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 420 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 421 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 422 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 423 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 424 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 425 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 426 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 427 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 428 >; 429 }; 430}; 431 432®_arm { 433 vin-supply = <&sw3_reg>; 434}; 435 436®_soc { 437 vin-supply = <&sw1_reg>; 438}; 439 440®_pu { 441 vin-supply = <&sw1_reg>; 442}; 443 444®_vdd1p1 { 445 vin-supply = <&sw2_reg>; 446}; 447 448®_vdd2p5 { 449 vin-supply = <&sw2_reg>; 450}; 451 452&uart1 { 453 pinctrl-names = "default"; 454 pinctrl-0 = <&pinctrl_uart1>; 455 uart-has-rtscts; 456 dtr-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>; 457 dsr-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>; 458 dcd-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>; 459 rng-gpios = <&gpio2 31 GPIO_ACTIVE_LOW>; 460 status = "okay"; 461}; 462 463&uart4 { 464 pinctrl-names = "default"; 465 pinctrl-0 = <&pinctrl_uart4>; 466 status = "okay"; 467}; 468 469&uart5 { 470 pinctrl-names = "default"; 471 pinctrl-0 = <&pinctrl_uart5>; 472 uart-has-rtscts; 473 status = "okay"; 474}; 475 476&usbh1 { 477 pinctrl-names = "default"; 478 pinctrl-0 = <&pinctrl_usbh1>; 479 vbus-supply = <®_usb_h1_vbus>; 480 dr_mode = "host"; 481 status = "okay"; 482}; 483 484&usbotg { 485 vbus-supply = <®_usb_otg_vbus>; 486 pinctrl-names = "default"; 487 pinctrl-0 = <&pinctrl_usbotg>; 488 disable-over-current; 489 dr_mode = "otg"; 490 status = "okay"; 491}; 492 493&usdhc2 { 494 pinctrl-names = "default"; 495 pinctrl-0 = <&pinctrl_usdhc2>; 496 cd-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>; 497 keep-power-in-suspend; 498 status = "okay"; 499}; 500 501&usdhc3 { 502 pinctrl-names = "default"; 503 pinctrl-0 = <&pinctrl_usdhc3>; 504 cd-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>; 505 fsl,wp-controller; 506 keep-power-in-suspend; 507 status = "disabled"; 508}; 509 510&usdhc4 { 511 pinctrl-names = "default"; 512 pinctrl-0 = <&pinctrl_usdhc4>; 513 non-removable; 514 bus-width = <8>; 515 no-1-8-v; 516 keep-power-in-suspend; 517 status = "okay"; 518}; 519