1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * Copyright (c) 2013 Samsung Electronics Co., Ltd. 4 * http://www.samsung.com 5 * 6 * Exynos low-level resume code 7 */ 8 9#include <linux/linkage.h> 10#include <asm/asm-offsets.h> 11#include <asm/assembler.h> 12#include <asm/hardware/cache-l2x0.h> 13#include "smc.h" 14 15#define CPU_MASK 0xff0ffff0 16#define CPU_CORTEX_A9 0x410fc090 17 18 .text 19 .align 20 21 /* 22 * sleep magic, to allow the bootloader to check for an valid 23 * image to resume to. Must be the first word before the 24 * exynos_cpu_resume entry. 25 */ 26 27 .word 0x2bedf00d 28 29 /* 30 * exynos_cpu_resume 31 * 32 * resume code entry for bootloader to call 33 */ 34 35ENTRY(exynos_cpu_resume) 36#ifdef CONFIG_CACHE_L2X0 37 mrc p15, 0, r0, c0, c0, 0 38 ldr r1, =CPU_MASK 39 and r0, r0, r1 40 ldr r1, =CPU_CORTEX_A9 41 cmp r0, r1 42 bleq l2c310_early_resume 43#endif 44 b cpu_resume 45ENDPROC(exynos_cpu_resume) 46 47 .align 48 .arch armv7-a 49 .arch_extension sec 50ENTRY(exynos_cpu_resume_ns) 51 mrc p15, 0, r0, c0, c0, 0 52 ldr r1, =CPU_MASK 53 and r0, r0, r1 54 ldr r1, =CPU_CORTEX_A9 55 cmp r0, r1 56 bne skip_cp15 57 58 ldr_l r1, cp15_save_power 59 ldr_l r2, cp15_save_diag 60 mov r0, #SMC_CMD_C15RESUME 61 dsb 62 smc #0 63#ifdef CONFIG_CACHE_L2X0 64 adr_l r0, l2x0_saved_regs 65 66 /* Check that the address has been initialised. */ 67 ldr r1, [r0, #L2X0_R_PHY_BASE] 68 teq r1, #0 69 beq skip_l2x0 70 71 /* Check if controller has been enabled. */ 72 ldr r2, [r1, #L2X0_CTRL] 73 tst r2, #0x1 74 bne skip_l2x0 75 76 ldr r1, [r0, #L2X0_R_TAG_LATENCY] 77 ldr r2, [r0, #L2X0_R_DATA_LATENCY] 78 ldr r3, [r0, #L2X0_R_PREFETCH_CTRL] 79 mov r0, #SMC_CMD_L2X0SETUP1 80 smc #0 81 82 /* Reload saved regs pointer because smc corrupts registers. */ 83 adr_l r0, l2x0_saved_regs 84 85 ldr r1, [r0, #L2X0_R_PWR_CTRL] 86 ldr r2, [r0, #L2X0_R_AUX_CTRL] 87 mov r0, #SMC_CMD_L2X0SETUP2 88 smc #0 89 90 mov r0, #SMC_CMD_L2X0INVALL 91 smc #0 92 93 mov r1, #1 94 mov r0, #SMC_CMD_L2X0CTRL 95 smc #0 96skip_l2x0: 97#endif /* CONFIG_CACHE_L2X0 */ 98skip_cp15: 99 b cpu_resume 100ENDPROC(exynos_cpu_resume_ns) 101 102 .data 103 .align 2 104 .globl cp15_save_diag 105cp15_save_diag: 106 .long 0 @ cp15 diagnostic 107 .globl cp15_save_power 108cp15_save_power: 109 .long 0 @ cp15 power control 110