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1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Compatibility mode system call entry point for x86-64.
4 *
5 * Copyright 2000-2002 Andi Kleen, SuSE Labs.
6 */
7#include <asm/asm-offsets.h>
8#include <asm/current.h>
9#include <asm/errno.h>
10#include <asm/ia32_unistd.h>
11#include <asm/thread_info.h>
12#include <asm/segment.h>
13#include <asm/irqflags.h>
14#include <asm/asm.h>
15#include <asm/smap.h>
16#include <asm/nospec-branch.h>
17#include <linux/linkage.h>
18#include <linux/err.h>
19
20#include "calling.h"
21
22	.section .entry.text, "ax"
23
24/*
25 * 32-bit SYSENTER entry.
26 *
27 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
28 * on 64-bit kernels running on Intel CPUs.
29 *
30 * The SYSENTER instruction, in principle, should *only* occur in the
31 * vDSO.  In practice, a small number of Android devices were shipped
32 * with a copy of Bionic that inlined a SYSENTER instruction.  This
33 * never happened in any of Google's Bionic versions -- it only happened
34 * in a narrow range of Intel-provided versions.
35 *
36 * SYSENTER loads SS, RSP, CS, and RIP from previously programmed MSRs.
37 * IF and VM in RFLAGS are cleared (IOW: interrupts are off).
38 * SYSENTER does not save anything on the stack,
39 * and does not save old RIP (!!!), RSP, or RFLAGS.
40 *
41 * Arguments:
42 * eax  system call number
43 * ebx  arg1
44 * ecx  arg2
45 * edx  arg3
46 * esi  arg4
47 * edi  arg5
48 * ebp  user stack
49 * 0(%ebp) arg6
50 */
51SYM_CODE_START(entry_SYSENTER_compat)
52	UNWIND_HINT_ENTRY
53	/* Interrupts are off on entry. */
54	SWAPGS
55
56	pushq	%rax
57	SWITCH_TO_KERNEL_CR3 scratch_reg=%rax
58	popq	%rax
59
60	movq	PER_CPU_VAR(cpu_current_top_of_stack), %rsp
61
62	/* Construct struct pt_regs on stack */
63	pushq	$__USER32_DS		/* pt_regs->ss */
64	pushq	$0			/* pt_regs->sp = 0 (placeholder) */
65
66	/*
67	 * Push flags.  This is nasty.  First, interrupts are currently
68	 * off, but we need pt_regs->flags to have IF set.  Second, if TS
69	 * was set in usermode, it's still set, and we're singlestepping
70	 * through this code.  do_SYSENTER_32() will fix up IF.
71	 */
72	pushfq				/* pt_regs->flags (except IF = 0) */
73	pushq	$__USER32_CS		/* pt_regs->cs */
74	pushq	$0			/* pt_regs->ip = 0 (placeholder) */
75SYM_INNER_LABEL(entry_SYSENTER_compat_after_hwframe, SYM_L_GLOBAL)
76
77	/*
78	 * User tracing code (ptrace or signal handlers) might assume that
79	 * the saved RAX contains a 32-bit number when we're invoking a 32-bit
80	 * syscall.  Just in case the high bits are nonzero, zero-extend
81	 * the syscall number.  (This could almost certainly be deleted
82	 * with no ill effects.)
83	 */
84	movl	%eax, %eax
85
86	pushq	%rax			/* pt_regs->orig_ax */
87	pushq	%rdi			/* pt_regs->di */
88	pushq	%rsi			/* pt_regs->si */
89	pushq	%rdx			/* pt_regs->dx */
90	pushq	%rcx			/* pt_regs->cx */
91	pushq	$-ENOSYS		/* pt_regs->ax */
92	pushq   $0			/* pt_regs->r8  = 0 */
93	xorl	%r8d, %r8d		/* nospec   r8 */
94	pushq   $0			/* pt_regs->r9  = 0 */
95	xorl	%r9d, %r9d		/* nospec   r9 */
96	pushq   $0			/* pt_regs->r10 = 0 */
97	xorl	%r10d, %r10d		/* nospec   r10 */
98	pushq   $0			/* pt_regs->r11 = 0 */
99	xorl	%r11d, %r11d		/* nospec   r11 */
100	pushq   %rbx                    /* pt_regs->rbx */
101	xorl	%ebx, %ebx		/* nospec   rbx */
102	pushq   %rbp                    /* pt_regs->rbp (will be overwritten) */
103	xorl	%ebp, %ebp		/* nospec   rbp */
104	pushq   $0			/* pt_regs->r12 = 0 */
105	xorl	%r12d, %r12d		/* nospec   r12 */
106	pushq   $0			/* pt_regs->r13 = 0 */
107	xorl	%r13d, %r13d		/* nospec   r13 */
108	pushq   $0			/* pt_regs->r14 = 0 */
109	xorl	%r14d, %r14d		/* nospec   r14 */
110	pushq   $0			/* pt_regs->r15 = 0 */
111	xorl	%r15d, %r15d		/* nospec   r15 */
112
113	UNWIND_HINT_REGS
114
115	cld
116
117	IBRS_ENTER
118	UNTRAIN_RET
119
120	/*
121	 * SYSENTER doesn't filter flags, so we need to clear NT and AC
122	 * ourselves.  To save a few cycles, we can check whether
123	 * either was set instead of doing an unconditional popfq.
124	 * This needs to happen before enabling interrupts so that
125	 * we don't get preempted with NT set.
126	 *
127	 * If TF is set, we will single-step all the way to here -- do_debug
128	 * will ignore all the traps.  (Yes, this is slow, but so is
129	 * single-stepping in general.  This allows us to avoid having
130	 * a more complicated code to handle the case where a user program
131	 * forces us to single-step through the SYSENTER entry code.)
132	 *
133	 * NB.: .Lsysenter_fix_flags is a label with the code under it moved
134	 * out-of-line as an optimization: NT is unlikely to be set in the
135	 * majority of the cases and instead of polluting the I$ unnecessarily,
136	 * we're keeping that code behind a branch which will predict as
137	 * not-taken and therefore its instructions won't be fetched.
138	 */
139	testl	$X86_EFLAGS_NT|X86_EFLAGS_AC|X86_EFLAGS_TF, EFLAGS(%rsp)
140	jnz	.Lsysenter_fix_flags
141.Lsysenter_flags_fixed:
142
143	movq	%rsp, %rdi
144	call	do_SYSENTER_32
145	/* XEN PV guests always use IRET path */
146	ALTERNATIVE "testl %eax, %eax; jz swapgs_restore_regs_and_return_to_usermode", \
147		    "jmp swapgs_restore_regs_and_return_to_usermode", X86_FEATURE_XENPV
148	jmp	sysret32_from_system_call
149
150.Lsysenter_fix_flags:
151	pushq	$X86_EFLAGS_FIXED
152	popfq
153	jmp	.Lsysenter_flags_fixed
154SYM_INNER_LABEL(__end_entry_SYSENTER_compat, SYM_L_GLOBAL)
155SYM_CODE_END(entry_SYSENTER_compat)
156
157/*
158 * 32-bit SYSCALL entry.
159 *
160 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
161 * on 64-bit kernels running on AMD CPUs.
162 *
163 * The SYSCALL instruction, in principle, should *only* occur in the
164 * vDSO.  In practice, it appears that this really is the case.
165 * As evidence:
166 *
167 *  - The calling convention for SYSCALL has changed several times without
168 *    anyone noticing.
169 *
170 *  - Prior to the in-kernel X86_BUG_SYSRET_SS_ATTRS fixup, anything
171 *    user task that did SYSCALL without immediately reloading SS
172 *    would randomly crash.
173 *
174 *  - Most programmers do not directly target AMD CPUs, and the 32-bit
175 *    SYSCALL instruction does not exist on Intel CPUs.  Even on AMD
176 *    CPUs, Linux disables the SYSCALL instruction on 32-bit kernels
177 *    because the SYSCALL instruction in legacy/native 32-bit mode (as
178 *    opposed to compat mode) is sufficiently poorly designed as to be
179 *    essentially unusable.
180 *
181 * 32-bit SYSCALL saves RIP to RCX, clears RFLAGS.RF, then saves
182 * RFLAGS to R11, then loads new SS, CS, and RIP from previously
183 * programmed MSRs.  RFLAGS gets masked by a value from another MSR
184 * (so CLD and CLAC are not needed).  SYSCALL does not save anything on
185 * the stack and does not change RSP.
186 *
187 * Note: RFLAGS saving+masking-with-MSR happens only in Long mode
188 * (in legacy 32-bit mode, IF, RF and VM bits are cleared and that's it).
189 * Don't get confused: RFLAGS saving+masking depends on Long Mode Active bit
190 * (EFER.LMA=1), NOT on bitness of userspace where SYSCALL executes
191 * or target CS descriptor's L bit (SYSCALL does not read segment descriptors).
192 *
193 * Arguments:
194 * eax  system call number
195 * ecx  return address
196 * ebx  arg1
197 * ebp  arg2	(note: not saved in the stack frame, should not be touched)
198 * edx  arg3
199 * esi  arg4
200 * edi  arg5
201 * esp  user stack
202 * 0(%esp) arg6
203 */
204SYM_CODE_START(entry_SYSCALL_compat)
205	UNWIND_HINT_ENTRY
206	/* Interrupts are off on entry. */
207	swapgs
208
209	/* Stash user ESP */
210	movl	%esp, %r8d
211
212	/* Use %rsp as scratch reg. User ESP is stashed in r8 */
213	SWITCH_TO_KERNEL_CR3 scratch_reg=%rsp
214
215	/* Switch to the kernel stack */
216	movq	PER_CPU_VAR(cpu_current_top_of_stack), %rsp
217
218SYM_INNER_LABEL(entry_SYSCALL_compat_safe_stack, SYM_L_GLOBAL)
219
220	/* Construct struct pt_regs on stack */
221	pushq	$__USER32_DS		/* pt_regs->ss */
222	pushq	%r8			/* pt_regs->sp */
223	pushq	%r11			/* pt_regs->flags */
224	pushq	$__USER32_CS		/* pt_regs->cs */
225	pushq	%rcx			/* pt_regs->ip */
226SYM_INNER_LABEL(entry_SYSCALL_compat_after_hwframe, SYM_L_GLOBAL)
227	movl	%eax, %eax		/* discard orig_ax high bits */
228	pushq	%rax			/* pt_regs->orig_ax */
229	pushq	%rdi			/* pt_regs->di */
230	pushq	%rsi			/* pt_regs->si */
231	xorl	%esi, %esi		/* nospec   si */
232	pushq	%rdx			/* pt_regs->dx */
233	xorl	%edx, %edx		/* nospec   dx */
234	pushq	%rbp			/* pt_regs->cx (stashed in bp) */
235	xorl	%ecx, %ecx		/* nospec   cx */
236	pushq	$-ENOSYS		/* pt_regs->ax */
237	pushq   $0			/* pt_regs->r8  = 0 */
238	xorl	%r8d, %r8d		/* nospec   r8 */
239	pushq   $0			/* pt_regs->r9  = 0 */
240	xorl	%r9d, %r9d		/* nospec   r9 */
241	pushq   $0			/* pt_regs->r10 = 0 */
242	xorl	%r10d, %r10d		/* nospec   r10 */
243	pushq   $0			/* pt_regs->r11 = 0 */
244	xorl	%r11d, %r11d		/* nospec   r11 */
245	pushq   %rbx                    /* pt_regs->rbx */
246	xorl	%ebx, %ebx		/* nospec   rbx */
247	pushq   %rbp                    /* pt_regs->rbp (will be overwritten) */
248	xorl	%ebp, %ebp		/* nospec   rbp */
249	pushq   $0			/* pt_regs->r12 = 0 */
250	xorl	%r12d, %r12d		/* nospec   r12 */
251	pushq   $0			/* pt_regs->r13 = 0 */
252	xorl	%r13d, %r13d		/* nospec   r13 */
253	pushq   $0			/* pt_regs->r14 = 0 */
254	xorl	%r14d, %r14d		/* nospec   r14 */
255	pushq   $0			/* pt_regs->r15 = 0 */
256	xorl	%r15d, %r15d		/* nospec   r15 */
257
258	UNWIND_HINT_REGS
259
260	IBRS_ENTER
261	UNTRAIN_RET
262
263	movq	%rsp, %rdi
264	call	do_fast_syscall_32
265	/* XEN PV guests always use IRET path */
266	ALTERNATIVE "testl %eax, %eax; jz swapgs_restore_regs_and_return_to_usermode", \
267		    "jmp swapgs_restore_regs_and_return_to_usermode", X86_FEATURE_XENPV
268
269	/* Opportunistic SYSRET */
270sysret32_from_system_call:
271	/*
272	 * We are not going to return to userspace from the trampoline
273	 * stack. So let's erase the thread stack right now.
274	 */
275	STACKLEAK_ERASE
276
277	IBRS_EXIT
278
279	movq	RBX(%rsp), %rbx		/* pt_regs->rbx */
280	movq	RBP(%rsp), %rbp		/* pt_regs->rbp */
281	movq	EFLAGS(%rsp), %r11	/* pt_regs->flags (in r11) */
282	movq	RIP(%rsp), %rcx		/* pt_regs->ip (in rcx) */
283	addq	$RAX, %rsp		/* Skip r8-r15 */
284	popq	%rax			/* pt_regs->rax */
285	popq	%rdx			/* Skip pt_regs->cx */
286	popq	%rdx			/* pt_regs->dx */
287	popq	%rsi			/* pt_regs->si */
288	popq	%rdi			/* pt_regs->di */
289
290        /*
291         * USERGS_SYSRET32 does:
292         *  GSBASE = user's GS base
293         *  EIP = ECX
294         *  RFLAGS = R11
295         *  CS = __USER32_CS
296         *  SS = __USER_DS
297         *
298	 * ECX will not match pt_regs->cx, but we're returning to a vDSO
299	 * trampoline that will fix up RCX, so this is okay.
300	 *
301	 * R12-R15 are callee-saved, so they contain whatever was in them
302	 * when the system call started, which is already known to user
303	 * code.  We zero R8-R10 to avoid info leaks.
304         */
305	movq	RSP-ORIG_RAX(%rsp), %rsp
306
307	/*
308	 * The original userspace %rsp (RSP-ORIG_RAX(%rsp)) is stored
309	 * on the process stack which is not mapped to userspace and
310	 * not readable after we SWITCH_TO_USER_CR3.  Delay the CR3
311	 * switch until after after the last reference to the process
312	 * stack.
313	 *
314	 * %r8/%r9 are zeroed before the sysret, thus safe to clobber.
315	 */
316	SWITCH_TO_USER_CR3_NOSTACK scratch_reg=%r8 scratch_reg2=%r9
317
318	xorl	%r8d, %r8d
319	xorl	%r9d, %r9d
320	xorl	%r10d, %r10d
321	swapgs
322	sysretl
323SYM_CODE_END(entry_SYSCALL_compat)
324
325/*
326 * 32-bit legacy system call entry.
327 *
328 * 32-bit x86 Linux system calls traditionally used the INT $0x80
329 * instruction.  INT $0x80 lands here.
330 *
331 * This entry point can be used by 32-bit and 64-bit programs to perform
332 * 32-bit system calls.  Instances of INT $0x80 can be found inline in
333 * various programs and libraries.  It is also used by the vDSO's
334 * __kernel_vsyscall fallback for hardware that doesn't support a faster
335 * entry method.  Restarted 32-bit system calls also fall back to INT
336 * $0x80 regardless of what instruction was originally used to do the
337 * system call.
338 *
339 * This is considered a slow path.  It is not used by most libc
340 * implementations on modern hardware except during process startup.
341 *
342 * Arguments:
343 * eax  system call number
344 * ebx  arg1
345 * ecx  arg2
346 * edx  arg3
347 * esi  arg4
348 * edi  arg5
349 * ebp  arg6
350 */
351SYM_CODE_START(entry_INT80_compat)
352	UNWIND_HINT_ENTRY
353	/*
354	 * Interrupts are off on entry.
355	 */
356	ASM_CLAC			/* Do this early to minimize exposure */
357	SWAPGS
358
359	/*
360	 * User tracing code (ptrace or signal handlers) might assume that
361	 * the saved RAX contains a 32-bit number when we're invoking a 32-bit
362	 * syscall.  Just in case the high bits are nonzero, zero-extend
363	 * the syscall number.  (This could almost certainly be deleted
364	 * with no ill effects.)
365	 */
366	movl	%eax, %eax
367
368	/* switch to thread stack expects orig_ax and rdi to be pushed */
369	pushq	%rax			/* pt_regs->orig_ax */
370	pushq	%rdi			/* pt_regs->di */
371
372	/* Need to switch before accessing the thread stack. */
373	SWITCH_TO_KERNEL_CR3 scratch_reg=%rdi
374
375	/* In the Xen PV case we already run on the thread stack. */
376	ALTERNATIVE "", "jmp .Lint80_keep_stack", X86_FEATURE_XENPV
377
378	movq	%rsp, %rdi
379	movq	PER_CPU_VAR(cpu_current_top_of_stack), %rsp
380
381	pushq	6*8(%rdi)		/* regs->ss */
382	pushq	5*8(%rdi)		/* regs->rsp */
383	pushq	4*8(%rdi)		/* regs->eflags */
384	pushq	3*8(%rdi)		/* regs->cs */
385	pushq	2*8(%rdi)		/* regs->ip */
386	pushq	1*8(%rdi)		/* regs->orig_ax */
387	pushq	(%rdi)			/* pt_regs->di */
388.Lint80_keep_stack:
389
390	pushq	%rsi			/* pt_regs->si */
391	xorl	%esi, %esi		/* nospec   si */
392	pushq	%rdx			/* pt_regs->dx */
393	xorl	%edx, %edx		/* nospec   dx */
394	pushq	%rcx			/* pt_regs->cx */
395	xorl	%ecx, %ecx		/* nospec   cx */
396	pushq	$-ENOSYS		/* pt_regs->ax */
397	pushq   %r8			/* pt_regs->r8 */
398	xorl	%r8d, %r8d		/* nospec   r8 */
399	pushq   %r9			/* pt_regs->r9 */
400	xorl	%r9d, %r9d		/* nospec   r9 */
401	pushq   %r10			/* pt_regs->r10*/
402	xorl	%r10d, %r10d		/* nospec   r10 */
403	pushq   %r11			/* pt_regs->r11 */
404	xorl	%r11d, %r11d		/* nospec   r11 */
405	pushq   %rbx                    /* pt_regs->rbx */
406	xorl	%ebx, %ebx		/* nospec   rbx */
407	pushq   %rbp                    /* pt_regs->rbp */
408	xorl	%ebp, %ebp		/* nospec   rbp */
409	pushq   %r12                    /* pt_regs->r12 */
410	xorl	%r12d, %r12d		/* nospec   r12 */
411	pushq   %r13                    /* pt_regs->r13 */
412	xorl	%r13d, %r13d		/* nospec   r13 */
413	pushq   %r14                    /* pt_regs->r14 */
414	xorl	%r14d, %r14d		/* nospec   r14 */
415	pushq   %r15                    /* pt_regs->r15 */
416	xorl	%r15d, %r15d		/* nospec   r15 */
417
418	UNWIND_HINT_REGS
419
420	cld
421
422	IBRS_ENTER
423	UNTRAIN_RET
424
425	movq	%rsp, %rdi
426	call	do_int80_syscall_32
427	jmp	swapgs_restore_regs_and_return_to_usermode
428SYM_CODE_END(entry_INT80_compat)
429