1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * QLogic Fibre Channel HBA Driver
4 * Copyright (c) 2003-2014 QLogic Corporation
5 */
6 #include "qla_def.h"
7 #include "qla_gbl.h"
8
9 #include <linux/delay.h>
10 #include <linux/slab.h>
11 #include <linux/vmalloc.h>
12
13 #include "qla_devtbl.h"
14
15 #ifdef CONFIG_SPARC
16 #include <asm/prom.h>
17 #endif
18
19 #include "qla_target.h"
20
21 /*
22 * QLogic ISP2x00 Hardware Support Function Prototypes.
23 */
24 static int qla2x00_isp_firmware(scsi_qla_host_t *);
25 static int qla2x00_setup_chip(scsi_qla_host_t *);
26 static int qla2x00_fw_ready(scsi_qla_host_t *);
27 static int qla2x00_configure_hba(scsi_qla_host_t *);
28 static int qla2x00_configure_loop(scsi_qla_host_t *);
29 static int qla2x00_configure_local_loop(scsi_qla_host_t *);
30 static int qla2x00_configure_fabric(scsi_qla_host_t *);
31 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *);
32 static int qla2x00_restart_isp(scsi_qla_host_t *);
33
34 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
35 static int qla84xx_init_chip(scsi_qla_host_t *);
36 static int qla25xx_init_queues(struct qla_hw_data *);
37 static int qla24xx_post_prli_work(struct scsi_qla_host*, fc_port_t *);
38 static void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha,
39 struct event_arg *ea);
40 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *,
41 struct event_arg *);
42 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *);
43
44 /* SRB Extensions ---------------------------------------------------------- */
45
46 void
qla2x00_sp_timeout(struct timer_list * t)47 qla2x00_sp_timeout(struct timer_list *t)
48 {
49 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer);
50 struct srb_iocb *iocb;
51
52 WARN_ON(irqs_disabled());
53 iocb = &sp->u.iocb_cmd;
54 iocb->timeout(sp);
55 }
56
qla2x00_sp_free(srb_t * sp)57 void qla2x00_sp_free(srb_t *sp)
58 {
59 struct srb_iocb *iocb = &sp->u.iocb_cmd;
60
61 del_timer(&iocb->timer);
62 qla2x00_rel_sp(sp);
63 }
64
qla2xxx_rel_done_warning(srb_t * sp,int res)65 void qla2xxx_rel_done_warning(srb_t *sp, int res)
66 {
67 WARN_ONCE(1, "Calling done() of an already freed srb %p object\n", sp);
68 }
69
qla2xxx_rel_free_warning(srb_t * sp)70 void qla2xxx_rel_free_warning(srb_t *sp)
71 {
72 WARN_ONCE(1, "Calling free() of an already freed srb %p object\n", sp);
73 }
74
75 /* Asynchronous Login/Logout Routines -------------------------------------- */
76
77 unsigned long
qla2x00_get_async_timeout(struct scsi_qla_host * vha)78 qla2x00_get_async_timeout(struct scsi_qla_host *vha)
79 {
80 unsigned long tmo;
81 struct qla_hw_data *ha = vha->hw;
82
83 /* Firmware should use switch negotiated r_a_tov for timeout. */
84 tmo = ha->r_a_tov / 10 * 2;
85 if (IS_QLAFX00(ha)) {
86 tmo = FX00_DEF_RATOV * 2;
87 } else if (!IS_FWI2_CAPABLE(ha)) {
88 /*
89 * Except for earlier ISPs where the timeout is seeded from the
90 * initialization control block.
91 */
92 tmo = ha->login_timeout;
93 }
94 return tmo;
95 }
96
qla24xx_abort_iocb_timeout(void * data)97 static void qla24xx_abort_iocb_timeout(void *data)
98 {
99 srb_t *sp = data;
100 struct srb_iocb *abt = &sp->u.iocb_cmd;
101 struct qla_qpair *qpair = sp->qpair;
102 u32 handle;
103 unsigned long flags;
104
105 if (sp->cmd_sp)
106 ql_dbg(ql_dbg_async, sp->vha, 0x507c,
107 "Abort timeout - cmd hdl=%x, cmd type=%x hdl=%x, type=%x\n",
108 sp->cmd_sp->handle, sp->cmd_sp->type,
109 sp->handle, sp->type);
110 else
111 ql_dbg(ql_dbg_async, sp->vha, 0x507c,
112 "Abort timeout 2 - hdl=%x, type=%x\n",
113 sp->handle, sp->type);
114
115 spin_lock_irqsave(qpair->qp_lock_ptr, flags);
116 for (handle = 1; handle < qpair->req->num_outstanding_cmds; handle++) {
117 if (sp->cmd_sp && (qpair->req->outstanding_cmds[handle] ==
118 sp->cmd_sp))
119 qpair->req->outstanding_cmds[handle] = NULL;
120
121 /* removing the abort */
122 if (qpair->req->outstanding_cmds[handle] == sp) {
123 qpair->req->outstanding_cmds[handle] = NULL;
124 break;
125 }
126 }
127 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
128
129 if (sp->cmd_sp)
130 sp->cmd_sp->done(sp->cmd_sp, QLA_OS_TIMER_EXPIRED);
131
132 abt->u.abt.comp_status = cpu_to_le16(CS_TIMEOUT);
133 sp->done(sp, QLA_OS_TIMER_EXPIRED);
134 }
135
qla24xx_abort_sp_done(srb_t * sp,int res)136 static void qla24xx_abort_sp_done(srb_t *sp, int res)
137 {
138 struct srb_iocb *abt = &sp->u.iocb_cmd;
139
140 del_timer(&sp->u.iocb_cmd.timer);
141 if (sp->flags & SRB_WAKEUP_ON_COMP)
142 complete(&abt->u.abt.comp);
143 else
144 sp->free(sp);
145 }
146
qla24xx_async_abort_cmd(srb_t * cmd_sp,bool wait)147 int qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait)
148 {
149 scsi_qla_host_t *vha = cmd_sp->vha;
150 struct srb_iocb *abt_iocb;
151 srb_t *sp;
152 int rval = QLA_FUNCTION_FAILED;
153
154 sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport,
155 GFP_ATOMIC);
156 if (!sp)
157 return rval;
158
159 abt_iocb = &sp->u.iocb_cmd;
160 sp->type = SRB_ABT_CMD;
161 sp->name = "abort";
162 sp->qpair = cmd_sp->qpair;
163 sp->cmd_sp = cmd_sp;
164 if (wait)
165 sp->flags = SRB_WAKEUP_ON_COMP;
166
167 abt_iocb->timeout = qla24xx_abort_iocb_timeout;
168 init_completion(&abt_iocb->u.abt.comp);
169 /* FW can send 2 x ABTS's timeout/20s */
170 qla2x00_init_timer(sp, 42);
171
172 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
173 abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id);
174
175 sp->done = qla24xx_abort_sp_done;
176
177 ql_dbg(ql_dbg_async, vha, 0x507c,
178 "Abort command issued - hdl=%x, type=%x\n", cmd_sp->handle,
179 cmd_sp->type);
180
181 rval = qla2x00_start_sp(sp);
182 if (rval != QLA_SUCCESS) {
183 sp->free(sp);
184 return rval;
185 }
186
187 if (wait) {
188 wait_for_completion(&abt_iocb->u.abt.comp);
189 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
190 QLA_SUCCESS : QLA_FUNCTION_FAILED;
191 sp->free(sp);
192 }
193
194 return rval;
195 }
196
197 void
qla2x00_async_iocb_timeout(void * data)198 qla2x00_async_iocb_timeout(void *data)
199 {
200 srb_t *sp = data;
201 fc_port_t *fcport = sp->fcport;
202 struct srb_iocb *lio = &sp->u.iocb_cmd;
203 int rc, h;
204 unsigned long flags;
205
206 if (fcport) {
207 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
208 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n",
209 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name);
210
211 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
212 } else {
213 pr_info("Async-%s timeout - hdl=%x.\n",
214 sp->name, sp->handle);
215 }
216
217 switch (sp->type) {
218 case SRB_LOGIN_CMD:
219 rc = qla24xx_async_abort_cmd(sp, false);
220 if (rc) {
221 /* Retry as needed. */
222 lio->u.logio.data[0] = MBS_COMMAND_ERROR;
223 lio->u.logio.data[1] =
224 lio->u.logio.flags & SRB_LOGIN_RETRIED ?
225 QLA_LOGIO_LOGIN_RETRIED : 0;
226 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
227 for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
228 h++) {
229 if (sp->qpair->req->outstanding_cmds[h] ==
230 sp) {
231 sp->qpair->req->outstanding_cmds[h] =
232 NULL;
233 break;
234 }
235 }
236 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
237 sp->done(sp, QLA_FUNCTION_TIMEOUT);
238 }
239 break;
240 case SRB_LOGOUT_CMD:
241 case SRB_CT_PTHRU_CMD:
242 case SRB_MB_IOCB:
243 case SRB_NACK_PLOGI:
244 case SRB_NACK_PRLI:
245 case SRB_NACK_LOGO:
246 case SRB_CTRL_VP:
247 default:
248 rc = qla24xx_async_abort_cmd(sp, false);
249 if (rc) {
250 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
251 for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
252 h++) {
253 if (sp->qpair->req->outstanding_cmds[h] ==
254 sp) {
255 sp->qpair->req->outstanding_cmds[h] =
256 NULL;
257 break;
258 }
259 }
260 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
261 sp->done(sp, QLA_FUNCTION_TIMEOUT);
262 }
263 break;
264 }
265 }
266
qla2x00_async_login_sp_done(srb_t * sp,int res)267 static void qla2x00_async_login_sp_done(srb_t *sp, int res)
268 {
269 struct scsi_qla_host *vha = sp->vha;
270 struct srb_iocb *lio = &sp->u.iocb_cmd;
271 struct event_arg ea;
272
273 ql_dbg(ql_dbg_disc, vha, 0x20dd,
274 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res);
275
276 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
277
278 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
279 memset(&ea, 0, sizeof(ea));
280 ea.fcport = sp->fcport;
281 ea.data[0] = lio->u.logio.data[0];
282 ea.data[1] = lio->u.logio.data[1];
283 ea.iop[0] = lio->u.logio.iop[0];
284 ea.iop[1] = lio->u.logio.iop[1];
285 ea.sp = sp;
286 qla24xx_handle_plogi_done_event(vha, &ea);
287 }
288
289 sp->free(sp);
290 }
291
292 static inline bool
fcport_is_smaller(fc_port_t * fcport)293 fcport_is_smaller(fc_port_t *fcport)
294 {
295 if (wwn_to_u64(fcport->port_name) <
296 wwn_to_u64(fcport->vha->port_name))
297 return true;
298 else
299 return false;
300 }
301
302 static inline bool
fcport_is_bigger(fc_port_t * fcport)303 fcport_is_bigger(fc_port_t *fcport)
304 {
305 return !fcport_is_smaller(fcport);
306 }
307
308 int
qla2x00_async_login(struct scsi_qla_host * vha,fc_port_t * fcport,uint16_t * data)309 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
310 uint16_t *data)
311 {
312 srb_t *sp;
313 struct srb_iocb *lio;
314 int rval = QLA_FUNCTION_FAILED;
315
316 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) ||
317 fcport->loop_id == FC_NO_LOOP_ID) {
318 ql_log(ql_log_warn, vha, 0xffff,
319 "%s: %8phC - not sending command.\n",
320 __func__, fcport->port_name);
321 return rval;
322 }
323
324 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
325 if (!sp)
326 goto done;
327
328 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND);
329 fcport->flags |= FCF_ASYNC_SENT;
330 fcport->logout_completed = 0;
331
332 sp->type = SRB_LOGIN_CMD;
333 sp->name = "login";
334 sp->gen1 = fcport->rscn_gen;
335 sp->gen2 = fcport->login_gen;
336
337 lio = &sp->u.iocb_cmd;
338 lio->timeout = qla2x00_async_iocb_timeout;
339 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
340
341 sp->done = qla2x00_async_login_sp_done;
342 if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport))
343 lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY;
344 else
345 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
346
347 if (NVME_TARGET(vha->hw, fcport))
348 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI;
349
350 ql_dbg(ql_dbg_disc, vha, 0x2072,
351 "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x "
352 "retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id,
353 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
354 fcport->login_retry);
355
356 rval = qla2x00_start_sp(sp);
357 if (rval != QLA_SUCCESS) {
358 fcport->flags |= FCF_LOGIN_NEEDED;
359 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
360 goto done_free_sp;
361 }
362
363 return rval;
364
365 done_free_sp:
366 sp->free(sp);
367 fcport->flags &= ~FCF_ASYNC_SENT;
368 done:
369 fcport->flags &= ~FCF_ASYNC_ACTIVE;
370 return rval;
371 }
372
qla2x00_async_logout_sp_done(srb_t * sp,int res)373 static void qla2x00_async_logout_sp_done(srb_t *sp, int res)
374 {
375 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
376 sp->fcport->login_gen++;
377 qlt_logo_completion_handler(sp->fcport, res);
378 sp->free(sp);
379 }
380
381 int
qla2x00_async_logout(struct scsi_qla_host * vha,fc_port_t * fcport)382 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
383 {
384 srb_t *sp;
385 struct srb_iocb *lio;
386 int rval = QLA_FUNCTION_FAILED;
387
388 fcport->flags |= FCF_ASYNC_SENT;
389 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
390 if (!sp)
391 goto done;
392
393 sp->type = SRB_LOGOUT_CMD;
394 sp->name = "logout";
395
396 lio = &sp->u.iocb_cmd;
397 lio->timeout = qla2x00_async_iocb_timeout;
398 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
399
400 sp->done = qla2x00_async_logout_sp_done;
401
402 ql_dbg(ql_dbg_disc, vha, 0x2070,
403 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n",
404 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
405 fcport->d_id.b.area, fcport->d_id.b.al_pa,
406 fcport->port_name);
407
408 rval = qla2x00_start_sp(sp);
409 if (rval != QLA_SUCCESS)
410 goto done_free_sp;
411 return rval;
412
413 done_free_sp:
414 sp->free(sp);
415 done:
416 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
417 return rval;
418 }
419
420 void
qla2x00_async_prlo_done(struct scsi_qla_host * vha,fc_port_t * fcport,uint16_t * data)421 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport,
422 uint16_t *data)
423 {
424 fcport->flags &= ~FCF_ASYNC_ACTIVE;
425 /* Don't re-login in target mode */
426 if (!fcport->tgt_session)
427 qla2x00_mark_device_lost(vha, fcport, 1);
428 qlt_logo_completion_handler(fcport, data[0]);
429 }
430
qla2x00_async_prlo_sp_done(srb_t * sp,int res)431 static void qla2x00_async_prlo_sp_done(srb_t *sp, int res)
432 {
433 struct srb_iocb *lio = &sp->u.iocb_cmd;
434 struct scsi_qla_host *vha = sp->vha;
435
436 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE;
437 if (!test_bit(UNLOADING, &vha->dpc_flags))
438 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport,
439 lio->u.logio.data);
440 sp->free(sp);
441 }
442
443 int
qla2x00_async_prlo(struct scsi_qla_host * vha,fc_port_t * fcport)444 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport)
445 {
446 srb_t *sp;
447 struct srb_iocb *lio;
448 int rval;
449
450 rval = QLA_FUNCTION_FAILED;
451 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
452 if (!sp)
453 goto done;
454
455 sp->type = SRB_PRLO_CMD;
456 sp->name = "prlo";
457
458 lio = &sp->u.iocb_cmd;
459 lio->timeout = qla2x00_async_iocb_timeout;
460 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
461
462 sp->done = qla2x00_async_prlo_sp_done;
463
464 ql_dbg(ql_dbg_disc, vha, 0x2070,
465 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
466 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
467 fcport->d_id.b.area, fcport->d_id.b.al_pa);
468
469 rval = qla2x00_start_sp(sp);
470 if (rval != QLA_SUCCESS)
471 goto done_free_sp;
472
473 return rval;
474
475 done_free_sp:
476 sp->free(sp);
477 done:
478 fcport->flags &= ~FCF_ASYNC_ACTIVE;
479 return rval;
480 }
481
482 static
qla24xx_handle_adisc_event(scsi_qla_host_t * vha,struct event_arg * ea)483 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea)
484 {
485 struct fc_port *fcport = ea->fcport;
486
487 ql_dbg(ql_dbg_disc, vha, 0x20d2,
488 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n",
489 __func__, fcport->port_name, fcport->disc_state,
490 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2,
491 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id);
492
493 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
494 ea->data[0]);
495
496 if (ea->data[0] != MBS_COMMAND_COMPLETE) {
497 ql_dbg(ql_dbg_disc, vha, 0x2066,
498 "%s %8phC: adisc fail: post delete\n",
499 __func__, ea->fcport->port_name);
500 /* deleted = 0 & logout_on_delete = force fw cleanup */
501 fcport->deleted = 0;
502 fcport->logout_on_delete = 1;
503 qlt_schedule_sess_for_deletion(ea->fcport);
504 return;
505 }
506
507 if (ea->fcport->disc_state == DSC_DELETE_PEND)
508 return;
509
510 if (ea->sp->gen2 != ea->fcport->login_gen) {
511 /* target side must have changed it. */
512 ql_dbg(ql_dbg_disc, vha, 0x20d3,
513 "%s %8phC generation changed\n",
514 __func__, ea->fcport->port_name);
515 return;
516 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) {
517 qla_rscn_replay(fcport);
518 qlt_schedule_sess_for_deletion(fcport);
519 return;
520 }
521
522 __qla24xx_handle_gpdb_event(vha, ea);
523 }
524
qla_post_els_plogi_work(struct scsi_qla_host * vha,fc_port_t * fcport)525 static int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport)
526 {
527 struct qla_work_evt *e;
528
529 e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI);
530 if (!e)
531 return QLA_FUNCTION_FAILED;
532
533 e->u.fcport.fcport = fcport;
534 fcport->flags |= FCF_ASYNC_ACTIVE;
535 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND);
536 return qla2x00_post_work(vha, e);
537 }
538
qla2x00_async_adisc_sp_done(srb_t * sp,int res)539 static void qla2x00_async_adisc_sp_done(srb_t *sp, int res)
540 {
541 struct scsi_qla_host *vha = sp->vha;
542 struct event_arg ea;
543 struct srb_iocb *lio = &sp->u.iocb_cmd;
544
545 ql_dbg(ql_dbg_disc, vha, 0x2066,
546 "Async done-%s res %x %8phC\n",
547 sp->name, res, sp->fcport->port_name);
548
549 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
550
551 memset(&ea, 0, sizeof(ea));
552 ea.rc = res;
553 ea.data[0] = lio->u.logio.data[0];
554 ea.data[1] = lio->u.logio.data[1];
555 ea.iop[0] = lio->u.logio.iop[0];
556 ea.iop[1] = lio->u.logio.iop[1];
557 ea.fcport = sp->fcport;
558 ea.sp = sp;
559
560 qla24xx_handle_adisc_event(vha, &ea);
561
562 sp->free(sp);
563 }
564
565 int
qla2x00_async_adisc(struct scsi_qla_host * vha,fc_port_t * fcport,uint16_t * data)566 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
567 uint16_t *data)
568 {
569 srb_t *sp;
570 struct srb_iocb *lio;
571 int rval = QLA_FUNCTION_FAILED;
572
573 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
574 return rval;
575
576 fcport->flags |= FCF_ASYNC_SENT;
577 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
578 if (!sp)
579 goto done;
580
581 sp->type = SRB_ADISC_CMD;
582 sp->name = "adisc";
583
584 lio = &sp->u.iocb_cmd;
585 lio->timeout = qla2x00_async_iocb_timeout;
586 sp->gen1 = fcport->rscn_gen;
587 sp->gen2 = fcport->login_gen;
588 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
589
590 sp->done = qla2x00_async_adisc_sp_done;
591 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
592 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
593
594 ql_dbg(ql_dbg_disc, vha, 0x206f,
595 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n",
596 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name);
597
598 rval = qla2x00_start_sp(sp);
599 if (rval != QLA_SUCCESS)
600 goto done_free_sp;
601
602 return rval;
603
604 done_free_sp:
605 sp->free(sp);
606 done:
607 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
608 qla2x00_post_async_adisc_work(vha, fcport, data);
609 return rval;
610 }
611
qla2x00_is_reserved_id(scsi_qla_host_t * vha,uint16_t loop_id)612 static bool qla2x00_is_reserved_id(scsi_qla_host_t *vha, uint16_t loop_id)
613 {
614 struct qla_hw_data *ha = vha->hw;
615
616 if (IS_FWI2_CAPABLE(ha))
617 return loop_id > NPH_LAST_HANDLE;
618
619 return (loop_id > ha->max_loop_id && loop_id < SNS_FIRST_LOOP_ID) ||
620 loop_id == MANAGEMENT_SERVER || loop_id == BROADCAST;
621 }
622
623 /**
624 * qla2x00_find_new_loop_id - scan through our port list and find a new usable loop ID
625 * @vha: adapter state pointer.
626 * @dev: port structure pointer.
627 *
628 * Returns:
629 * qla2x00 local function return status code.
630 *
631 * Context:
632 * Kernel context.
633 */
qla2x00_find_new_loop_id(scsi_qla_host_t * vha,fc_port_t * dev)634 static int qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
635 {
636 int rval;
637 struct qla_hw_data *ha = vha->hw;
638 unsigned long flags = 0;
639
640 rval = QLA_SUCCESS;
641
642 spin_lock_irqsave(&ha->vport_slock, flags);
643
644 dev->loop_id = find_first_zero_bit(ha->loop_id_map, LOOPID_MAP_SIZE);
645 if (dev->loop_id >= LOOPID_MAP_SIZE ||
646 qla2x00_is_reserved_id(vha, dev->loop_id)) {
647 dev->loop_id = FC_NO_LOOP_ID;
648 rval = QLA_FUNCTION_FAILED;
649 } else {
650 set_bit(dev->loop_id, ha->loop_id_map);
651 }
652 spin_unlock_irqrestore(&ha->vport_slock, flags);
653
654 if (rval == QLA_SUCCESS)
655 ql_dbg(ql_dbg_disc, dev->vha, 0x2086,
656 "Assigning new loopid=%x, portid=%x.\n",
657 dev->loop_id, dev->d_id.b24);
658 else
659 ql_log(ql_log_warn, dev->vha, 0x2087,
660 "No loop_id's available, portid=%x.\n",
661 dev->d_id.b24);
662
663 return rval;
664 }
665
qla2x00_clear_loop_id(fc_port_t * fcport)666 void qla2x00_clear_loop_id(fc_port_t *fcport)
667 {
668 struct qla_hw_data *ha = fcport->vha->hw;
669
670 if (fcport->loop_id == FC_NO_LOOP_ID ||
671 qla2x00_is_reserved_id(fcport->vha, fcport->loop_id))
672 return;
673
674 clear_bit(fcport->loop_id, ha->loop_id_map);
675 fcport->loop_id = FC_NO_LOOP_ID;
676 }
677
qla24xx_handle_gnl_done_event(scsi_qla_host_t * vha,struct event_arg * ea)678 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha,
679 struct event_arg *ea)
680 {
681 fc_port_t *fcport, *conflict_fcport;
682 struct get_name_list_extended *e;
683 u16 i, n, found = 0, loop_id;
684 port_id_t id;
685 u64 wwn;
686 u16 data[2];
687 u8 current_login_state, nvme_cls;
688
689 fcport = ea->fcport;
690 ql_dbg(ql_dbg_disc, vha, 0xffff,
691 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d\n",
692 __func__, fcport->port_name, fcport->disc_state,
693 fcport->fw_login_state, ea->rc,
694 fcport->login_gen, fcport->last_login_gen,
695 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id);
696
697 if (fcport->disc_state == DSC_DELETE_PEND)
698 return;
699
700 if (ea->rc) { /* rval */
701 if (fcport->login_retry == 0) {
702 ql_dbg(ql_dbg_disc, vha, 0x20de,
703 "GNL failed Port login retry %8phN, retry cnt=%d.\n",
704 fcport->port_name, fcport->login_retry);
705 }
706 return;
707 }
708
709 if (fcport->last_rscn_gen != fcport->rscn_gen) {
710 qla_rscn_replay(fcport);
711 qlt_schedule_sess_for_deletion(fcport);
712 return;
713 } else if (fcport->last_login_gen != fcport->login_gen) {
714 ql_dbg(ql_dbg_disc, vha, 0x20e0,
715 "%s %8phC login gen changed\n",
716 __func__, fcport->port_name);
717 return;
718 }
719
720 n = ea->data[0] / sizeof(struct get_name_list_extended);
721
722 ql_dbg(ql_dbg_disc, vha, 0x20e1,
723 "%s %d %8phC n %d %02x%02x%02x lid %d \n",
724 __func__, __LINE__, fcport->port_name, n,
725 fcport->d_id.b.domain, fcport->d_id.b.area,
726 fcport->d_id.b.al_pa, fcport->loop_id);
727
728 for (i = 0; i < n; i++) {
729 e = &vha->gnl.l[i];
730 wwn = wwn_to_u64(e->port_name);
731 id.b.domain = e->port_id[2];
732 id.b.area = e->port_id[1];
733 id.b.al_pa = e->port_id[0];
734 id.b.rsvd_1 = 0;
735
736 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE))
737 continue;
738
739 if (IS_SW_RESV_ADDR(id))
740 continue;
741
742 found = 1;
743
744 loop_id = le16_to_cpu(e->nport_handle);
745 loop_id = (loop_id & 0x7fff);
746 nvme_cls = e->current_login_state >> 4;
747 current_login_state = e->current_login_state & 0xf;
748
749 if (PRLI_PHASE(nvme_cls)) {
750 current_login_state = nvme_cls;
751 fcport->fc4_type &= ~FS_FC4TYPE_FCP;
752 fcport->fc4_type |= FS_FC4TYPE_NVME;
753 } else if (PRLI_PHASE(current_login_state)) {
754 fcport->fc4_type |= FS_FC4TYPE_FCP;
755 fcport->fc4_type &= ~FS_FC4TYPE_NVME;
756 }
757
758 ql_dbg(ql_dbg_disc, vha, 0x20e2,
759 "%s found %8phC CLS [%x|%x] fc4_type %d ID[%06x|%06x] lid[%d|%d]\n",
760 __func__, fcport->port_name,
761 e->current_login_state, fcport->fw_login_state,
762 fcport->fc4_type, id.b24, fcport->d_id.b24,
763 loop_id, fcport->loop_id);
764
765 switch (fcport->disc_state) {
766 case DSC_DELETE_PEND:
767 case DSC_DELETED:
768 break;
769 default:
770 if ((id.b24 != fcport->d_id.b24 &&
771 fcport->d_id.b24 &&
772 fcport->loop_id != FC_NO_LOOP_ID) ||
773 (fcport->loop_id != FC_NO_LOOP_ID &&
774 fcport->loop_id != loop_id)) {
775 ql_dbg(ql_dbg_disc, vha, 0x20e3,
776 "%s %d %8phC post del sess\n",
777 __func__, __LINE__, fcport->port_name);
778 if (fcport->n2n_flag)
779 fcport->d_id.b24 = 0;
780 qlt_schedule_sess_for_deletion(fcport);
781 return;
782 }
783 break;
784 }
785
786 fcport->loop_id = loop_id;
787 if (fcport->n2n_flag)
788 fcport->d_id.b24 = id.b24;
789
790 wwn = wwn_to_u64(fcport->port_name);
791 qlt_find_sess_invalidate_other(vha, wwn,
792 id, loop_id, &conflict_fcport);
793
794 if (conflict_fcport) {
795 /*
796 * Another share fcport share the same loop_id &
797 * nport id. Conflict fcport needs to finish
798 * cleanup before this fcport can proceed to login.
799 */
800 conflict_fcport->conflict = fcport;
801 fcport->login_pause = 1;
802 }
803
804 switch (vha->hw->current_topology) {
805 default:
806 switch (current_login_state) {
807 case DSC_LS_PRLI_COMP:
808 ql_dbg(ql_dbg_disc + ql_dbg_verbose,
809 vha, 0x20e4, "%s %d %8phC post gpdb\n",
810 __func__, __LINE__, fcport->port_name);
811
812 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
813 fcport->port_type = FCT_INITIATOR;
814 else
815 fcport->port_type = FCT_TARGET;
816 data[0] = data[1] = 0;
817 qla2x00_post_async_adisc_work(vha, fcport,
818 data);
819 break;
820 case DSC_LS_PORT_UNAVAIL:
821 default:
822 if (fcport->loop_id == FC_NO_LOOP_ID) {
823 qla2x00_find_new_loop_id(vha, fcport);
824 fcport->fw_login_state =
825 DSC_LS_PORT_UNAVAIL;
826 }
827 ql_dbg(ql_dbg_disc, vha, 0x20e5,
828 "%s %d %8phC\n", __func__, __LINE__,
829 fcport->port_name);
830 qla24xx_fcport_handle_login(vha, fcport);
831 break;
832 }
833 break;
834 case ISP_CFG_N:
835 fcport->fw_login_state = current_login_state;
836 fcport->d_id = id;
837 switch (current_login_state) {
838 case DSC_LS_PRLI_PEND:
839 /*
840 * In the middle of PRLI. Let it finish.
841 * Allow relogin code to recheck state again
842 * with GNL. Push disc_state back to DELETED
843 * so GNL can go out again
844 */
845 qla2x00_set_fcport_disc_state(fcport,
846 DSC_DELETED);
847 break;
848 case DSC_LS_PRLI_COMP:
849 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
850 fcport->port_type = FCT_INITIATOR;
851 else
852 fcport->port_type = FCT_TARGET;
853
854 data[0] = data[1] = 0;
855 qla2x00_post_async_adisc_work(vha, fcport,
856 data);
857 break;
858 case DSC_LS_PLOGI_COMP:
859 if (fcport_is_bigger(fcport)) {
860 /* local adapter is smaller */
861 if (fcport->loop_id != FC_NO_LOOP_ID)
862 qla2x00_clear_loop_id(fcport);
863
864 fcport->loop_id = loop_id;
865 qla24xx_fcport_handle_login(vha,
866 fcport);
867 break;
868 }
869 fallthrough;
870 default:
871 if (fcport_is_smaller(fcport)) {
872 /* local adapter is bigger */
873 if (fcport->loop_id != FC_NO_LOOP_ID)
874 qla2x00_clear_loop_id(fcport);
875
876 fcport->loop_id = loop_id;
877 qla24xx_fcport_handle_login(vha,
878 fcport);
879 }
880 break;
881 }
882 break;
883 } /* switch (ha->current_topology) */
884 }
885
886 if (!found) {
887 switch (vha->hw->current_topology) {
888 case ISP_CFG_F:
889 case ISP_CFG_FL:
890 for (i = 0; i < n; i++) {
891 e = &vha->gnl.l[i];
892 id.b.domain = e->port_id[0];
893 id.b.area = e->port_id[1];
894 id.b.al_pa = e->port_id[2];
895 id.b.rsvd_1 = 0;
896 loop_id = le16_to_cpu(e->nport_handle);
897
898 if (fcport->d_id.b24 == id.b24) {
899 conflict_fcport =
900 qla2x00_find_fcport_by_wwpn(vha,
901 e->port_name, 0);
902 if (conflict_fcport) {
903 ql_dbg(ql_dbg_disc + ql_dbg_verbose,
904 vha, 0x20e5,
905 "%s %d %8phC post del sess\n",
906 __func__, __LINE__,
907 conflict_fcport->port_name);
908 qlt_schedule_sess_for_deletion
909 (conflict_fcport);
910 }
911 }
912 /*
913 * FW already picked this loop id for
914 * another fcport
915 */
916 if (fcport->loop_id == loop_id)
917 fcport->loop_id = FC_NO_LOOP_ID;
918 }
919 qla24xx_fcport_handle_login(vha, fcport);
920 break;
921 case ISP_CFG_N:
922 qla2x00_set_fcport_disc_state(fcport, DSC_DELETED);
923 if (time_after_eq(jiffies, fcport->dm_login_expire)) {
924 if (fcport->n2n_link_reset_cnt < 2) {
925 fcport->n2n_link_reset_cnt++;
926 /*
927 * remote port is not sending PLOGI.
928 * Reset link to kick start his state
929 * machine
930 */
931 set_bit(N2N_LINK_RESET,
932 &vha->dpc_flags);
933 } else {
934 if (fcport->n2n_chip_reset < 1) {
935 ql_log(ql_log_info, vha, 0x705d,
936 "Chip reset to bring laser down");
937 set_bit(ISP_ABORT_NEEDED,
938 &vha->dpc_flags);
939 fcport->n2n_chip_reset++;
940 } else {
941 ql_log(ql_log_info, vha, 0x705d,
942 "Remote port %8ph is not coming back\n",
943 fcport->port_name);
944 fcport->scan_state = 0;
945 }
946 }
947 qla2xxx_wake_dpc(vha);
948 } else {
949 /*
950 * report port suppose to do PLOGI. Give him
951 * more time. FW will catch it.
952 */
953 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
954 }
955 break;
956 default:
957 break;
958 }
959 }
960 } /* gnl_event */
961
qla24xx_async_gnl_sp_done(srb_t * sp,int res)962 static void qla24xx_async_gnl_sp_done(srb_t *sp, int res)
963 {
964 struct scsi_qla_host *vha = sp->vha;
965 unsigned long flags;
966 struct fc_port *fcport = NULL, *tf;
967 u16 i, n = 0, loop_id;
968 struct event_arg ea;
969 struct get_name_list_extended *e;
970 u64 wwn;
971 struct list_head h;
972 bool found = false;
973
974 ql_dbg(ql_dbg_disc, vha, 0x20e7,
975 "Async done-%s res %x mb[1]=%x mb[2]=%x \n",
976 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1],
977 sp->u.iocb_cmd.u.mbx.in_mb[2]);
978
979
980 sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE);
981 memset(&ea, 0, sizeof(ea));
982 ea.sp = sp;
983 ea.rc = res;
984
985 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >=
986 sizeof(struct get_name_list_extended)) {
987 n = sp->u.iocb_cmd.u.mbx.in_mb[1] /
988 sizeof(struct get_name_list_extended);
989 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */
990 }
991
992 for (i = 0; i < n; i++) {
993 e = &vha->gnl.l[i];
994 loop_id = le16_to_cpu(e->nport_handle);
995 /* mask out reserve bit */
996 loop_id = (loop_id & 0x7fff);
997 set_bit(loop_id, vha->hw->loop_id_map);
998 wwn = wwn_to_u64(e->port_name);
999
1000 ql_dbg(ql_dbg_disc, vha, 0x20e8,
1001 "%s %8phC %02x:%02x:%02x CLS %x/%x lid %x \n",
1002 __func__, &wwn, e->port_id[2], e->port_id[1],
1003 e->port_id[0], e->current_login_state, e->last_login_state,
1004 (loop_id & 0x7fff));
1005 }
1006
1007 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1008
1009 INIT_LIST_HEAD(&h);
1010 fcport = tf = NULL;
1011 if (!list_empty(&vha->gnl.fcports))
1012 list_splice_init(&vha->gnl.fcports, &h);
1013 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1014
1015 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) {
1016 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1017 list_del_init(&fcport->gnl_entry);
1018 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1019 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1020 ea.fcport = fcport;
1021
1022 qla24xx_handle_gnl_done_event(vha, &ea);
1023 }
1024
1025 /* create new fcport if fw has knowledge of new sessions */
1026 for (i = 0; i < n; i++) {
1027 port_id_t id;
1028 u64 wwnn;
1029
1030 e = &vha->gnl.l[i];
1031 wwn = wwn_to_u64(e->port_name);
1032
1033 found = false;
1034 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) {
1035 if (!memcmp((u8 *)&wwn, fcport->port_name,
1036 WWN_SIZE)) {
1037 found = true;
1038 break;
1039 }
1040 }
1041
1042 id.b.domain = e->port_id[2];
1043 id.b.area = e->port_id[1];
1044 id.b.al_pa = e->port_id[0];
1045 id.b.rsvd_1 = 0;
1046
1047 if (!found && wwn && !IS_SW_RESV_ADDR(id)) {
1048 ql_dbg(ql_dbg_disc, vha, 0x2065,
1049 "%s %d %8phC %06x post new sess\n",
1050 __func__, __LINE__, (u8 *)&wwn, id.b24);
1051 wwnn = wwn_to_u64(e->node_name);
1052 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn,
1053 (u8 *)&wwnn, NULL, 0);
1054 }
1055 }
1056
1057 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1058 vha->gnl.sent = 0;
1059 if (!list_empty(&vha->gnl.fcports)) {
1060 /* retrigger gnl */
1061 list_for_each_entry_safe(fcport, tf, &vha->gnl.fcports,
1062 gnl_entry) {
1063 list_del_init(&fcport->gnl_entry);
1064 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1065 if (qla24xx_post_gnl_work(vha, fcport) == QLA_SUCCESS)
1066 break;
1067 }
1068 }
1069 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1070
1071 sp->free(sp);
1072 }
1073
qla24xx_async_gnl(struct scsi_qla_host * vha,fc_port_t * fcport)1074 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport)
1075 {
1076 srb_t *sp;
1077 struct srb_iocb *mbx;
1078 int rval = QLA_FUNCTION_FAILED;
1079 unsigned long flags;
1080 u16 *mb;
1081
1082 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
1083 return rval;
1084
1085 ql_dbg(ql_dbg_disc, vha, 0x20d9,
1086 "Async-gnlist WWPN %8phC \n", fcport->port_name);
1087
1088 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1089 fcport->flags |= FCF_ASYNC_SENT;
1090 qla2x00_set_fcport_disc_state(fcport, DSC_GNL);
1091 fcport->last_rscn_gen = fcport->rscn_gen;
1092 fcport->last_login_gen = fcport->login_gen;
1093
1094 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports);
1095 if (vha->gnl.sent) {
1096 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1097 return QLA_SUCCESS;
1098 }
1099 vha->gnl.sent = 1;
1100 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1101
1102 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1103 if (!sp)
1104 goto done;
1105
1106 sp->type = SRB_MB_IOCB;
1107 sp->name = "gnlist";
1108 sp->gen1 = fcport->rscn_gen;
1109 sp->gen2 = fcport->login_gen;
1110
1111 mbx = &sp->u.iocb_cmd;
1112 mbx->timeout = qla2x00_async_iocb_timeout;
1113 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2);
1114
1115 mb = sp->u.iocb_cmd.u.mbx.out_mb;
1116 mb[0] = MBC_PORT_NODE_NAME_LIST;
1117 mb[1] = BIT_2 | BIT_3;
1118 mb[2] = MSW(vha->gnl.ldma);
1119 mb[3] = LSW(vha->gnl.ldma);
1120 mb[6] = MSW(MSD(vha->gnl.ldma));
1121 mb[7] = LSW(MSD(vha->gnl.ldma));
1122 mb[8] = vha->gnl.size;
1123 mb[9] = vha->vp_idx;
1124
1125 sp->done = qla24xx_async_gnl_sp_done;
1126
1127 ql_dbg(ql_dbg_disc, vha, 0x20da,
1128 "Async-%s - OUT WWPN %8phC hndl %x\n",
1129 sp->name, fcport->port_name, sp->handle);
1130
1131 rval = qla2x00_start_sp(sp);
1132 if (rval != QLA_SUCCESS)
1133 goto done_free_sp;
1134
1135 return rval;
1136
1137 done_free_sp:
1138 sp->free(sp);
1139 done:
1140 fcport->flags &= ~(FCF_ASYNC_ACTIVE | FCF_ASYNC_SENT);
1141 return rval;
1142 }
1143
qla24xx_post_gnl_work(struct scsi_qla_host * vha,fc_port_t * fcport)1144 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport)
1145 {
1146 struct qla_work_evt *e;
1147
1148 e = qla2x00_alloc_work(vha, QLA_EVT_GNL);
1149 if (!e)
1150 return QLA_FUNCTION_FAILED;
1151
1152 e->u.fcport.fcport = fcport;
1153 fcport->flags |= FCF_ASYNC_ACTIVE;
1154 return qla2x00_post_work(vha, e);
1155 }
1156
qla24xx_async_gpdb_sp_done(srb_t * sp,int res)1157 static void qla24xx_async_gpdb_sp_done(srb_t *sp, int res)
1158 {
1159 struct scsi_qla_host *vha = sp->vha;
1160 struct qla_hw_data *ha = vha->hw;
1161 fc_port_t *fcport = sp->fcport;
1162 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb;
1163 struct event_arg ea;
1164
1165 ql_dbg(ql_dbg_disc, vha, 0x20db,
1166 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n",
1167 sp->name, res, fcport->port_name, mb[1], mb[2]);
1168
1169 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1170
1171 if (res == QLA_FUNCTION_TIMEOUT)
1172 goto done;
1173
1174 memset(&ea, 0, sizeof(ea));
1175 ea.fcport = fcport;
1176 ea.sp = sp;
1177
1178 qla24xx_handle_gpdb_event(vha, &ea);
1179
1180 done:
1181 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in,
1182 sp->u.iocb_cmd.u.mbx.in_dma);
1183
1184 sp->free(sp);
1185 }
1186
qla24xx_post_prli_work(struct scsi_qla_host * vha,fc_port_t * fcport)1187 static int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport)
1188 {
1189 struct qla_work_evt *e;
1190
1191 if (vha->host->active_mode == MODE_TARGET)
1192 return QLA_FUNCTION_FAILED;
1193
1194 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI);
1195 if (!e)
1196 return QLA_FUNCTION_FAILED;
1197
1198 e->u.fcport.fcport = fcport;
1199
1200 return qla2x00_post_work(vha, e);
1201 }
1202
qla2x00_async_prli_sp_done(srb_t * sp,int res)1203 static void qla2x00_async_prli_sp_done(srb_t *sp, int res)
1204 {
1205 struct scsi_qla_host *vha = sp->vha;
1206 struct srb_iocb *lio = &sp->u.iocb_cmd;
1207 struct event_arg ea;
1208
1209 ql_dbg(ql_dbg_disc, vha, 0x2129,
1210 "%s %8phC res %d \n", __func__,
1211 sp->fcport->port_name, res);
1212
1213 sp->fcport->flags &= ~FCF_ASYNC_SENT;
1214
1215 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
1216 memset(&ea, 0, sizeof(ea));
1217 ea.fcport = sp->fcport;
1218 ea.data[0] = lio->u.logio.data[0];
1219 ea.data[1] = lio->u.logio.data[1];
1220 ea.iop[0] = lio->u.logio.iop[0];
1221 ea.iop[1] = lio->u.logio.iop[1];
1222 ea.sp = sp;
1223
1224 qla24xx_handle_prli_done_event(vha, &ea);
1225 }
1226
1227 sp->free(sp);
1228 }
1229
1230 int
qla24xx_async_prli(struct scsi_qla_host * vha,fc_port_t * fcport)1231 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport)
1232 {
1233 srb_t *sp;
1234 struct srb_iocb *lio;
1235 int rval = QLA_FUNCTION_FAILED;
1236
1237 if (!vha->flags.online) {
1238 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n",
1239 __func__, __LINE__, fcport->port_name);
1240 return rval;
1241 }
1242
1243 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND ||
1244 fcport->fw_login_state == DSC_LS_PRLI_PEND) &&
1245 qla_dual_mode_enabled(vha)) {
1246 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n",
1247 __func__, __LINE__, fcport->port_name);
1248 return rval;
1249 }
1250
1251 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1252 if (!sp)
1253 return rval;
1254
1255 fcport->flags |= FCF_ASYNC_SENT;
1256 fcport->logout_completed = 0;
1257
1258 sp->type = SRB_PRLI_CMD;
1259 sp->name = "prli";
1260
1261 lio = &sp->u.iocb_cmd;
1262 lio->timeout = qla2x00_async_iocb_timeout;
1263 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
1264
1265 sp->done = qla2x00_async_prli_sp_done;
1266 lio->u.logio.flags = 0;
1267
1268 if (NVME_TARGET(vha->hw, fcport))
1269 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI;
1270
1271 ql_dbg(ql_dbg_disc, vha, 0x211b,
1272 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d fc4type %x priority %x %s.\n",
1273 fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24,
1274 fcport->login_retry, fcport->fc4_type, vha->hw->fc4_type_priority,
1275 NVME_TARGET(vha->hw, fcport) ? "nvme" : "fcp");
1276
1277 rval = qla2x00_start_sp(sp);
1278 if (rval != QLA_SUCCESS) {
1279 fcport->flags |= FCF_LOGIN_NEEDED;
1280 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1281 goto done_free_sp;
1282 }
1283
1284 return rval;
1285
1286 done_free_sp:
1287 sp->free(sp);
1288 fcport->flags &= ~FCF_ASYNC_SENT;
1289 return rval;
1290 }
1291
qla24xx_post_gpdb_work(struct scsi_qla_host * vha,fc_port_t * fcport,u8 opt)1292 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
1293 {
1294 struct qla_work_evt *e;
1295
1296 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB);
1297 if (!e)
1298 return QLA_FUNCTION_FAILED;
1299
1300 e->u.fcport.fcport = fcport;
1301 e->u.fcport.opt = opt;
1302 fcport->flags |= FCF_ASYNC_ACTIVE;
1303 return qla2x00_post_work(vha, e);
1304 }
1305
qla24xx_async_gpdb(struct scsi_qla_host * vha,fc_port_t * fcport,u8 opt)1306 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
1307 {
1308 srb_t *sp;
1309 struct srb_iocb *mbx;
1310 int rval = QLA_FUNCTION_FAILED;
1311 u16 *mb;
1312 dma_addr_t pd_dma;
1313 struct port_database_24xx *pd;
1314 struct qla_hw_data *ha = vha->hw;
1315
1316 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) ||
1317 fcport->loop_id == FC_NO_LOOP_ID) {
1318 ql_log(ql_log_warn, vha, 0xffff,
1319 "%s: %8phC - not sending command.\n",
1320 __func__, fcport->port_name);
1321 return rval;
1322 }
1323
1324 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1325 if (!sp)
1326 goto done;
1327
1328 qla2x00_set_fcport_disc_state(fcport, DSC_GPDB);
1329
1330 fcport->flags |= FCF_ASYNC_SENT;
1331 sp->type = SRB_MB_IOCB;
1332 sp->name = "gpdb";
1333 sp->gen1 = fcport->rscn_gen;
1334 sp->gen2 = fcport->login_gen;
1335
1336 mbx = &sp->u.iocb_cmd;
1337 mbx->timeout = qla2x00_async_iocb_timeout;
1338 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
1339
1340 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
1341 if (pd == NULL) {
1342 ql_log(ql_log_warn, vha, 0xd043,
1343 "Failed to allocate port database structure.\n");
1344 goto done_free_sp;
1345 }
1346
1347 mb = sp->u.iocb_cmd.u.mbx.out_mb;
1348 mb[0] = MBC_GET_PORT_DATABASE;
1349 mb[1] = fcport->loop_id;
1350 mb[2] = MSW(pd_dma);
1351 mb[3] = LSW(pd_dma);
1352 mb[6] = MSW(MSD(pd_dma));
1353 mb[7] = LSW(MSD(pd_dma));
1354 mb[9] = vha->vp_idx;
1355 mb[10] = opt;
1356
1357 mbx->u.mbx.in = pd;
1358 mbx->u.mbx.in_dma = pd_dma;
1359
1360 sp->done = qla24xx_async_gpdb_sp_done;
1361
1362 ql_dbg(ql_dbg_disc, vha, 0x20dc,
1363 "Async-%s %8phC hndl %x opt %x\n",
1364 sp->name, fcport->port_name, sp->handle, opt);
1365
1366 rval = qla2x00_start_sp(sp);
1367 if (rval != QLA_SUCCESS)
1368 goto done_free_sp;
1369 return rval;
1370
1371 done_free_sp:
1372 if (pd)
1373 dma_pool_free(ha->s_dma_pool, pd, pd_dma);
1374
1375 sp->free(sp);
1376 fcport->flags &= ~FCF_ASYNC_SENT;
1377 done:
1378 fcport->flags &= ~FCF_ASYNC_ACTIVE;
1379 qla24xx_post_gpdb_work(vha, fcport, opt);
1380 return rval;
1381 }
1382
1383 static
__qla24xx_handle_gpdb_event(scsi_qla_host_t * vha,struct event_arg * ea)1384 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1385 {
1386 unsigned long flags;
1387
1388 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1389 ea->fcport->login_gen++;
1390 ea->fcport->deleted = 0;
1391 ea->fcport->logout_on_delete = 1;
1392
1393 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) {
1394 vha->fcport_count++;
1395 ea->fcport->login_succ = 1;
1396
1397 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1398 qla24xx_sched_upd_fcport(ea->fcport);
1399 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1400 } else if (ea->fcport->login_succ) {
1401 /*
1402 * We have an existing session. A late RSCN delivery
1403 * must have triggered the session to be re-validate.
1404 * Session is still valid.
1405 */
1406 ql_dbg(ql_dbg_disc, vha, 0x20d6,
1407 "%s %d %8phC session revalidate success\n",
1408 __func__, __LINE__, ea->fcport->port_name);
1409 qla2x00_set_fcport_disc_state(ea->fcport, DSC_LOGIN_COMPLETE);
1410 }
1411 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1412 }
1413
1414 static
qla24xx_handle_gpdb_event(scsi_qla_host_t * vha,struct event_arg * ea)1415 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1416 {
1417 fc_port_t *fcport = ea->fcport;
1418 struct port_database_24xx *pd;
1419 struct srb *sp = ea->sp;
1420 uint8_t ls;
1421
1422 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in;
1423
1424 fcport->flags &= ~FCF_ASYNC_SENT;
1425
1426 ql_dbg(ql_dbg_disc, vha, 0x20d2,
1427 "%s %8phC DS %d LS %d fc4_type %x rc %d\n", __func__,
1428 fcport->port_name, fcport->disc_state, pd->current_login_state,
1429 fcport->fc4_type, ea->rc);
1430
1431 if (fcport->disc_state == DSC_DELETE_PEND)
1432 return;
1433
1434 if (NVME_TARGET(vha->hw, fcport))
1435 ls = pd->current_login_state >> 4;
1436 else
1437 ls = pd->current_login_state & 0xf;
1438
1439 if (ea->sp->gen2 != fcport->login_gen) {
1440 /* target side must have changed it. */
1441
1442 ql_dbg(ql_dbg_disc, vha, 0x20d3,
1443 "%s %8phC generation changed\n",
1444 __func__, fcport->port_name);
1445 return;
1446 } else if (ea->sp->gen1 != fcport->rscn_gen) {
1447 qla_rscn_replay(fcport);
1448 qlt_schedule_sess_for_deletion(fcport);
1449 return;
1450 }
1451
1452 switch (ls) {
1453 case PDS_PRLI_COMPLETE:
1454 __qla24xx_parse_gpdb(vha, fcport, pd);
1455 break;
1456 case PDS_PLOGI_PENDING:
1457 case PDS_PLOGI_COMPLETE:
1458 case PDS_PRLI_PENDING:
1459 case PDS_PRLI2_PENDING:
1460 /* Set discovery state back to GNL to Relogin attempt */
1461 if (qla_dual_mode_enabled(vha) ||
1462 qla_ini_mode_enabled(vha)) {
1463 qla2x00_set_fcport_disc_state(fcport, DSC_GNL);
1464 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1465 }
1466 return;
1467 case PDS_LOGO_PENDING:
1468 case PDS_PORT_UNAVAILABLE:
1469 default:
1470 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n",
1471 __func__, __LINE__, fcport->port_name);
1472 qlt_schedule_sess_for_deletion(fcport);
1473 return;
1474 }
1475 __qla24xx_handle_gpdb_event(vha, ea);
1476 } /* gpdb event */
1477
qla_chk_n2n_b4_login(struct scsi_qla_host * vha,fc_port_t * fcport)1478 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1479 {
1480 u8 login = 0;
1481 int rc;
1482
1483 if (qla_tgt_mode_enabled(vha))
1484 return;
1485
1486 if (qla_dual_mode_enabled(vha)) {
1487 if (N2N_TOPO(vha->hw)) {
1488 u64 mywwn, wwn;
1489
1490 mywwn = wwn_to_u64(vha->port_name);
1491 wwn = wwn_to_u64(fcport->port_name);
1492 if (mywwn > wwn)
1493 login = 1;
1494 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP)
1495 && time_after_eq(jiffies,
1496 fcport->plogi_nack_done_deadline))
1497 login = 1;
1498 } else {
1499 login = 1;
1500 }
1501 } else {
1502 /* initiator mode */
1503 login = 1;
1504 }
1505
1506 if (login && fcport->login_retry) {
1507 fcport->login_retry--;
1508 if (fcport->loop_id == FC_NO_LOOP_ID) {
1509 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
1510 rc = qla2x00_find_new_loop_id(vha, fcport);
1511 if (rc) {
1512 ql_dbg(ql_dbg_disc, vha, 0x20e6,
1513 "%s %d %8phC post del sess - out of loopid\n",
1514 __func__, __LINE__, fcport->port_name);
1515 fcport->scan_state = 0;
1516 qlt_schedule_sess_for_deletion(fcport);
1517 return;
1518 }
1519 }
1520 ql_dbg(ql_dbg_disc, vha, 0x20bf,
1521 "%s %d %8phC post login\n",
1522 __func__, __LINE__, fcport->port_name);
1523 qla2x00_post_async_login_work(vha, fcport, NULL);
1524 }
1525 }
1526
qla24xx_fcport_handle_login(struct scsi_qla_host * vha,fc_port_t * fcport)1527 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1528 {
1529 u16 data[2];
1530 u64 wwn;
1531 u16 sec;
1532
1533 ql_dbg(ql_dbg_disc, vha, 0x20d8,
1534 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d\n",
1535 __func__, fcport->port_name, fcport->disc_state,
1536 fcport->fw_login_state, fcport->login_pause, fcport->flags,
1537 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen,
1538 fcport->login_gen, fcport->loop_id, fcport->scan_state);
1539
1540 if (fcport->scan_state != QLA_FCPORT_FOUND)
1541 return 0;
1542
1543 if ((fcport->loop_id != FC_NO_LOOP_ID) &&
1544 qla_dual_mode_enabled(vha) &&
1545 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1546 (fcport->fw_login_state == DSC_LS_PRLI_PEND)))
1547 return 0;
1548
1549 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP &&
1550 !N2N_TOPO(vha->hw)) {
1551 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) {
1552 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1553 return 0;
1554 }
1555 }
1556
1557 /* Target won't initiate port login if fabric is present */
1558 if (vha->host->active_mode == MODE_TARGET && !N2N_TOPO(vha->hw))
1559 return 0;
1560
1561 if (fcport->flags & FCF_ASYNC_SENT) {
1562 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1563 return 0;
1564 }
1565
1566 switch (fcport->disc_state) {
1567 case DSC_DELETED:
1568 wwn = wwn_to_u64(fcport->node_name);
1569 switch (vha->hw->current_topology) {
1570 case ISP_CFG_N:
1571 if (fcport_is_smaller(fcport)) {
1572 /* this adapter is bigger */
1573 if (fcport->login_retry) {
1574 if (fcport->loop_id == FC_NO_LOOP_ID) {
1575 qla2x00_find_new_loop_id(vha,
1576 fcport);
1577 fcport->fw_login_state =
1578 DSC_LS_PORT_UNAVAIL;
1579 }
1580 fcport->login_retry--;
1581 qla_post_els_plogi_work(vha, fcport);
1582 } else {
1583 ql_log(ql_log_info, vha, 0x705d,
1584 "Unable to reach remote port %8phC",
1585 fcport->port_name);
1586 }
1587 } else {
1588 qla24xx_post_gnl_work(vha, fcport);
1589 }
1590 break;
1591 default:
1592 if (wwn == 0) {
1593 ql_dbg(ql_dbg_disc, vha, 0xffff,
1594 "%s %d %8phC post GNNID\n",
1595 __func__, __LINE__, fcport->port_name);
1596 qla24xx_post_gnnid_work(vha, fcport);
1597 } else if (fcport->loop_id == FC_NO_LOOP_ID) {
1598 ql_dbg(ql_dbg_disc, vha, 0x20bd,
1599 "%s %d %8phC post gnl\n",
1600 __func__, __LINE__, fcport->port_name);
1601 qla24xx_post_gnl_work(vha, fcport);
1602 } else {
1603 qla_chk_n2n_b4_login(vha, fcport);
1604 }
1605 break;
1606 }
1607 break;
1608
1609 case DSC_GNL:
1610 switch (vha->hw->current_topology) {
1611 case ISP_CFG_N:
1612 if ((fcport->current_login_state & 0xf) == 0x6) {
1613 ql_dbg(ql_dbg_disc, vha, 0x2118,
1614 "%s %d %8phC post GPDB work\n",
1615 __func__, __LINE__, fcport->port_name);
1616 fcport->chip_reset =
1617 vha->hw->base_qpair->chip_reset;
1618 qla24xx_post_gpdb_work(vha, fcport, 0);
1619 } else {
1620 ql_dbg(ql_dbg_disc, vha, 0x2118,
1621 "%s %d %8phC post %s PRLI\n",
1622 __func__, __LINE__, fcport->port_name,
1623 NVME_TARGET(vha->hw, fcport) ? "NVME" :
1624 "FC");
1625 qla24xx_post_prli_work(vha, fcport);
1626 }
1627 break;
1628 default:
1629 if (fcport->login_pause) {
1630 ql_dbg(ql_dbg_disc, vha, 0x20d8,
1631 "%s %d %8phC exit\n",
1632 __func__, __LINE__,
1633 fcport->port_name);
1634 fcport->last_rscn_gen = fcport->rscn_gen;
1635 fcport->last_login_gen = fcport->login_gen;
1636 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1637 break;
1638 }
1639 qla_chk_n2n_b4_login(vha, fcport);
1640 break;
1641 }
1642 break;
1643
1644 case DSC_LOGIN_FAILED:
1645 if (N2N_TOPO(vha->hw))
1646 qla_chk_n2n_b4_login(vha, fcport);
1647 else
1648 qlt_schedule_sess_for_deletion(fcport);
1649 break;
1650
1651 case DSC_LOGIN_COMPLETE:
1652 /* recheck login state */
1653 data[0] = data[1] = 0;
1654 qla2x00_post_async_adisc_work(vha, fcport, data);
1655 break;
1656
1657 case DSC_LOGIN_PEND:
1658 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP)
1659 qla24xx_post_prli_work(vha, fcport);
1660 break;
1661
1662 case DSC_UPD_FCPORT:
1663 sec = jiffies_to_msecs(jiffies -
1664 fcport->jiffies_at_registration)/1000;
1665 if (fcport->sec_since_registration < sec && sec &&
1666 !(sec % 60)) {
1667 fcport->sec_since_registration = sec;
1668 ql_dbg(ql_dbg_disc, fcport->vha, 0xffff,
1669 "%s %8phC - Slow Rport registration(%d Sec)\n",
1670 __func__, fcport->port_name, sec);
1671 }
1672
1673 if (fcport->next_disc_state != DSC_DELETE_PEND)
1674 fcport->next_disc_state = DSC_ADISC;
1675 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1676 break;
1677
1678 default:
1679 break;
1680 }
1681
1682 return 0;
1683 }
1684
qla24xx_post_newsess_work(struct scsi_qla_host * vha,port_id_t * id,u8 * port_name,u8 * node_name,void * pla,u8 fc4_type)1685 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id,
1686 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type)
1687 {
1688 struct qla_work_evt *e;
1689
1690 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS);
1691 if (!e)
1692 return QLA_FUNCTION_FAILED;
1693
1694 e->u.new_sess.id = *id;
1695 e->u.new_sess.pla = pla;
1696 e->u.new_sess.fc4_type = fc4_type;
1697 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE);
1698 if (node_name)
1699 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE);
1700
1701 return qla2x00_post_work(vha, e);
1702 }
1703
qla2x00_handle_rscn(scsi_qla_host_t * vha,struct event_arg * ea)1704 void qla2x00_handle_rscn(scsi_qla_host_t *vha, struct event_arg *ea)
1705 {
1706 fc_port_t *fcport;
1707 unsigned long flags;
1708
1709 switch (ea->id.b.rsvd_1) {
1710 case RSCN_PORT_ADDR:
1711 fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1);
1712 if (fcport) {
1713 if (fcport->flags & FCF_FCP2_DEVICE) {
1714 ql_dbg(ql_dbg_disc, vha, 0x2115,
1715 "Delaying session delete for FCP2 portid=%06x %8phC ",
1716 fcport->d_id.b24, fcport->port_name);
1717 return;
1718 }
1719 fcport->scan_needed = 1;
1720 fcport->rscn_gen++;
1721 }
1722 break;
1723 case RSCN_AREA_ADDR:
1724 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1725 if (fcport->flags & FCF_FCP2_DEVICE)
1726 continue;
1727
1728 if ((ea->id.b24 & 0xffff00) == (fcport->d_id.b24 & 0xffff00)) {
1729 fcport->scan_needed = 1;
1730 fcport->rscn_gen++;
1731 }
1732 }
1733 break;
1734 case RSCN_DOM_ADDR:
1735 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1736 if (fcport->flags & FCF_FCP2_DEVICE)
1737 continue;
1738
1739 if ((ea->id.b24 & 0xff0000) == (fcport->d_id.b24 & 0xff0000)) {
1740 fcport->scan_needed = 1;
1741 fcport->rscn_gen++;
1742 }
1743 }
1744 break;
1745 case RSCN_FAB_ADDR:
1746 default:
1747 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1748 if (fcport->flags & FCF_FCP2_DEVICE)
1749 continue;
1750
1751 fcport->scan_needed = 1;
1752 fcport->rscn_gen++;
1753 }
1754 break;
1755 }
1756
1757 spin_lock_irqsave(&vha->work_lock, flags);
1758 if (vha->scan.scan_flags == 0) {
1759 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s: schedule\n", __func__);
1760 vha->scan.scan_flags |= SF_QUEUED;
1761 schedule_delayed_work(&vha->scan.scan_work, 5);
1762 }
1763 spin_unlock_irqrestore(&vha->work_lock, flags);
1764 }
1765
qla24xx_handle_relogin_event(scsi_qla_host_t * vha,struct event_arg * ea)1766 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha,
1767 struct event_arg *ea)
1768 {
1769 fc_port_t *fcport = ea->fcport;
1770
1771 if (test_bit(UNLOADING, &vha->dpc_flags))
1772 return;
1773
1774 ql_dbg(ql_dbg_disc, vha, 0x2102,
1775 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n",
1776 __func__, fcport->port_name, fcport->disc_state,
1777 fcport->fw_login_state, fcport->login_pause,
1778 fcport->deleted, fcport->conflict,
1779 fcport->last_rscn_gen, fcport->rscn_gen,
1780 fcport->last_login_gen, fcport->login_gen,
1781 fcport->flags);
1782
1783 if (fcport->last_rscn_gen != fcport->rscn_gen) {
1784 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gnl\n",
1785 __func__, __LINE__, fcport->port_name);
1786 qla24xx_post_gnl_work(vha, fcport);
1787 return;
1788 }
1789
1790 qla24xx_fcport_handle_login(vha, fcport);
1791 }
1792
qla_handle_els_plogi_done(scsi_qla_host_t * vha,struct event_arg * ea)1793 void qla_handle_els_plogi_done(scsi_qla_host_t *vha,
1794 struct event_arg *ea)
1795 {
1796 /* for pure Target Mode, PRLI will not be initiated */
1797 if (vha->host->active_mode == MODE_TARGET)
1798 return;
1799
1800 ql_dbg(ql_dbg_disc, vha, 0x2118,
1801 "%s %d %8phC post PRLI\n",
1802 __func__, __LINE__, ea->fcport->port_name);
1803 qla24xx_post_prli_work(vha, ea->fcport);
1804 }
1805
1806 /*
1807 * RSCN(s) came in for this fcport, but the RSCN(s) was not able
1808 * to be consumed by the fcport
1809 */
qla_rscn_replay(fc_port_t * fcport)1810 void qla_rscn_replay(fc_port_t *fcport)
1811 {
1812 struct event_arg ea;
1813
1814 switch (fcport->disc_state) {
1815 case DSC_DELETE_PEND:
1816 return;
1817 default:
1818 break;
1819 }
1820
1821 if (fcport->scan_needed) {
1822 memset(&ea, 0, sizeof(ea));
1823 ea.id = fcport->d_id;
1824 ea.id.b.rsvd_1 = RSCN_PORT_ADDR;
1825 qla2x00_handle_rscn(fcport->vha, &ea);
1826 }
1827 }
1828
1829 static void
qla2x00_tmf_iocb_timeout(void * data)1830 qla2x00_tmf_iocb_timeout(void *data)
1831 {
1832 srb_t *sp = data;
1833 struct srb_iocb *tmf = &sp->u.iocb_cmd;
1834 int rc, h;
1835 unsigned long flags;
1836
1837 rc = qla24xx_async_abort_cmd(sp, false);
1838 if (rc) {
1839 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
1840 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; h++) {
1841 if (sp->qpair->req->outstanding_cmds[h] == sp) {
1842 sp->qpair->req->outstanding_cmds[h] = NULL;
1843 break;
1844 }
1845 }
1846 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
1847 tmf->u.tmf.comp_status = cpu_to_le16(CS_TIMEOUT);
1848 tmf->u.tmf.data = QLA_FUNCTION_FAILED;
1849 complete(&tmf->u.tmf.comp);
1850 }
1851 }
1852
qla2x00_tmf_sp_done(srb_t * sp,int res)1853 static void qla2x00_tmf_sp_done(srb_t *sp, int res)
1854 {
1855 struct srb_iocb *tmf = &sp->u.iocb_cmd;
1856
1857 complete(&tmf->u.tmf.comp);
1858 }
1859
1860 int
qla2x00_async_tm_cmd(fc_port_t * fcport,uint32_t flags,uint32_t lun,uint32_t tag)1861 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
1862 uint32_t tag)
1863 {
1864 struct scsi_qla_host *vha = fcport->vha;
1865 struct srb_iocb *tm_iocb;
1866 srb_t *sp;
1867 int rval = QLA_FUNCTION_FAILED;
1868
1869 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1870 if (!sp)
1871 goto done;
1872
1873 tm_iocb = &sp->u.iocb_cmd;
1874 sp->type = SRB_TM_CMD;
1875 sp->name = "tmf";
1876
1877 tm_iocb->timeout = qla2x00_tmf_iocb_timeout;
1878 init_completion(&tm_iocb->u.tmf.comp);
1879 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha));
1880
1881 tm_iocb->u.tmf.flags = flags;
1882 tm_iocb->u.tmf.lun = lun;
1883 tm_iocb->u.tmf.data = tag;
1884 sp->done = qla2x00_tmf_sp_done;
1885
1886 ql_dbg(ql_dbg_taskm, vha, 0x802f,
1887 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
1888 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
1889 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1890
1891 rval = qla2x00_start_sp(sp);
1892 if (rval != QLA_SUCCESS)
1893 goto done_free_sp;
1894 wait_for_completion(&tm_iocb->u.tmf.comp);
1895
1896 rval = tm_iocb->u.tmf.data;
1897
1898 if (rval != QLA_SUCCESS) {
1899 ql_log(ql_log_warn, vha, 0x8030,
1900 "TM IOCB failed (%x).\n", rval);
1901 }
1902
1903 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) {
1904 flags = tm_iocb->u.tmf.flags;
1905 lun = (uint16_t)tm_iocb->u.tmf.lun;
1906
1907 /* Issue Marker IOCB */
1908 qla2x00_marker(vha, vha->hw->base_qpair,
1909 fcport->loop_id, lun,
1910 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
1911 }
1912
1913 done_free_sp:
1914 sp->free(sp);
1915 fcport->flags &= ~FCF_ASYNC_SENT;
1916 done:
1917 return rval;
1918 }
1919
1920 int
qla24xx_async_abort_command(srb_t * sp)1921 qla24xx_async_abort_command(srb_t *sp)
1922 {
1923 unsigned long flags = 0;
1924
1925 uint32_t handle;
1926 fc_port_t *fcport = sp->fcport;
1927 struct qla_qpair *qpair = sp->qpair;
1928 struct scsi_qla_host *vha = fcport->vha;
1929 struct req_que *req = qpair->req;
1930
1931 spin_lock_irqsave(qpair->qp_lock_ptr, flags);
1932 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
1933 if (req->outstanding_cmds[handle] == sp)
1934 break;
1935 }
1936 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1937
1938 if (handle == req->num_outstanding_cmds) {
1939 /* Command not found. */
1940 return QLA_FUNCTION_FAILED;
1941 }
1942 if (sp->type == SRB_FXIOCB_DCMD)
1943 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
1944 FXDISC_ABORT_IOCTL);
1945
1946 return qla24xx_async_abort_cmd(sp, true);
1947 }
1948
1949 static void
qla24xx_handle_prli_done_event(struct scsi_qla_host * vha,struct event_arg * ea)1950 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
1951 {
1952 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
1953 ea->data[0]);
1954
1955 switch (ea->data[0]) {
1956 case MBS_COMMAND_COMPLETE:
1957 ql_dbg(ql_dbg_disc, vha, 0x2118,
1958 "%s %d %8phC post gpdb\n",
1959 __func__, __LINE__, ea->fcport->port_name);
1960
1961 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
1962 ea->fcport->logout_on_delete = 1;
1963 ea->fcport->nvme_prli_service_param = ea->iop[0];
1964 if (ea->iop[0] & NVME_PRLI_SP_FIRST_BURST)
1965 ea->fcport->nvme_first_burst_size =
1966 (ea->iop[1] & 0xffff) * 512;
1967 else
1968 ea->fcport->nvme_first_burst_size = 0;
1969 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
1970 break;
1971 default:
1972 if ((ea->iop[0] == LSC_SCODE_ELS_REJECT) &&
1973 (ea->iop[1] == 0x50000)) { /* reson 5=busy expl:0x0 */
1974 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1975 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP;
1976 break;
1977 }
1978
1979 ql_dbg(ql_dbg_disc, vha, 0x2118,
1980 "%s %d %8phC priority %s, fc4type %x\n",
1981 __func__, __LINE__, ea->fcport->port_name,
1982 vha->hw->fc4_type_priority == FC4_PRIORITY_FCP ?
1983 "FCP" : "NVMe", ea->fcport->fc4_type);
1984
1985 if (N2N_TOPO(vha->hw)) {
1986 if (vha->hw->fc4_type_priority == FC4_PRIORITY_NVME) {
1987 ea->fcport->fc4_type &= ~FS_FC4TYPE_NVME;
1988 ea->fcport->fc4_type |= FS_FC4TYPE_FCP;
1989 } else {
1990 ea->fcport->fc4_type &= ~FS_FC4TYPE_FCP;
1991 ea->fcport->fc4_type |= FS_FC4TYPE_NVME;
1992 }
1993
1994 if (ea->fcport->n2n_link_reset_cnt < 3) {
1995 ea->fcport->n2n_link_reset_cnt++;
1996 vha->relogin_jif = jiffies + 2 * HZ;
1997 /*
1998 * PRLI failed. Reset link to kick start
1999 * state machine
2000 */
2001 set_bit(N2N_LINK_RESET, &vha->dpc_flags);
2002 } else {
2003 ql_log(ql_log_warn, vha, 0x2119,
2004 "%s %d %8phC Unable to reconnect\n",
2005 __func__, __LINE__,
2006 ea->fcport->port_name);
2007 }
2008 } else {
2009 /*
2010 * switch connect. login failed. Take connection down
2011 * and allow relogin to retrigger
2012 */
2013 if (NVME_FCP_TARGET(ea->fcport)) {
2014 ql_dbg(ql_dbg_disc, vha, 0x2118,
2015 "%s %d %8phC post %s prli\n",
2016 __func__, __LINE__,
2017 ea->fcport->port_name,
2018 (ea->fcport->fc4_type & FS_FC4TYPE_NVME)
2019 ? "NVMe" : "FCP");
2020 if (vha->hw->fc4_type_priority == FC4_PRIORITY_NVME)
2021 ea->fcport->fc4_type &= ~FS_FC4TYPE_NVME;
2022 else
2023 ea->fcport->fc4_type &= ~FS_FC4TYPE_FCP;
2024 }
2025
2026 ea->fcport->flags &= ~FCF_ASYNC_SENT;
2027 ea->fcport->keep_nport_handle = 0;
2028 ea->fcport->logout_on_delete = 1;
2029 qlt_schedule_sess_for_deletion(ea->fcport);
2030 }
2031 break;
2032 }
2033 }
2034
2035 void
qla24xx_handle_plogi_done_event(struct scsi_qla_host * vha,struct event_arg * ea)2036 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
2037 {
2038 port_id_t cid; /* conflict Nport id */
2039 u16 lid;
2040 struct fc_port *conflict_fcport;
2041 unsigned long flags;
2042 struct fc_port *fcport = ea->fcport;
2043
2044 ql_dbg(ql_dbg_disc, vha, 0xffff,
2045 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n",
2046 __func__, fcport->port_name, fcport->disc_state,
2047 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen,
2048 ea->sp->gen1, fcport->rscn_gen,
2049 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]);
2050
2051 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
2052 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) {
2053 ql_dbg(ql_dbg_disc, vha, 0x20ea,
2054 "%s %d %8phC Remote is trying to login\n",
2055 __func__, __LINE__, fcport->port_name);
2056 return;
2057 }
2058
2059 if ((fcport->disc_state == DSC_DELETE_PEND) ||
2060 (fcport->disc_state == DSC_DELETED)) {
2061 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2062 return;
2063 }
2064
2065 if (ea->sp->gen2 != fcport->login_gen) {
2066 /* target side must have changed it. */
2067 ql_dbg(ql_dbg_disc, vha, 0x20d3,
2068 "%s %8phC generation changed\n",
2069 __func__, fcport->port_name);
2070 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2071 return;
2072 } else if (ea->sp->gen1 != fcport->rscn_gen) {
2073 ql_dbg(ql_dbg_disc, vha, 0x20d3,
2074 "%s %8phC RSCN generation changed\n",
2075 __func__, fcport->port_name);
2076 qla_rscn_replay(fcport);
2077 qlt_schedule_sess_for_deletion(fcport);
2078 return;
2079 }
2080
2081 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
2082 ea->data[0]);
2083
2084 switch (ea->data[0]) {
2085 case MBS_COMMAND_COMPLETE:
2086 /*
2087 * Driver must validate login state - If PRLI not complete,
2088 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
2089 * requests.
2090 */
2091 if (NVME_TARGET(vha->hw, ea->fcport)) {
2092 ql_dbg(ql_dbg_disc, vha, 0x2117,
2093 "%s %d %8phC post prli\n",
2094 __func__, __LINE__, ea->fcport->port_name);
2095 qla24xx_post_prli_work(vha, ea->fcport);
2096 } else {
2097 ql_dbg(ql_dbg_disc, vha, 0x20ea,
2098 "%s %d %8phC LoopID 0x%x in use with %06x. post gpdb\n",
2099 __func__, __LINE__, ea->fcport->port_name,
2100 ea->fcport->loop_id, ea->fcport->d_id.b24);
2101
2102 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
2103 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
2104 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
2105 ea->fcport->logout_on_delete = 1;
2106 ea->fcport->send_els_logo = 0;
2107 ea->fcport->fw_login_state = DSC_LS_PRLI_COMP;
2108 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
2109
2110 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
2111 }
2112 break;
2113 case MBS_COMMAND_ERROR:
2114 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n",
2115 __func__, __LINE__, ea->fcport->port_name, ea->data[1]);
2116
2117 ea->fcport->flags &= ~FCF_ASYNC_SENT;
2118 qla2x00_set_fcport_disc_state(ea->fcport, DSC_LOGIN_FAILED);
2119 if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED)
2120 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2121 else
2122 qla2x00_mark_device_lost(vha, ea->fcport, 1);
2123 break;
2124 case MBS_LOOP_ID_USED:
2125 /* data[1] = IO PARAM 1 = nport ID */
2126 cid.b.domain = (ea->iop[1] >> 16) & 0xff;
2127 cid.b.area = (ea->iop[1] >> 8) & 0xff;
2128 cid.b.al_pa = ea->iop[1] & 0xff;
2129 cid.b.rsvd_1 = 0;
2130
2131 ql_dbg(ql_dbg_disc, vha, 0x20ec,
2132 "%s %d %8phC lid %#x in use with pid %06x post gnl\n",
2133 __func__, __LINE__, ea->fcport->port_name,
2134 ea->fcport->loop_id, cid.b24);
2135
2136 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
2137 ea->fcport->loop_id = FC_NO_LOOP_ID;
2138 qla24xx_post_gnl_work(vha, ea->fcport);
2139 break;
2140 case MBS_PORT_ID_USED:
2141 lid = ea->iop[1] & 0xffff;
2142 qlt_find_sess_invalidate_other(vha,
2143 wwn_to_u64(ea->fcport->port_name),
2144 ea->fcport->d_id, lid, &conflict_fcport);
2145
2146 if (conflict_fcport) {
2147 /*
2148 * Another fcport share the same loop_id/nport id.
2149 * Conflict fcport needs to finish cleanup before this
2150 * fcport can proceed to login.
2151 */
2152 conflict_fcport->conflict = ea->fcport;
2153 ea->fcport->login_pause = 1;
2154
2155 ql_dbg(ql_dbg_disc, vha, 0x20ed,
2156 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n",
2157 __func__, __LINE__, ea->fcport->port_name,
2158 ea->fcport->d_id.b24, lid);
2159 } else {
2160 ql_dbg(ql_dbg_disc, vha, 0x20ed,
2161 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n",
2162 __func__, __LINE__, ea->fcport->port_name,
2163 ea->fcport->d_id.b24, lid);
2164
2165 qla2x00_clear_loop_id(ea->fcport);
2166 set_bit(lid, vha->hw->loop_id_map);
2167 ea->fcport->loop_id = lid;
2168 ea->fcport->keep_nport_handle = 0;
2169 ea->fcport->logout_on_delete = 1;
2170 qlt_schedule_sess_for_deletion(ea->fcport);
2171 }
2172 break;
2173 }
2174 return;
2175 }
2176
2177 /****************************************************************************/
2178 /* QLogic ISP2x00 Hardware Support Functions. */
2179 /****************************************************************************/
2180
2181 static int
qla83xx_nic_core_fw_load(scsi_qla_host_t * vha)2182 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha)
2183 {
2184 int rval = QLA_SUCCESS;
2185 struct qla_hw_data *ha = vha->hw;
2186 uint32_t idc_major_ver, idc_minor_ver;
2187 uint16_t config[4];
2188
2189 qla83xx_idc_lock(vha, 0);
2190
2191 /* SV: TODO: Assign initialization timeout from
2192 * flash-info / other param
2193 */
2194 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT;
2195 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT;
2196
2197 /* Set our fcoe function presence */
2198 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) {
2199 ql_dbg(ql_dbg_p3p, vha, 0xb077,
2200 "Error while setting DRV-Presence.\n");
2201 rval = QLA_FUNCTION_FAILED;
2202 goto exit;
2203 }
2204
2205 /* Decide the reset ownership */
2206 qla83xx_reset_ownership(vha);
2207
2208 /*
2209 * On first protocol driver load:
2210 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery
2211 * register.
2212 * Others: Check compatibility with current IDC Major version.
2213 */
2214 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver);
2215 if (ha->flags.nic_core_reset_owner) {
2216 /* Set IDC Major version */
2217 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION;
2218 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver);
2219
2220 /* Clearing IDC-Lock-Recovery register */
2221 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0);
2222 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) {
2223 /*
2224 * Clear further IDC participation if we are not compatible with
2225 * the current IDC Major Version.
2226 */
2227 ql_log(ql_log_warn, vha, 0xb07d,
2228 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n",
2229 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION);
2230 __qla83xx_clear_drv_presence(vha);
2231 rval = QLA_FUNCTION_FAILED;
2232 goto exit;
2233 }
2234 /* Each function sets its supported Minor version. */
2235 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver);
2236 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2));
2237 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver);
2238
2239 if (ha->flags.nic_core_reset_owner) {
2240 memset(config, 0, sizeof(config));
2241 if (!qla81xx_get_port_config(vha, config))
2242 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
2243 QLA8XXX_DEV_READY);
2244 }
2245
2246 rval = qla83xx_idc_state_handler(vha);
2247
2248 exit:
2249 qla83xx_idc_unlock(vha, 0);
2250
2251 return rval;
2252 }
2253
2254 /*
2255 * qla2x00_initialize_adapter
2256 * Initialize board.
2257 *
2258 * Input:
2259 * ha = adapter block pointer.
2260 *
2261 * Returns:
2262 * 0 = success
2263 */
2264 int
qla2x00_initialize_adapter(scsi_qla_host_t * vha)2265 qla2x00_initialize_adapter(scsi_qla_host_t *vha)
2266 {
2267 int rval;
2268 struct qla_hw_data *ha = vha->hw;
2269 struct req_que *req = ha->req_q_map[0];
2270 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2271
2272 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats));
2273 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat));
2274
2275 /* Clear adapter flags. */
2276 vha->flags.online = 0;
2277 ha->flags.chip_reset_done = 0;
2278 vha->flags.reset_active = 0;
2279 ha->flags.pci_channel_io_perm_failure = 0;
2280 ha->flags.eeh_busy = 0;
2281 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64();
2282 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
2283 atomic_set(&vha->loop_state, LOOP_DOWN);
2284 vha->device_flags = DFLG_NO_CABLE;
2285 vha->dpc_flags = 0;
2286 vha->flags.management_server_logged_in = 0;
2287 vha->marker_needed = 0;
2288 ha->isp_abort_cnt = 0;
2289 ha->beacon_blink_led = 0;
2290
2291 set_bit(0, ha->req_qid_map);
2292 set_bit(0, ha->rsp_qid_map);
2293
2294 ql_dbg(ql_dbg_init, vha, 0x0040,
2295 "Configuring PCI space...\n");
2296 rval = ha->isp_ops->pci_config(vha);
2297 if (rval) {
2298 ql_log(ql_log_warn, vha, 0x0044,
2299 "Unable to configure PCI space.\n");
2300 return (rval);
2301 }
2302
2303 ha->isp_ops->reset_chip(vha);
2304
2305 /* Check for secure flash support */
2306 if (IS_QLA28XX(ha)) {
2307 if (rd_reg_word(®->mailbox12) & BIT_0)
2308 ha->flags.secure_adapter = 1;
2309 ql_log(ql_log_info, vha, 0xffff, "Secure Adapter: %s\n",
2310 (ha->flags.secure_adapter) ? "Yes" : "No");
2311 }
2312
2313
2314 rval = qla2xxx_get_flash_info(vha);
2315 if (rval) {
2316 ql_log(ql_log_fatal, vha, 0x004f,
2317 "Unable to validate FLASH data.\n");
2318 return rval;
2319 }
2320
2321 if (IS_QLA8044(ha)) {
2322 qla8044_read_reset_template(vha);
2323
2324 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0.
2325 * If DONRESET_BIT0 is set, drivers should not set dev_state
2326 * to NEED_RESET. But if NEED_RESET is set, drivers should
2327 * should honor the reset. */
2328 if (ql2xdontresethba == 1)
2329 qla8044_set_idc_dontreset(vha);
2330 }
2331
2332 ha->isp_ops->get_flash_version(vha, req->ring);
2333 ql_dbg(ql_dbg_init, vha, 0x0061,
2334 "Configure NVRAM parameters...\n");
2335
2336 /* Let priority default to FCP, can be overridden by nvram_config */
2337 ha->fc4_type_priority = FC4_PRIORITY_FCP;
2338
2339 ha->isp_ops->nvram_config(vha);
2340
2341 if (ha->fc4_type_priority != FC4_PRIORITY_FCP &&
2342 ha->fc4_type_priority != FC4_PRIORITY_NVME)
2343 ha->fc4_type_priority = FC4_PRIORITY_FCP;
2344
2345 ql_log(ql_log_info, vha, 0xffff, "FC4 priority set to %s\n",
2346 ha->fc4_type_priority == FC4_PRIORITY_FCP ? "FCP" : "NVMe");
2347
2348 if (ha->flags.disable_serdes) {
2349 /* Mask HBA via NVRAM settings? */
2350 ql_log(ql_log_info, vha, 0x0077,
2351 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name);
2352 return QLA_FUNCTION_FAILED;
2353 }
2354
2355 ql_dbg(ql_dbg_init, vha, 0x0078,
2356 "Verifying loaded RISC code...\n");
2357
2358 /* If smartsan enabled then require fdmi and rdp enabled */
2359 if (ql2xsmartsan) {
2360 ql2xfdmienable = 1;
2361 ql2xrdpenable = 1;
2362 }
2363
2364 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
2365 rval = ha->isp_ops->chip_diag(vha);
2366 if (rval)
2367 return (rval);
2368 rval = qla2x00_setup_chip(vha);
2369 if (rval)
2370 return (rval);
2371 }
2372
2373 if (IS_QLA84XX(ha)) {
2374 ha->cs84xx = qla84xx_get_chip(vha);
2375 if (!ha->cs84xx) {
2376 ql_log(ql_log_warn, vha, 0x00d0,
2377 "Unable to configure ISP84XX.\n");
2378 return QLA_FUNCTION_FAILED;
2379 }
2380 }
2381
2382 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha))
2383 rval = qla2x00_init_rings(vha);
2384
2385 /* No point in continuing if firmware initialization failed. */
2386 if (rval != QLA_SUCCESS)
2387 return rval;
2388
2389 ha->flags.chip_reset_done = 1;
2390
2391 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
2392 /* Issue verify 84xx FW IOCB to complete 84xx initialization */
2393 rval = qla84xx_init_chip(vha);
2394 if (rval != QLA_SUCCESS) {
2395 ql_log(ql_log_warn, vha, 0x00d4,
2396 "Unable to initialize ISP84XX.\n");
2397 qla84xx_put_chip(vha);
2398 }
2399 }
2400
2401 /* Load the NIC Core f/w if we are the first protocol driver. */
2402 if (IS_QLA8031(ha)) {
2403 rval = qla83xx_nic_core_fw_load(vha);
2404 if (rval)
2405 ql_log(ql_log_warn, vha, 0x0124,
2406 "Error in initializing NIC Core f/w.\n");
2407 }
2408
2409 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
2410 qla24xx_read_fcp_prio_cfg(vha);
2411
2412 if (IS_P3P_TYPE(ha))
2413 qla82xx_set_driver_version(vha, QLA2XXX_VERSION);
2414 else
2415 qla25xx_set_driver_version(vha, QLA2XXX_VERSION);
2416
2417 return (rval);
2418 }
2419
2420 /**
2421 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
2422 * @vha: HA context
2423 *
2424 * Returns 0 on success.
2425 */
2426 int
qla2100_pci_config(scsi_qla_host_t * vha)2427 qla2100_pci_config(scsi_qla_host_t *vha)
2428 {
2429 uint16_t w;
2430 unsigned long flags;
2431 struct qla_hw_data *ha = vha->hw;
2432 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2433
2434 pci_set_master(ha->pdev);
2435 pci_try_set_mwi(ha->pdev);
2436
2437 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2438 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2439 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2440
2441 pci_disable_rom(ha->pdev);
2442
2443 /* Get PCI bus information. */
2444 spin_lock_irqsave(&ha->hardware_lock, flags);
2445 ha->pci_attr = rd_reg_word(®->ctrl_status);
2446 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2447
2448 return QLA_SUCCESS;
2449 }
2450
2451 /**
2452 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
2453 * @vha: HA context
2454 *
2455 * Returns 0 on success.
2456 */
2457 int
qla2300_pci_config(scsi_qla_host_t * vha)2458 qla2300_pci_config(scsi_qla_host_t *vha)
2459 {
2460 uint16_t w;
2461 unsigned long flags = 0;
2462 uint32_t cnt;
2463 struct qla_hw_data *ha = vha->hw;
2464 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2465
2466 pci_set_master(ha->pdev);
2467 pci_try_set_mwi(ha->pdev);
2468
2469 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2470 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2471
2472 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2473 w &= ~PCI_COMMAND_INTX_DISABLE;
2474 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2475
2476 /*
2477 * If this is a 2300 card and not 2312, reset the
2478 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
2479 * the 2310 also reports itself as a 2300 so we need to get the
2480 * fb revision level -- a 6 indicates it really is a 2300 and
2481 * not a 2310.
2482 */
2483 if (IS_QLA2300(ha)) {
2484 spin_lock_irqsave(&ha->hardware_lock, flags);
2485
2486 /* Pause RISC. */
2487 wrt_reg_word(®->hccr, HCCR_PAUSE_RISC);
2488 for (cnt = 0; cnt < 30000; cnt++) {
2489 if ((rd_reg_word(®->hccr) & HCCR_RISC_PAUSE) != 0)
2490 break;
2491
2492 udelay(10);
2493 }
2494
2495 /* Select FPM registers. */
2496 wrt_reg_word(®->ctrl_status, 0x20);
2497 rd_reg_word(®->ctrl_status);
2498
2499 /* Get the fb rev level */
2500 ha->fb_rev = RD_FB_CMD_REG(ha, reg);
2501
2502 if (ha->fb_rev == FPM_2300)
2503 pci_clear_mwi(ha->pdev);
2504
2505 /* Deselect FPM registers. */
2506 wrt_reg_word(®->ctrl_status, 0x0);
2507 rd_reg_word(®->ctrl_status);
2508
2509 /* Release RISC module. */
2510 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC);
2511 for (cnt = 0; cnt < 30000; cnt++) {
2512 if ((rd_reg_word(®->hccr) & HCCR_RISC_PAUSE) == 0)
2513 break;
2514
2515 udelay(10);
2516 }
2517
2518 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2519 }
2520
2521 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2522
2523 pci_disable_rom(ha->pdev);
2524
2525 /* Get PCI bus information. */
2526 spin_lock_irqsave(&ha->hardware_lock, flags);
2527 ha->pci_attr = rd_reg_word(®->ctrl_status);
2528 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2529
2530 return QLA_SUCCESS;
2531 }
2532
2533 /**
2534 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
2535 * @vha: HA context
2536 *
2537 * Returns 0 on success.
2538 */
2539 int
qla24xx_pci_config(scsi_qla_host_t * vha)2540 qla24xx_pci_config(scsi_qla_host_t *vha)
2541 {
2542 uint16_t w;
2543 unsigned long flags = 0;
2544 struct qla_hw_data *ha = vha->hw;
2545 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2546
2547 pci_set_master(ha->pdev);
2548 pci_try_set_mwi(ha->pdev);
2549
2550 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2551 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2552 w &= ~PCI_COMMAND_INTX_DISABLE;
2553 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2554
2555 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2556
2557 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
2558 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
2559 pcix_set_mmrbc(ha->pdev, 2048);
2560
2561 /* PCIe -- adjust Maximum Read Request Size (2048). */
2562 if (pci_is_pcie(ha->pdev))
2563 pcie_set_readrq(ha->pdev, 4096);
2564
2565 pci_disable_rom(ha->pdev);
2566
2567 ha->chip_revision = ha->pdev->revision;
2568
2569 /* Get PCI bus information. */
2570 spin_lock_irqsave(&ha->hardware_lock, flags);
2571 ha->pci_attr = rd_reg_dword(®->ctrl_status);
2572 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2573
2574 return QLA_SUCCESS;
2575 }
2576
2577 /**
2578 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
2579 * @vha: HA context
2580 *
2581 * Returns 0 on success.
2582 */
2583 int
qla25xx_pci_config(scsi_qla_host_t * vha)2584 qla25xx_pci_config(scsi_qla_host_t *vha)
2585 {
2586 uint16_t w;
2587 struct qla_hw_data *ha = vha->hw;
2588
2589 pci_set_master(ha->pdev);
2590 pci_try_set_mwi(ha->pdev);
2591
2592 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2593 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2594 w &= ~PCI_COMMAND_INTX_DISABLE;
2595 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2596
2597 /* PCIe -- adjust Maximum Read Request Size (2048). */
2598 if (pci_is_pcie(ha->pdev))
2599 pcie_set_readrq(ha->pdev, 4096);
2600
2601 pci_disable_rom(ha->pdev);
2602
2603 ha->chip_revision = ha->pdev->revision;
2604
2605 return QLA_SUCCESS;
2606 }
2607
2608 /**
2609 * qla2x00_isp_firmware() - Choose firmware image.
2610 * @vha: HA context
2611 *
2612 * Returns 0 on success.
2613 */
2614 static int
qla2x00_isp_firmware(scsi_qla_host_t * vha)2615 qla2x00_isp_firmware(scsi_qla_host_t *vha)
2616 {
2617 int rval;
2618 uint16_t loop_id, topo, sw_cap;
2619 uint8_t domain, area, al_pa;
2620 struct qla_hw_data *ha = vha->hw;
2621
2622 /* Assume loading risc code */
2623 rval = QLA_FUNCTION_FAILED;
2624
2625 if (ha->flags.disable_risc_code_load) {
2626 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
2627
2628 /* Verify checksum of loaded RISC code. */
2629 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
2630 if (rval == QLA_SUCCESS) {
2631 /* And, verify we are not in ROM code. */
2632 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
2633 &area, &domain, &topo, &sw_cap);
2634 }
2635 }
2636
2637 if (rval)
2638 ql_dbg(ql_dbg_init, vha, 0x007a,
2639 "**** Load RISC code ****.\n");
2640
2641 return (rval);
2642 }
2643
2644 /**
2645 * qla2x00_reset_chip() - Reset ISP chip.
2646 * @vha: HA context
2647 *
2648 * Returns 0 on success.
2649 */
2650 int
qla2x00_reset_chip(scsi_qla_host_t * vha)2651 qla2x00_reset_chip(scsi_qla_host_t *vha)
2652 {
2653 unsigned long flags = 0;
2654 struct qla_hw_data *ha = vha->hw;
2655 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2656 uint32_t cnt;
2657 uint16_t cmd;
2658 int rval = QLA_FUNCTION_FAILED;
2659
2660 if (unlikely(pci_channel_offline(ha->pdev)))
2661 return rval;
2662
2663 ha->isp_ops->disable_intrs(ha);
2664
2665 spin_lock_irqsave(&ha->hardware_lock, flags);
2666
2667 /* Turn off master enable */
2668 cmd = 0;
2669 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
2670 cmd &= ~PCI_COMMAND_MASTER;
2671 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2672
2673 if (!IS_QLA2100(ha)) {
2674 /* Pause RISC. */
2675 wrt_reg_word(®->hccr, HCCR_PAUSE_RISC);
2676 if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
2677 for (cnt = 0; cnt < 30000; cnt++) {
2678 if ((rd_reg_word(®->hccr) &
2679 HCCR_RISC_PAUSE) != 0)
2680 break;
2681 udelay(100);
2682 }
2683 } else {
2684 rd_reg_word(®->hccr); /* PCI Posting. */
2685 udelay(10);
2686 }
2687
2688 /* Select FPM registers. */
2689 wrt_reg_word(®->ctrl_status, 0x20);
2690 rd_reg_word(®->ctrl_status); /* PCI Posting. */
2691
2692 /* FPM Soft Reset. */
2693 wrt_reg_word(®->fpm_diag_config, 0x100);
2694 rd_reg_word(®->fpm_diag_config); /* PCI Posting. */
2695
2696 /* Toggle Fpm Reset. */
2697 if (!IS_QLA2200(ha)) {
2698 wrt_reg_word(®->fpm_diag_config, 0x0);
2699 rd_reg_word(®->fpm_diag_config); /* PCI Posting. */
2700 }
2701
2702 /* Select frame buffer registers. */
2703 wrt_reg_word(®->ctrl_status, 0x10);
2704 rd_reg_word(®->ctrl_status); /* PCI Posting. */
2705
2706 /* Reset frame buffer FIFOs. */
2707 if (IS_QLA2200(ha)) {
2708 WRT_FB_CMD_REG(ha, reg, 0xa000);
2709 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
2710 } else {
2711 WRT_FB_CMD_REG(ha, reg, 0x00fc);
2712
2713 /* Read back fb_cmd until zero or 3 seconds max */
2714 for (cnt = 0; cnt < 3000; cnt++) {
2715 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
2716 break;
2717 udelay(100);
2718 }
2719 }
2720
2721 /* Select RISC module registers. */
2722 wrt_reg_word(®->ctrl_status, 0);
2723 rd_reg_word(®->ctrl_status); /* PCI Posting. */
2724
2725 /* Reset RISC processor. */
2726 wrt_reg_word(®->hccr, HCCR_RESET_RISC);
2727 rd_reg_word(®->hccr); /* PCI Posting. */
2728
2729 /* Release RISC processor. */
2730 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC);
2731 rd_reg_word(®->hccr); /* PCI Posting. */
2732 }
2733
2734 wrt_reg_word(®->hccr, HCCR_CLR_RISC_INT);
2735 wrt_reg_word(®->hccr, HCCR_CLR_HOST_INT);
2736
2737 /* Reset ISP chip. */
2738 wrt_reg_word(®->ctrl_status, CSR_ISP_SOFT_RESET);
2739
2740 /* Wait for RISC to recover from reset. */
2741 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2742 /*
2743 * It is necessary to for a delay here since the card doesn't
2744 * respond to PCI reads during a reset. On some architectures
2745 * this will result in an MCA.
2746 */
2747 udelay(20);
2748 for (cnt = 30000; cnt; cnt--) {
2749 if ((rd_reg_word(®->ctrl_status) &
2750 CSR_ISP_SOFT_RESET) == 0)
2751 break;
2752 udelay(100);
2753 }
2754 } else
2755 udelay(10);
2756
2757 /* Reset RISC processor. */
2758 wrt_reg_word(®->hccr, HCCR_RESET_RISC);
2759
2760 wrt_reg_word(®->semaphore, 0);
2761
2762 /* Release RISC processor. */
2763 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC);
2764 rd_reg_word(®->hccr); /* PCI Posting. */
2765
2766 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2767 for (cnt = 0; cnt < 30000; cnt++) {
2768 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
2769 break;
2770
2771 udelay(100);
2772 }
2773 } else
2774 udelay(100);
2775
2776 /* Turn on master enable */
2777 cmd |= PCI_COMMAND_MASTER;
2778 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2779
2780 /* Disable RISC pause on FPM parity error. */
2781 if (!IS_QLA2100(ha)) {
2782 wrt_reg_word(®->hccr, HCCR_DISABLE_PARITY_PAUSE);
2783 rd_reg_word(®->hccr); /* PCI Posting. */
2784 }
2785
2786 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2787
2788 return QLA_SUCCESS;
2789 }
2790
2791 /**
2792 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
2793 * @vha: HA context
2794 *
2795 * Returns 0 on success.
2796 */
2797 static int
qla81xx_reset_mpi(scsi_qla_host_t * vha)2798 qla81xx_reset_mpi(scsi_qla_host_t *vha)
2799 {
2800 uint16_t mb[4] = {0x1010, 0, 1, 0};
2801
2802 if (!IS_QLA81XX(vha->hw))
2803 return QLA_SUCCESS;
2804
2805 return qla81xx_write_mpi_register(vha, mb);
2806 }
2807
2808 /**
2809 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
2810 * @vha: HA context
2811 *
2812 * Returns 0 on success.
2813 */
2814 static inline int
qla24xx_reset_risc(scsi_qla_host_t * vha)2815 qla24xx_reset_risc(scsi_qla_host_t *vha)
2816 {
2817 unsigned long flags = 0;
2818 struct qla_hw_data *ha = vha->hw;
2819 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2820 uint32_t cnt;
2821 uint16_t wd;
2822 static int abts_cnt; /* ISP abort retry counts */
2823 int rval = QLA_SUCCESS;
2824
2825 spin_lock_irqsave(&ha->hardware_lock, flags);
2826
2827 /* Reset RISC. */
2828 wrt_reg_dword(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
2829 for (cnt = 0; cnt < 30000; cnt++) {
2830 if ((rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
2831 break;
2832
2833 udelay(10);
2834 }
2835
2836 if (!(rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE))
2837 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags);
2838
2839 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e,
2840 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n",
2841 rd_reg_dword(®->hccr),
2842 rd_reg_dword(®->ctrl_status),
2843 (rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE));
2844
2845 wrt_reg_dword(®->ctrl_status,
2846 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
2847 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
2848
2849 udelay(100);
2850
2851 /* Wait for firmware to complete NVRAM accesses. */
2852 rd_reg_word(®->mailbox0);
2853 for (cnt = 10000; rd_reg_word(®->mailbox0) != 0 &&
2854 rval == QLA_SUCCESS; cnt--) {
2855 barrier();
2856 if (cnt)
2857 udelay(5);
2858 else
2859 rval = QLA_FUNCTION_TIMEOUT;
2860 }
2861
2862 if (rval == QLA_SUCCESS)
2863 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags);
2864
2865 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f,
2866 "HCCR: 0x%x, MailBox0 Status 0x%x\n",
2867 rd_reg_dword(®->hccr),
2868 rd_reg_word(®->mailbox0));
2869
2870 /* Wait for soft-reset to complete. */
2871 rd_reg_dword(®->ctrl_status);
2872 for (cnt = 0; cnt < 60; cnt++) {
2873 barrier();
2874 if ((rd_reg_dword(®->ctrl_status) &
2875 CSRX_ISP_SOFT_RESET) == 0)
2876 break;
2877
2878 udelay(5);
2879 }
2880 if (!(rd_reg_dword(®->ctrl_status) & CSRX_ISP_SOFT_RESET))
2881 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags);
2882
2883 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d,
2884 "HCCR: 0x%x, Soft Reset status: 0x%x\n",
2885 rd_reg_dword(®->hccr),
2886 rd_reg_dword(®->ctrl_status));
2887
2888 /* If required, do an MPI FW reset now */
2889 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
2890 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
2891 if (++abts_cnt < 5) {
2892 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2893 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
2894 } else {
2895 /*
2896 * We exhausted the ISP abort retries. We have to
2897 * set the board offline.
2898 */
2899 abts_cnt = 0;
2900 vha->flags.online = 0;
2901 }
2902 }
2903 }
2904
2905 wrt_reg_dword(®->hccr, HCCRX_SET_RISC_RESET);
2906 rd_reg_dword(®->hccr);
2907
2908 wrt_reg_dword(®->hccr, HCCRX_REL_RISC_PAUSE);
2909 rd_reg_dword(®->hccr);
2910
2911 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_RESET);
2912 rd_reg_dword(®->hccr);
2913
2914 rd_reg_word(®->mailbox0);
2915 for (cnt = 60; rd_reg_word(®->mailbox0) != 0 &&
2916 rval == QLA_SUCCESS; cnt--) {
2917 barrier();
2918 if (cnt)
2919 udelay(5);
2920 else
2921 rval = QLA_FUNCTION_TIMEOUT;
2922 }
2923 if (rval == QLA_SUCCESS)
2924 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags);
2925
2926 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e,
2927 "Host Risc 0x%x, mailbox0 0x%x\n",
2928 rd_reg_dword(®->hccr),
2929 rd_reg_word(®->mailbox0));
2930
2931 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2932
2933 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f,
2934 "Driver in %s mode\n",
2935 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling");
2936
2937 if (IS_NOPOLLING_TYPE(ha))
2938 ha->isp_ops->enable_intrs(ha);
2939
2940 return rval;
2941 }
2942
2943 static void
qla25xx_read_risc_sema_reg(scsi_qla_host_t * vha,uint32_t * data)2944 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data)
2945 {
2946 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2947
2948 wrt_reg_dword(®->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2949 *data = rd_reg_dword(®->iobase_window + RISC_REGISTER_WINDOW_OFFSET);
2950 }
2951
2952 static void
qla25xx_write_risc_sema_reg(scsi_qla_host_t * vha,uint32_t data)2953 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data)
2954 {
2955 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2956
2957 wrt_reg_dword(®->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2958 wrt_reg_dword(®->iobase_window + RISC_REGISTER_WINDOW_OFFSET, data);
2959 }
2960
2961 static void
qla25xx_manipulate_risc_semaphore(scsi_qla_host_t * vha)2962 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha)
2963 {
2964 uint32_t wd32 = 0;
2965 uint delta_msec = 100;
2966 uint elapsed_msec = 0;
2967 uint timeout_msec;
2968 ulong n;
2969
2970 if (vha->hw->pdev->subsystem_device != 0x0175 &&
2971 vha->hw->pdev->subsystem_device != 0x0240)
2972 return;
2973
2974 wrt_reg_dword(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE);
2975 udelay(100);
2976
2977 attempt:
2978 timeout_msec = TIMEOUT_SEMAPHORE;
2979 n = timeout_msec / delta_msec;
2980 while (n--) {
2981 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET);
2982 qla25xx_read_risc_sema_reg(vha, &wd32);
2983 if (wd32 & RISC_SEMAPHORE)
2984 break;
2985 msleep(delta_msec);
2986 elapsed_msec += delta_msec;
2987 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
2988 goto force;
2989 }
2990
2991 if (!(wd32 & RISC_SEMAPHORE))
2992 goto force;
2993
2994 if (!(wd32 & RISC_SEMAPHORE_FORCE))
2995 goto acquired;
2996
2997 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR);
2998 timeout_msec = TIMEOUT_SEMAPHORE_FORCE;
2999 n = timeout_msec / delta_msec;
3000 while (n--) {
3001 qla25xx_read_risc_sema_reg(vha, &wd32);
3002 if (!(wd32 & RISC_SEMAPHORE_FORCE))
3003 break;
3004 msleep(delta_msec);
3005 elapsed_msec += delta_msec;
3006 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
3007 goto force;
3008 }
3009
3010 if (wd32 & RISC_SEMAPHORE_FORCE)
3011 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR);
3012
3013 goto attempt;
3014
3015 force:
3016 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET);
3017
3018 acquired:
3019 return;
3020 }
3021
3022 /**
3023 * qla24xx_reset_chip() - Reset ISP24xx chip.
3024 * @vha: HA context
3025 *
3026 * Returns 0 on success.
3027 */
3028 int
qla24xx_reset_chip(scsi_qla_host_t * vha)3029 qla24xx_reset_chip(scsi_qla_host_t *vha)
3030 {
3031 struct qla_hw_data *ha = vha->hw;
3032 int rval = QLA_FUNCTION_FAILED;
3033
3034 if (pci_channel_offline(ha->pdev) &&
3035 ha->flags.pci_channel_io_perm_failure) {
3036 return rval;
3037 }
3038
3039 ha->isp_ops->disable_intrs(ha);
3040
3041 qla25xx_manipulate_risc_semaphore(vha);
3042
3043 /* Perform RISC reset. */
3044 rval = qla24xx_reset_risc(vha);
3045
3046 return rval;
3047 }
3048
3049 /**
3050 * qla2x00_chip_diag() - Test chip for proper operation.
3051 * @vha: HA context
3052 *
3053 * Returns 0 on success.
3054 */
3055 int
qla2x00_chip_diag(scsi_qla_host_t * vha)3056 qla2x00_chip_diag(scsi_qla_host_t *vha)
3057 {
3058 int rval;
3059 struct qla_hw_data *ha = vha->hw;
3060 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3061 unsigned long flags = 0;
3062 uint16_t data;
3063 uint32_t cnt;
3064 uint16_t mb[5];
3065 struct req_que *req = ha->req_q_map[0];
3066
3067 /* Assume a failed state */
3068 rval = QLA_FUNCTION_FAILED;
3069
3070 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n",
3071 ®->flash_address);
3072
3073 spin_lock_irqsave(&ha->hardware_lock, flags);
3074
3075 /* Reset ISP chip. */
3076 wrt_reg_word(®->ctrl_status, CSR_ISP_SOFT_RESET);
3077
3078 /*
3079 * We need to have a delay here since the card will not respond while
3080 * in reset causing an MCA on some architectures.
3081 */
3082 udelay(20);
3083 data = qla2x00_debounce_register(®->ctrl_status);
3084 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
3085 udelay(5);
3086 data = rd_reg_word(®->ctrl_status);
3087 barrier();
3088 }
3089
3090 if (!cnt)
3091 goto chip_diag_failed;
3092
3093 ql_dbg(ql_dbg_init, vha, 0x007c,
3094 "Reset register cleared by chip reset.\n");
3095
3096 /* Reset RISC processor. */
3097 wrt_reg_word(®->hccr, HCCR_RESET_RISC);
3098 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC);
3099
3100 /* Workaround for QLA2312 PCI parity error */
3101 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
3102 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
3103 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
3104 udelay(5);
3105 data = RD_MAILBOX_REG(ha, reg, 0);
3106 barrier();
3107 }
3108 } else
3109 udelay(10);
3110
3111 if (!cnt)
3112 goto chip_diag_failed;
3113
3114 /* Check product ID of chip */
3115 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n");
3116
3117 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
3118 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
3119 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
3120 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
3121 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
3122 mb[3] != PROD_ID_3) {
3123 ql_log(ql_log_warn, vha, 0x0062,
3124 "Wrong product ID = 0x%x,0x%x,0x%x.\n",
3125 mb[1], mb[2], mb[3]);
3126
3127 goto chip_diag_failed;
3128 }
3129 ha->product_id[0] = mb[1];
3130 ha->product_id[1] = mb[2];
3131 ha->product_id[2] = mb[3];
3132 ha->product_id[3] = mb[4];
3133
3134 /* Adjust fw RISC transfer size */
3135 if (req->length > 1024)
3136 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
3137 else
3138 ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
3139 req->length;
3140
3141 if (IS_QLA2200(ha) &&
3142 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
3143 /* Limit firmware transfer size with a 2200A */
3144 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
3145
3146 ha->device_type |= DT_ISP2200A;
3147 ha->fw_transfer_size = 128;
3148 }
3149
3150 /* Wrap Incoming Mailboxes Test. */
3151 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3152
3153 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
3154 rval = qla2x00_mbx_reg_test(vha);
3155 if (rval)
3156 ql_log(ql_log_warn, vha, 0x0080,
3157 "Failed mailbox send register test.\n");
3158 else
3159 /* Flag a successful rval */
3160 rval = QLA_SUCCESS;
3161 spin_lock_irqsave(&ha->hardware_lock, flags);
3162
3163 chip_diag_failed:
3164 if (rval)
3165 ql_log(ql_log_info, vha, 0x0081,
3166 "Chip diagnostics **** FAILED ****.\n");
3167
3168 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3169
3170 return (rval);
3171 }
3172
3173 /**
3174 * qla24xx_chip_diag() - Test ISP24xx for proper operation.
3175 * @vha: HA context
3176 *
3177 * Returns 0 on success.
3178 */
3179 int
qla24xx_chip_diag(scsi_qla_host_t * vha)3180 qla24xx_chip_diag(scsi_qla_host_t *vha)
3181 {
3182 int rval;
3183 struct qla_hw_data *ha = vha->hw;
3184 struct req_que *req = ha->req_q_map[0];
3185
3186 if (IS_P3P_TYPE(ha))
3187 return QLA_SUCCESS;
3188
3189 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
3190
3191 rval = qla2x00_mbx_reg_test(vha);
3192 if (rval) {
3193 ql_log(ql_log_warn, vha, 0x0082,
3194 "Failed mailbox send register test.\n");
3195 } else {
3196 /* Flag a successful rval */
3197 rval = QLA_SUCCESS;
3198 }
3199
3200 return rval;
3201 }
3202
3203 static void
qla2x00_init_fce_trace(scsi_qla_host_t * vha)3204 qla2x00_init_fce_trace(scsi_qla_host_t *vha)
3205 {
3206 int rval;
3207 dma_addr_t tc_dma;
3208 void *tc;
3209 struct qla_hw_data *ha = vha->hw;
3210
3211 if (!IS_FWI2_CAPABLE(ha))
3212 return;
3213
3214 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
3215 !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
3216 return;
3217
3218 if (ha->fce) {
3219 ql_dbg(ql_dbg_init, vha, 0x00bd,
3220 "%s: FCE Mem is already allocated.\n",
3221 __func__);
3222 return;
3223 }
3224
3225 /* Allocate memory for Fibre Channel Event Buffer. */
3226 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
3227 GFP_KERNEL);
3228 if (!tc) {
3229 ql_log(ql_log_warn, vha, 0x00be,
3230 "Unable to allocate (%d KB) for FCE.\n",
3231 FCE_SIZE / 1024);
3232 return;
3233 }
3234
3235 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
3236 ha->fce_mb, &ha->fce_bufs);
3237 if (rval) {
3238 ql_log(ql_log_warn, vha, 0x00bf,
3239 "Unable to initialize FCE (%d).\n", rval);
3240 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, tc_dma);
3241 return;
3242 }
3243
3244 ql_dbg(ql_dbg_init, vha, 0x00c0,
3245 "Allocated (%d KB) for FCE...\n", FCE_SIZE / 1024);
3246
3247 ha->flags.fce_enabled = 1;
3248 ha->fce_dma = tc_dma;
3249 ha->fce = tc;
3250 }
3251
3252 static void
qla2x00_init_eft_trace(scsi_qla_host_t * vha)3253 qla2x00_init_eft_trace(scsi_qla_host_t *vha)
3254 {
3255 int rval;
3256 dma_addr_t tc_dma;
3257 void *tc;
3258 struct qla_hw_data *ha = vha->hw;
3259
3260 if (!IS_FWI2_CAPABLE(ha))
3261 return;
3262
3263 if (ha->eft) {
3264 ql_dbg(ql_dbg_init, vha, 0x00bd,
3265 "%s: EFT Mem is already allocated.\n",
3266 __func__);
3267 return;
3268 }
3269
3270 /* Allocate memory for Extended Trace Buffer. */
3271 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
3272 GFP_KERNEL);
3273 if (!tc) {
3274 ql_log(ql_log_warn, vha, 0x00c1,
3275 "Unable to allocate (%d KB) for EFT.\n",
3276 EFT_SIZE / 1024);
3277 return;
3278 }
3279
3280 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
3281 if (rval) {
3282 ql_log(ql_log_warn, vha, 0x00c2,
3283 "Unable to initialize EFT (%d).\n", rval);
3284 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, tc_dma);
3285 return;
3286 }
3287
3288 ql_dbg(ql_dbg_init, vha, 0x00c3,
3289 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
3290
3291 ha->eft_dma = tc_dma;
3292 ha->eft = tc;
3293 }
3294
3295 static void
qla2x00_alloc_offload_mem(scsi_qla_host_t * vha)3296 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha)
3297 {
3298 qla2x00_init_fce_trace(vha);
3299 qla2x00_init_eft_trace(vha);
3300 }
3301
3302 void
qla2x00_alloc_fw_dump(scsi_qla_host_t * vha)3303 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
3304 {
3305 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
3306 eft_size, fce_size, mq_size;
3307 struct qla_hw_data *ha = vha->hw;
3308 struct req_que *req = ha->req_q_map[0];
3309 struct rsp_que *rsp = ha->rsp_q_map[0];
3310 struct qla2xxx_fw_dump *fw_dump;
3311
3312 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
3313 req_q_size = rsp_q_size = 0;
3314
3315 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3316 fixed_size = sizeof(struct qla2100_fw_dump);
3317 } else if (IS_QLA23XX(ha)) {
3318 fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
3319 mem_size = (ha->fw_memory_size - 0x11000 + 1) *
3320 sizeof(uint16_t);
3321 } else if (IS_FWI2_CAPABLE(ha)) {
3322 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
3323 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
3324 else if (IS_QLA81XX(ha))
3325 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
3326 else if (IS_QLA25XX(ha))
3327 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
3328 else
3329 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
3330
3331 mem_size = (ha->fw_memory_size - 0x100000 + 1) *
3332 sizeof(uint32_t);
3333 if (ha->mqenable) {
3334 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha) &&
3335 !IS_QLA28XX(ha))
3336 mq_size = sizeof(struct qla2xxx_mq_chain);
3337 /*
3338 * Allocate maximum buffer size for all queues - Q0.
3339 * Resizing must be done at end-of-dump processing.
3340 */
3341 mq_size += (ha->max_req_queues - 1) *
3342 (req->length * sizeof(request_t));
3343 mq_size += (ha->max_rsp_queues - 1) *
3344 (rsp->length * sizeof(response_t));
3345 }
3346 if (ha->tgt.atio_ring)
3347 mq_size += ha->tgt.atio_q_length * sizeof(request_t);
3348
3349 qla2x00_init_fce_trace(vha);
3350 if (ha->fce)
3351 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
3352 qla2x00_init_eft_trace(vha);
3353 if (ha->eft)
3354 eft_size = EFT_SIZE;
3355 }
3356
3357 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
3358 struct fwdt *fwdt = ha->fwdt;
3359 uint j;
3360
3361 for (j = 0; j < 2; j++, fwdt++) {
3362 if (!fwdt->template) {
3363 ql_dbg(ql_dbg_init, vha, 0x00ba,
3364 "-> fwdt%u no template\n", j);
3365 continue;
3366 }
3367 ql_dbg(ql_dbg_init, vha, 0x00fa,
3368 "-> fwdt%u calculating fwdump size...\n", j);
3369 fwdt->dump_size = qla27xx_fwdt_calculate_dump_size(
3370 vha, fwdt->template);
3371 ql_dbg(ql_dbg_init, vha, 0x00fa,
3372 "-> fwdt%u calculated fwdump size = %#lx bytes\n",
3373 j, fwdt->dump_size);
3374 dump_size += fwdt->dump_size;
3375 }
3376 /* Add space for spare MPI fw dump. */
3377 dump_size += ha->fwdt[1].dump_size;
3378 } else {
3379 req_q_size = req->length * sizeof(request_t);
3380 rsp_q_size = rsp->length * sizeof(response_t);
3381 dump_size = offsetof(struct qla2xxx_fw_dump, isp);
3382 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size
3383 + eft_size;
3384 ha->chain_offset = dump_size;
3385 dump_size += mq_size + fce_size;
3386 if (ha->exchoffld_buf)
3387 dump_size += sizeof(struct qla2xxx_offld_chain) +
3388 ha->exchoffld_size;
3389 if (ha->exlogin_buf)
3390 dump_size += sizeof(struct qla2xxx_offld_chain) +
3391 ha->exlogin_size;
3392 }
3393
3394 if (!ha->fw_dump_len || dump_size > ha->fw_dump_alloc_len) {
3395
3396 ql_dbg(ql_dbg_init, vha, 0x00c5,
3397 "%s dump_size %d fw_dump_len %d fw_dump_alloc_len %d\n",
3398 __func__, dump_size, ha->fw_dump_len,
3399 ha->fw_dump_alloc_len);
3400
3401 fw_dump = vmalloc(dump_size);
3402 if (!fw_dump) {
3403 ql_log(ql_log_warn, vha, 0x00c4,
3404 "Unable to allocate (%d KB) for firmware dump.\n",
3405 dump_size / 1024);
3406 } else {
3407 mutex_lock(&ha->optrom_mutex);
3408 if (ha->fw_dumped) {
3409 memcpy(fw_dump, ha->fw_dump, ha->fw_dump_len);
3410 vfree(ha->fw_dump);
3411 ha->fw_dump = fw_dump;
3412 ha->fw_dump_alloc_len = dump_size;
3413 ql_dbg(ql_dbg_init, vha, 0x00c5,
3414 "Re-Allocated (%d KB) and save firmware dump.\n",
3415 dump_size / 1024);
3416 } else {
3417 if (ha->fw_dump)
3418 vfree(ha->fw_dump);
3419 ha->fw_dump = fw_dump;
3420
3421 ha->fw_dump_len = ha->fw_dump_alloc_len =
3422 dump_size;
3423 ql_dbg(ql_dbg_init, vha, 0x00c5,
3424 "Allocated (%d KB) for firmware dump.\n",
3425 dump_size / 1024);
3426
3427 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
3428 ha->mpi_fw_dump = (char *)fw_dump +
3429 ha->fwdt[1].dump_size;
3430 mutex_unlock(&ha->optrom_mutex);
3431 return;
3432 }
3433
3434 ha->fw_dump->signature[0] = 'Q';
3435 ha->fw_dump->signature[1] = 'L';
3436 ha->fw_dump->signature[2] = 'G';
3437 ha->fw_dump->signature[3] = 'C';
3438 ha->fw_dump->version = htonl(1);
3439
3440 ha->fw_dump->fixed_size = htonl(fixed_size);
3441 ha->fw_dump->mem_size = htonl(mem_size);
3442 ha->fw_dump->req_q_size = htonl(req_q_size);
3443 ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
3444
3445 ha->fw_dump->eft_size = htonl(eft_size);
3446 ha->fw_dump->eft_addr_l =
3447 htonl(LSD(ha->eft_dma));
3448 ha->fw_dump->eft_addr_h =
3449 htonl(MSD(ha->eft_dma));
3450
3451 ha->fw_dump->header_size =
3452 htonl(offsetof
3453 (struct qla2xxx_fw_dump, isp));
3454 }
3455 mutex_unlock(&ha->optrom_mutex);
3456 }
3457 }
3458 }
3459
3460 static int
qla81xx_mpi_sync(scsi_qla_host_t * vha)3461 qla81xx_mpi_sync(scsi_qla_host_t *vha)
3462 {
3463 #define MPS_MASK 0xe0
3464 int rval;
3465 uint16_t dc;
3466 uint32_t dw;
3467
3468 if (!IS_QLA81XX(vha->hw))
3469 return QLA_SUCCESS;
3470
3471 rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
3472 if (rval != QLA_SUCCESS) {
3473 ql_log(ql_log_warn, vha, 0x0105,
3474 "Unable to acquire semaphore.\n");
3475 goto done;
3476 }
3477
3478 pci_read_config_word(vha->hw->pdev, 0x54, &dc);
3479 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
3480 if (rval != QLA_SUCCESS) {
3481 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
3482 goto done_release;
3483 }
3484
3485 dc &= MPS_MASK;
3486 if (dc == (dw & MPS_MASK))
3487 goto done_release;
3488
3489 dw &= ~MPS_MASK;
3490 dw |= dc;
3491 rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
3492 if (rval != QLA_SUCCESS) {
3493 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
3494 }
3495
3496 done_release:
3497 rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
3498 if (rval != QLA_SUCCESS) {
3499 ql_log(ql_log_warn, vha, 0x006d,
3500 "Unable to release semaphore.\n");
3501 }
3502
3503 done:
3504 return rval;
3505 }
3506
3507 int
qla2x00_alloc_outstanding_cmds(struct qla_hw_data * ha,struct req_que * req)3508 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req)
3509 {
3510 /* Don't try to reallocate the array */
3511 if (req->outstanding_cmds)
3512 return QLA_SUCCESS;
3513
3514 if (!IS_FWI2_CAPABLE(ha))
3515 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS;
3516 else {
3517 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count)
3518 req->num_outstanding_cmds = ha->cur_fw_xcb_count;
3519 else
3520 req->num_outstanding_cmds = ha->cur_fw_iocb_count;
3521 }
3522
3523 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
3524 sizeof(srb_t *),
3525 GFP_KERNEL);
3526
3527 if (!req->outstanding_cmds) {
3528 /*
3529 * Try to allocate a minimal size just so we can get through
3530 * initialization.
3531 */
3532 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS;
3533 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
3534 sizeof(srb_t *),
3535 GFP_KERNEL);
3536
3537 if (!req->outstanding_cmds) {
3538 ql_log(ql_log_fatal, NULL, 0x0126,
3539 "Failed to allocate memory for "
3540 "outstanding_cmds for req_que %p.\n", req);
3541 req->num_outstanding_cmds = 0;
3542 return QLA_FUNCTION_FAILED;
3543 }
3544 }
3545
3546 return QLA_SUCCESS;
3547 }
3548
3549 #define PRINT_FIELD(_field, _flag, _str) { \
3550 if (a0->_field & _flag) {\
3551 if (p) {\
3552 strcat(ptr, "|");\
3553 ptr++;\
3554 leftover--;\
3555 } \
3556 len = snprintf(ptr, leftover, "%s", _str); \
3557 p = 1;\
3558 leftover -= len;\
3559 ptr += len; \
3560 } \
3561 }
3562
qla2xxx_print_sfp_info(struct scsi_qla_host * vha)3563 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha)
3564 {
3565 #define STR_LEN 64
3566 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data;
3567 u8 str[STR_LEN], *ptr, p;
3568 int leftover, len;
3569
3570 memset(str, 0, STR_LEN);
3571 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name);
3572 ql_dbg(ql_dbg_init, vha, 0x015a,
3573 "SFP MFG Name: %s\n", str);
3574
3575 memset(str, 0, STR_LEN);
3576 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn);
3577 ql_dbg(ql_dbg_init, vha, 0x015c,
3578 "SFP Part Name: %s\n", str);
3579
3580 /* media */
3581 memset(str, 0, STR_LEN);
3582 ptr = str;
3583 leftover = STR_LEN;
3584 p = len = 0;
3585 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX");
3586 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair");
3587 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax");
3588 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax");
3589 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um");
3590 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um");
3591 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode");
3592 ql_dbg(ql_dbg_init, vha, 0x0160,
3593 "SFP Media: %s\n", str);
3594
3595 /* link length */
3596 memset(str, 0, STR_LEN);
3597 ptr = str;
3598 leftover = STR_LEN;
3599 p = len = 0;
3600 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long");
3601 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short");
3602 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate");
3603 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long");
3604 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium");
3605 ql_dbg(ql_dbg_init, vha, 0x0196,
3606 "SFP Link Length: %s\n", str);
3607
3608 memset(str, 0, STR_LEN);
3609 ptr = str;
3610 leftover = STR_LEN;
3611 p = len = 0;
3612 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)");
3613 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)");
3614 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)");
3615 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)");
3616 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)");
3617 ql_dbg(ql_dbg_init, vha, 0x016e,
3618 "SFP FC Link Tech: %s\n", str);
3619
3620 if (a0->length_km)
3621 ql_dbg(ql_dbg_init, vha, 0x016f,
3622 "SFP Distant: %d km\n", a0->length_km);
3623 if (a0->length_100m)
3624 ql_dbg(ql_dbg_init, vha, 0x0170,
3625 "SFP Distant: %d m\n", a0->length_100m*100);
3626 if (a0->length_50um_10m)
3627 ql_dbg(ql_dbg_init, vha, 0x0189,
3628 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10);
3629 if (a0->length_62um_10m)
3630 ql_dbg(ql_dbg_init, vha, 0x018a,
3631 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10);
3632 if (a0->length_om4_10m)
3633 ql_dbg(ql_dbg_init, vha, 0x0194,
3634 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10);
3635 if (a0->length_om3_10m)
3636 ql_dbg(ql_dbg_init, vha, 0x0195,
3637 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10);
3638 }
3639
3640
3641 /**
3642 * qla24xx_detect_sfp()
3643 *
3644 * @vha: adapter state pointer.
3645 *
3646 * @return
3647 * 0 -- Configure firmware to use short-range settings -- normal
3648 * buffer-to-buffer credits.
3649 *
3650 * 1 -- Configure firmware to use long-range settings -- extra
3651 * buffer-to-buffer credits should be allocated with
3652 * ha->lr_distance containing distance settings from NVRAM or SFP
3653 * (if supported).
3654 */
3655 int
qla24xx_detect_sfp(scsi_qla_host_t * vha)3656 qla24xx_detect_sfp(scsi_qla_host_t *vha)
3657 {
3658 int rc, used_nvram;
3659 struct sff_8247_a0 *a;
3660 struct qla_hw_data *ha = vha->hw;
3661 struct nvram_81xx *nv = ha->nvram;
3662 #define LR_DISTANCE_UNKNOWN 2
3663 static const char * const types[] = { "Short", "Long" };
3664 static const char * const lengths[] = { "(10km)", "(5km)", "" };
3665 u8 ll = 0;
3666
3667 /* Seed with NVRAM settings. */
3668 used_nvram = 0;
3669 ha->flags.lr_detected = 0;
3670 if (IS_BPM_RANGE_CAPABLE(ha) &&
3671 (nv->enhanced_features & NEF_LR_DIST_ENABLE)) {
3672 used_nvram = 1;
3673 ha->flags.lr_detected = 1;
3674 ha->lr_distance =
3675 (nv->enhanced_features >> LR_DIST_NV_POS)
3676 & LR_DIST_NV_MASK;
3677 }
3678
3679 if (!IS_BPM_ENABLED(vha))
3680 goto out;
3681 /* Determine SR/LR capabilities of SFP/Transceiver. */
3682 rc = qla2x00_read_sfp_dev(vha, NULL, 0);
3683 if (rc)
3684 goto out;
3685
3686 used_nvram = 0;
3687 a = (struct sff_8247_a0 *)vha->hw->sfp_data;
3688 qla2xxx_print_sfp_info(vha);
3689
3690 ha->flags.lr_detected = 0;
3691 ll = a->fc_ll_cc7;
3692 if (ll & FC_LL_VL || ll & FC_LL_L) {
3693 /* Long range, track length. */
3694 ha->flags.lr_detected = 1;
3695
3696 if (a->length_km > 5 || a->length_100m > 50)
3697 ha->lr_distance = LR_DISTANCE_10K;
3698 else
3699 ha->lr_distance = LR_DISTANCE_5K;
3700 }
3701
3702 out:
3703 ql_dbg(ql_dbg_async, vha, 0x507b,
3704 "SFP detect: %s-Range SFP %s (nvr=%x ll=%x lr=%x lrd=%x).\n",
3705 types[ha->flags.lr_detected],
3706 ha->flags.lr_detected ? lengths[ha->lr_distance] :
3707 lengths[LR_DISTANCE_UNKNOWN],
3708 used_nvram, ll, ha->flags.lr_detected, ha->lr_distance);
3709 return ha->flags.lr_detected;
3710 }
3711
qla_init_iocb_limit(scsi_qla_host_t * vha)3712 void qla_init_iocb_limit(scsi_qla_host_t *vha)
3713 {
3714 u16 i, num_qps;
3715 u32 limit;
3716 struct qla_hw_data *ha = vha->hw;
3717
3718 num_qps = ha->num_qpairs + 1;
3719 limit = (ha->orig_fw_iocb_count * QLA_IOCB_PCT_LIMIT) / 100;
3720
3721 ha->base_qpair->fwres.iocbs_total = ha->orig_fw_iocb_count;
3722 ha->base_qpair->fwres.iocbs_limit = limit;
3723 ha->base_qpair->fwres.iocbs_qp_limit = limit / num_qps;
3724 ha->base_qpair->fwres.iocbs_used = 0;
3725 for (i = 0; i < ha->max_qpairs; i++) {
3726 if (ha->queue_pair_map[i]) {
3727 ha->queue_pair_map[i]->fwres.iocbs_total =
3728 ha->orig_fw_iocb_count;
3729 ha->queue_pair_map[i]->fwres.iocbs_limit = limit;
3730 ha->queue_pair_map[i]->fwres.iocbs_qp_limit =
3731 limit / num_qps;
3732 ha->queue_pair_map[i]->fwres.iocbs_used = 0;
3733 }
3734 }
3735 }
3736
3737 /**
3738 * qla2x00_setup_chip() - Load and start RISC firmware.
3739 * @vha: HA context
3740 *
3741 * Returns 0 on success.
3742 */
3743 static int
qla2x00_setup_chip(scsi_qla_host_t * vha)3744 qla2x00_setup_chip(scsi_qla_host_t *vha)
3745 {
3746 int rval;
3747 uint32_t srisc_address = 0;
3748 struct qla_hw_data *ha = vha->hw;
3749 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3750 unsigned long flags;
3751 uint16_t fw_major_version;
3752 int done_once = 0;
3753
3754 if (IS_P3P_TYPE(ha)) {
3755 rval = ha->isp_ops->load_risc(vha, &srisc_address);
3756 if (rval == QLA_SUCCESS) {
3757 qla2x00_stop_firmware(vha);
3758 goto enable_82xx_npiv;
3759 } else
3760 goto failed;
3761 }
3762
3763 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3764 /* Disable SRAM, Instruction RAM and GP RAM parity. */
3765 spin_lock_irqsave(&ha->hardware_lock, flags);
3766 wrt_reg_word(®->hccr, (HCCR_ENABLE_PARITY + 0x0));
3767 rd_reg_word(®->hccr);
3768 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3769 }
3770
3771 qla81xx_mpi_sync(vha);
3772
3773 execute_fw_with_lr:
3774 /* Load firmware sequences */
3775 rval = ha->isp_ops->load_risc(vha, &srisc_address);
3776 if (rval == QLA_SUCCESS) {
3777 ql_dbg(ql_dbg_init, vha, 0x00c9,
3778 "Verifying Checksum of loaded RISC code.\n");
3779
3780 rval = qla2x00_verify_checksum(vha, srisc_address);
3781 if (rval == QLA_SUCCESS) {
3782 /* Start firmware execution. */
3783 ql_dbg(ql_dbg_init, vha, 0x00ca,
3784 "Starting firmware.\n");
3785
3786 if (ql2xexlogins)
3787 ha->flags.exlogins_enabled = 1;
3788
3789 if (qla_is_exch_offld_enabled(vha))
3790 ha->flags.exchoffld_enabled = 1;
3791
3792 rval = qla2x00_execute_fw(vha, srisc_address);
3793 /* Retrieve firmware information. */
3794 if (rval == QLA_SUCCESS) {
3795 /* Enable BPM support? */
3796 if (!done_once++ && qla24xx_detect_sfp(vha)) {
3797 ql_dbg(ql_dbg_init, vha, 0x00ca,
3798 "Re-starting firmware -- BPM.\n");
3799 /* Best-effort - re-init. */
3800 ha->isp_ops->reset_chip(vha);
3801 ha->isp_ops->chip_diag(vha);
3802 goto execute_fw_with_lr;
3803 }
3804
3805 if (IS_ZIO_THRESHOLD_CAPABLE(ha))
3806 qla27xx_set_zio_threshold(vha,
3807 ha->last_zio_threshold);
3808
3809 rval = qla2x00_set_exlogins_buffer(vha);
3810 if (rval != QLA_SUCCESS)
3811 goto failed;
3812
3813 rval = qla2x00_set_exchoffld_buffer(vha);
3814 if (rval != QLA_SUCCESS)
3815 goto failed;
3816
3817 enable_82xx_npiv:
3818 fw_major_version = ha->fw_major_version;
3819 if (IS_P3P_TYPE(ha))
3820 qla82xx_check_md_needed(vha);
3821 else
3822 rval = qla2x00_get_fw_version(vha);
3823 if (rval != QLA_SUCCESS)
3824 goto failed;
3825 ha->flags.npiv_supported = 0;
3826 if (IS_QLA2XXX_MIDTYPE(ha) &&
3827 (ha->fw_attributes & BIT_2)) {
3828 ha->flags.npiv_supported = 1;
3829 if ((!ha->max_npiv_vports) ||
3830 ((ha->max_npiv_vports + 1) %
3831 MIN_MULTI_ID_FABRIC))
3832 ha->max_npiv_vports =
3833 MIN_MULTI_ID_FABRIC - 1;
3834 }
3835 qla2x00_get_resource_cnts(vha);
3836 qla_init_iocb_limit(vha);
3837
3838 /*
3839 * Allocate the array of outstanding commands
3840 * now that we know the firmware resources.
3841 */
3842 rval = qla2x00_alloc_outstanding_cmds(ha,
3843 vha->req);
3844 if (rval != QLA_SUCCESS)
3845 goto failed;
3846
3847 if (!fw_major_version && !(IS_P3P_TYPE(ha)))
3848 qla2x00_alloc_offload_mem(vha);
3849
3850 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha)))
3851 qla2x00_alloc_fw_dump(vha);
3852
3853 } else {
3854 goto failed;
3855 }
3856 } else {
3857 ql_log(ql_log_fatal, vha, 0x00cd,
3858 "ISP Firmware failed checksum.\n");
3859 goto failed;
3860 }
3861
3862 /* Enable PUREX PASSTHRU */
3863 if (ql2xrdpenable || ha->flags.scm_supported_f)
3864 qla25xx_set_els_cmds_supported(vha);
3865 } else
3866 goto failed;
3867
3868 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3869 /* Enable proper parity. */
3870 spin_lock_irqsave(&ha->hardware_lock, flags);
3871 if (IS_QLA2300(ha))
3872 /* SRAM parity */
3873 wrt_reg_word(®->hccr, HCCR_ENABLE_PARITY + 0x1);
3874 else
3875 /* SRAM, Instruction RAM and GP RAM parity */
3876 wrt_reg_word(®->hccr, HCCR_ENABLE_PARITY + 0x7);
3877 rd_reg_word(®->hccr);
3878 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3879 }
3880
3881 if (IS_QLA27XX(ha) || IS_QLA28XX(ha))
3882 ha->flags.fac_supported = 1;
3883 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
3884 uint32_t size;
3885
3886 rval = qla81xx_fac_get_sector_size(vha, &size);
3887 if (rval == QLA_SUCCESS) {
3888 ha->flags.fac_supported = 1;
3889 ha->fdt_block_size = size << 2;
3890 } else {
3891 ql_log(ql_log_warn, vha, 0x00ce,
3892 "Unsupported FAC firmware (%d.%02d.%02d).\n",
3893 ha->fw_major_version, ha->fw_minor_version,
3894 ha->fw_subminor_version);
3895
3896 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3897 IS_QLA28XX(ha)) {
3898 ha->flags.fac_supported = 0;
3899 rval = QLA_SUCCESS;
3900 }
3901 }
3902 }
3903 failed:
3904 if (rval) {
3905 ql_log(ql_log_fatal, vha, 0x00cf,
3906 "Setup chip ****FAILED****.\n");
3907 }
3908
3909 return (rval);
3910 }
3911
3912 /**
3913 * qla2x00_init_response_q_entries() - Initializes response queue entries.
3914 * @rsp: response queue
3915 *
3916 * Beginning of request ring has initialization control block already built
3917 * by nvram config routine.
3918 *
3919 * Returns 0 on success.
3920 */
3921 void
qla2x00_init_response_q_entries(struct rsp_que * rsp)3922 qla2x00_init_response_q_entries(struct rsp_que *rsp)
3923 {
3924 uint16_t cnt;
3925 response_t *pkt;
3926
3927 rsp->ring_ptr = rsp->ring;
3928 rsp->ring_index = 0;
3929 rsp->status_srb = NULL;
3930 pkt = rsp->ring_ptr;
3931 for (cnt = 0; cnt < rsp->length; cnt++) {
3932 pkt->signature = RESPONSE_PROCESSED;
3933 pkt++;
3934 }
3935 }
3936
3937 /**
3938 * qla2x00_update_fw_options() - Read and process firmware options.
3939 * @vha: HA context
3940 *
3941 * Returns 0 on success.
3942 */
3943 void
qla2x00_update_fw_options(scsi_qla_host_t * vha)3944 qla2x00_update_fw_options(scsi_qla_host_t *vha)
3945 {
3946 uint16_t swing, emphasis, tx_sens, rx_sens;
3947 struct qla_hw_data *ha = vha->hw;
3948
3949 memset(ha->fw_options, 0, sizeof(ha->fw_options));
3950 qla2x00_get_fw_options(vha, ha->fw_options);
3951
3952 if (IS_QLA2100(ha) || IS_QLA2200(ha))
3953 return;
3954
3955 /* Serial Link options. */
3956 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
3957 "Serial link options.\n");
3958 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
3959 ha->fw_seriallink_options, sizeof(ha->fw_seriallink_options));
3960
3961 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
3962 if (ha->fw_seriallink_options[3] & BIT_2) {
3963 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
3964
3965 /* 1G settings */
3966 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
3967 emphasis = (ha->fw_seriallink_options[2] &
3968 (BIT_4 | BIT_3)) >> 3;
3969 tx_sens = ha->fw_seriallink_options[0] &
3970 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
3971 rx_sens = (ha->fw_seriallink_options[0] &
3972 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
3973 ha->fw_options[10] = (emphasis << 14) | (swing << 8);
3974 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
3975 if (rx_sens == 0x0)
3976 rx_sens = 0x3;
3977 ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
3978 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
3979 ha->fw_options[10] |= BIT_5 |
3980 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
3981 (tx_sens & (BIT_1 | BIT_0));
3982
3983 /* 2G settings */
3984 swing = (ha->fw_seriallink_options[2] &
3985 (BIT_7 | BIT_6 | BIT_5)) >> 5;
3986 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
3987 tx_sens = ha->fw_seriallink_options[1] &
3988 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
3989 rx_sens = (ha->fw_seriallink_options[1] &
3990 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
3991 ha->fw_options[11] = (emphasis << 14) | (swing << 8);
3992 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
3993 if (rx_sens == 0x0)
3994 rx_sens = 0x3;
3995 ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
3996 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
3997 ha->fw_options[11] |= BIT_5 |
3998 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
3999 (tx_sens & (BIT_1 | BIT_0));
4000 }
4001
4002 /* FCP2 options. */
4003 /* Return command IOCBs without waiting for an ABTS to complete. */
4004 ha->fw_options[3] |= BIT_13;
4005
4006 /* LED scheme. */
4007 if (ha->flags.enable_led_scheme)
4008 ha->fw_options[2] |= BIT_12;
4009
4010 /* Detect ISP6312. */
4011 if (IS_QLA6312(ha))
4012 ha->fw_options[2] |= BIT_13;
4013
4014 /* Set Retry FLOGI in case of P2P connection */
4015 if (ha->operating_mode == P2P) {
4016 ha->fw_options[2] |= BIT_3;
4017 ql_dbg(ql_dbg_disc, vha, 0x2100,
4018 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
4019 __func__, ha->fw_options[2]);
4020 }
4021
4022 /* Update firmware options. */
4023 qla2x00_set_fw_options(vha, ha->fw_options);
4024 }
4025
4026 void
qla24xx_update_fw_options(scsi_qla_host_t * vha)4027 qla24xx_update_fw_options(scsi_qla_host_t *vha)
4028 {
4029 int rval;
4030 struct qla_hw_data *ha = vha->hw;
4031
4032 if (IS_P3P_TYPE(ha))
4033 return;
4034
4035 /* Hold status IOCBs until ABTS response received. */
4036 if (ql2xfwholdabts)
4037 ha->fw_options[3] |= BIT_12;
4038
4039 /* Set Retry FLOGI in case of P2P connection */
4040 if (ha->operating_mode == P2P) {
4041 ha->fw_options[2] |= BIT_3;
4042 ql_dbg(ql_dbg_disc, vha, 0x2101,
4043 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
4044 __func__, ha->fw_options[2]);
4045 }
4046
4047 /* Move PUREX, ABTS RX & RIDA to ATIOQ */
4048 if (ql2xmvasynctoatio &&
4049 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) {
4050 if (qla_tgt_mode_enabled(vha) ||
4051 qla_dual_mode_enabled(vha))
4052 ha->fw_options[2] |= BIT_11;
4053 else
4054 ha->fw_options[2] &= ~BIT_11;
4055 }
4056
4057 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
4058 IS_QLA28XX(ha)) {
4059 /*
4060 * Tell FW to track each exchange to prevent
4061 * driver from using stale exchange.
4062 */
4063 if (qla_tgt_mode_enabled(vha) ||
4064 qla_dual_mode_enabled(vha))
4065 ha->fw_options[2] |= BIT_4;
4066 else
4067 ha->fw_options[2] &= ~BIT_4;
4068
4069 /* Reserve 1/2 of emergency exchanges for ELS.*/
4070 if (qla2xuseresexchforels)
4071 ha->fw_options[2] |= BIT_8;
4072 else
4073 ha->fw_options[2] &= ~BIT_8;
4074 }
4075
4076 if (ql2xrdpenable || ha->flags.scm_supported_f)
4077 ha->fw_options[1] |= ADD_FO1_ENABLE_PUREX_IOCB;
4078
4079 /* Enable Async 8130/8131 events -- transceiver insertion/removal */
4080 if (IS_BPM_RANGE_CAPABLE(ha))
4081 ha->fw_options[3] |= BIT_10;
4082
4083 ql_dbg(ql_dbg_init, vha, 0x00e8,
4084 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
4085 __func__, ha->fw_options[1], ha->fw_options[2],
4086 ha->fw_options[3], vha->host->active_mode);
4087
4088 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3])
4089 qla2x00_set_fw_options(vha, ha->fw_options);
4090
4091 /* Update Serial Link options. */
4092 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
4093 return;
4094
4095 rval = qla2x00_set_serdes_params(vha,
4096 le16_to_cpu(ha->fw_seriallink_options24[1]),
4097 le16_to_cpu(ha->fw_seriallink_options24[2]),
4098 le16_to_cpu(ha->fw_seriallink_options24[3]));
4099 if (rval != QLA_SUCCESS) {
4100 ql_log(ql_log_warn, vha, 0x0104,
4101 "Unable to update Serial Link options (%x).\n", rval);
4102 }
4103 }
4104
4105 void
qla2x00_config_rings(struct scsi_qla_host * vha)4106 qla2x00_config_rings(struct scsi_qla_host *vha)
4107 {
4108 struct qla_hw_data *ha = vha->hw;
4109 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4110 struct req_que *req = ha->req_q_map[0];
4111 struct rsp_que *rsp = ha->rsp_q_map[0];
4112
4113 /* Setup ring parameters in initialization control block. */
4114 ha->init_cb->request_q_outpointer = cpu_to_le16(0);
4115 ha->init_cb->response_q_inpointer = cpu_to_le16(0);
4116 ha->init_cb->request_q_length = cpu_to_le16(req->length);
4117 ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
4118 put_unaligned_le64(req->dma, &ha->init_cb->request_q_address);
4119 put_unaligned_le64(rsp->dma, &ha->init_cb->response_q_address);
4120
4121 wrt_reg_word(ISP_REQ_Q_IN(ha, reg), 0);
4122 wrt_reg_word(ISP_REQ_Q_OUT(ha, reg), 0);
4123 wrt_reg_word(ISP_RSP_Q_IN(ha, reg), 0);
4124 wrt_reg_word(ISP_RSP_Q_OUT(ha, reg), 0);
4125 rd_reg_word(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
4126 }
4127
4128 void
qla24xx_config_rings(struct scsi_qla_host * vha)4129 qla24xx_config_rings(struct scsi_qla_host *vha)
4130 {
4131 struct qla_hw_data *ha = vha->hw;
4132 device_reg_t *reg = ISP_QUE_REG(ha, 0);
4133 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
4134 struct qla_msix_entry *msix;
4135 struct init_cb_24xx *icb;
4136 uint16_t rid = 0;
4137 struct req_que *req = ha->req_q_map[0];
4138 struct rsp_que *rsp = ha->rsp_q_map[0];
4139
4140 /* Setup ring parameters in initialization control block. */
4141 icb = (struct init_cb_24xx *)ha->init_cb;
4142 icb->request_q_outpointer = cpu_to_le16(0);
4143 icb->response_q_inpointer = cpu_to_le16(0);
4144 icb->request_q_length = cpu_to_le16(req->length);
4145 icb->response_q_length = cpu_to_le16(rsp->length);
4146 put_unaligned_le64(req->dma, &icb->request_q_address);
4147 put_unaligned_le64(rsp->dma, &icb->response_q_address);
4148
4149 /* Setup ATIO queue dma pointers for target mode */
4150 icb->atio_q_inpointer = cpu_to_le16(0);
4151 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length);
4152 put_unaligned_le64(ha->tgt.atio_dma, &icb->atio_q_address);
4153
4154 if (IS_SHADOW_REG_CAPABLE(ha))
4155 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29);
4156
4157 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
4158 IS_QLA28XX(ha)) {
4159 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS);
4160 icb->rid = cpu_to_le16(rid);
4161 if (ha->flags.msix_enabled) {
4162 msix = &ha->msix_entries[1];
4163 ql_dbg(ql_dbg_init, vha, 0x0019,
4164 "Registering vector 0x%x for base que.\n",
4165 msix->entry);
4166 icb->msix = cpu_to_le16(msix->entry);
4167 }
4168 /* Use alternate PCI bus number */
4169 if (MSB(rid))
4170 icb->firmware_options_2 |= cpu_to_le32(BIT_19);
4171 /* Use alternate PCI devfn */
4172 if (LSB(rid))
4173 icb->firmware_options_2 |= cpu_to_le32(BIT_18);
4174
4175 /* Use Disable MSIX Handshake mode for capable adapters */
4176 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) &&
4177 (ha->flags.msix_enabled)) {
4178 icb->firmware_options_2 &= cpu_to_le32(~BIT_22);
4179 ha->flags.disable_msix_handshake = 1;
4180 ql_dbg(ql_dbg_init, vha, 0x00fe,
4181 "MSIX Handshake Disable Mode turned on.\n");
4182 } else {
4183 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
4184 }
4185 icb->firmware_options_2 |= cpu_to_le32(BIT_23);
4186
4187 wrt_reg_dword(®->isp25mq.req_q_in, 0);
4188 wrt_reg_dword(®->isp25mq.req_q_out, 0);
4189 wrt_reg_dword(®->isp25mq.rsp_q_in, 0);
4190 wrt_reg_dword(®->isp25mq.rsp_q_out, 0);
4191 } else {
4192 wrt_reg_dword(®->isp24.req_q_in, 0);
4193 wrt_reg_dword(®->isp24.req_q_out, 0);
4194 wrt_reg_dword(®->isp24.rsp_q_in, 0);
4195 wrt_reg_dword(®->isp24.rsp_q_out, 0);
4196 }
4197
4198 qlt_24xx_config_rings(vha);
4199
4200 /* If the user has configured the speed, set it here */
4201 if (ha->set_data_rate) {
4202 ql_dbg(ql_dbg_init, vha, 0x00fd,
4203 "Speed set by user : %s Gbps \n",
4204 qla2x00_get_link_speed_str(ha, ha->set_data_rate));
4205 icb->firmware_options_3 = cpu_to_le32(ha->set_data_rate << 13);
4206 }
4207
4208 /* PCI posting */
4209 rd_reg_word(&ioreg->hccr);
4210 }
4211
4212 /**
4213 * qla2x00_init_rings() - Initializes firmware.
4214 * @vha: HA context
4215 *
4216 * Beginning of request ring has initialization control block already built
4217 * by nvram config routine.
4218 *
4219 * Returns 0 on success.
4220 */
4221 int
qla2x00_init_rings(scsi_qla_host_t * vha)4222 qla2x00_init_rings(scsi_qla_host_t *vha)
4223 {
4224 int rval;
4225 unsigned long flags = 0;
4226 int cnt, que;
4227 struct qla_hw_data *ha = vha->hw;
4228 struct req_que *req;
4229 struct rsp_que *rsp;
4230 struct mid_init_cb_24xx *mid_init_cb =
4231 (struct mid_init_cb_24xx *) ha->init_cb;
4232
4233 spin_lock_irqsave(&ha->hardware_lock, flags);
4234
4235 /* Clear outstanding commands array. */
4236 for (que = 0; que < ha->max_req_queues; que++) {
4237 req = ha->req_q_map[que];
4238 if (!req || !test_bit(que, ha->req_qid_map))
4239 continue;
4240 req->out_ptr = (uint16_t *)(req->ring + req->length);
4241 *req->out_ptr = 0;
4242 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++)
4243 req->outstanding_cmds[cnt] = NULL;
4244
4245 req->current_outstanding_cmd = 1;
4246
4247 /* Initialize firmware. */
4248 req->ring_ptr = req->ring;
4249 req->ring_index = 0;
4250 req->cnt = req->length;
4251 }
4252
4253 for (que = 0; que < ha->max_rsp_queues; que++) {
4254 rsp = ha->rsp_q_map[que];
4255 if (!rsp || !test_bit(que, ha->rsp_qid_map))
4256 continue;
4257 rsp->in_ptr = (uint16_t *)(rsp->ring + rsp->length);
4258 *rsp->in_ptr = 0;
4259 /* Initialize response queue entries */
4260 if (IS_QLAFX00(ha))
4261 qlafx00_init_response_q_entries(rsp);
4262 else
4263 qla2x00_init_response_q_entries(rsp);
4264 }
4265
4266 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring;
4267 ha->tgt.atio_ring_index = 0;
4268 /* Initialize ATIO queue entries */
4269 qlt_init_atio_q_entries(vha);
4270
4271 ha->isp_ops->config_rings(vha);
4272
4273 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4274
4275 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n");
4276
4277 if (IS_QLAFX00(ha)) {
4278 rval = qlafx00_init_firmware(vha, ha->init_cb_size);
4279 goto next_check;
4280 }
4281
4282 /* Update any ISP specific firmware options before initialization. */
4283 ha->isp_ops->update_fw_options(vha);
4284
4285 if (ha->flags.npiv_supported) {
4286 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha))
4287 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
4288 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
4289 }
4290
4291 if (IS_FWI2_CAPABLE(ha)) {
4292 mid_init_cb->options = cpu_to_le16(BIT_1);
4293 mid_init_cb->init_cb.execution_throttle =
4294 cpu_to_le16(ha->cur_fw_xcb_count);
4295 ha->flags.dport_enabled =
4296 (le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) &
4297 BIT_7) != 0;
4298 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n",
4299 (ha->flags.dport_enabled) ? "enabled" : "disabled");
4300 /* FA-WWPN Status */
4301 ha->flags.fawwpn_enabled =
4302 (le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) &
4303 BIT_6) != 0;
4304 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n",
4305 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled");
4306 }
4307
4308 rval = qla2x00_init_firmware(vha, ha->init_cb_size);
4309 next_check:
4310 if (rval) {
4311 ql_log(ql_log_fatal, vha, 0x00d2,
4312 "Init Firmware **** FAILED ****.\n");
4313 } else {
4314 ql_dbg(ql_dbg_init, vha, 0x00d3,
4315 "Init Firmware -- success.\n");
4316 QLA_FW_STARTED(ha);
4317 vha->u_ql2xexchoffld = vha->u_ql2xiniexchg = 0;
4318 }
4319
4320 return (rval);
4321 }
4322
4323 /**
4324 * qla2x00_fw_ready() - Waits for firmware ready.
4325 * @vha: HA context
4326 *
4327 * Returns 0 on success.
4328 */
4329 static int
qla2x00_fw_ready(scsi_qla_host_t * vha)4330 qla2x00_fw_ready(scsi_qla_host_t *vha)
4331 {
4332 int rval;
4333 unsigned long wtime, mtime, cs84xx_time;
4334 uint16_t min_wait; /* Minimum wait time if loop is down */
4335 uint16_t wait_time; /* Wait time if loop is coming ready */
4336 uint16_t state[6];
4337 struct qla_hw_data *ha = vha->hw;
4338
4339 if (IS_QLAFX00(vha->hw))
4340 return qlafx00_fw_ready(vha);
4341
4342 rval = QLA_SUCCESS;
4343
4344 /* Time to wait for loop down */
4345 if (IS_P3P_TYPE(ha))
4346 min_wait = 30;
4347 else
4348 min_wait = 20;
4349
4350 /*
4351 * Firmware should take at most one RATOV to login, plus 5 seconds for
4352 * our own processing.
4353 */
4354 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
4355 wait_time = min_wait;
4356 }
4357
4358 /* Min wait time if loop down */
4359 mtime = jiffies + (min_wait * HZ);
4360
4361 /* wait time before firmware ready */
4362 wtime = jiffies + (wait_time * HZ);
4363
4364 /* Wait for ISP to finish LIP */
4365 if (!vha->flags.init_done)
4366 ql_log(ql_log_info, vha, 0x801e,
4367 "Waiting for LIP to complete.\n");
4368
4369 do {
4370 memset(state, -1, sizeof(state));
4371 rval = qla2x00_get_firmware_state(vha, state);
4372 if (rval == QLA_SUCCESS) {
4373 if (state[0] < FSTATE_LOSS_OF_SYNC) {
4374 vha->device_flags &= ~DFLG_NO_CABLE;
4375 }
4376 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
4377 ql_dbg(ql_dbg_taskm, vha, 0x801f,
4378 "fw_state=%x 84xx=%x.\n", state[0],
4379 state[2]);
4380 if ((state[2] & FSTATE_LOGGED_IN) &&
4381 (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
4382 ql_dbg(ql_dbg_taskm, vha, 0x8028,
4383 "Sending verify iocb.\n");
4384
4385 cs84xx_time = jiffies;
4386 rval = qla84xx_init_chip(vha);
4387 if (rval != QLA_SUCCESS) {
4388 ql_log(ql_log_warn,
4389 vha, 0x8007,
4390 "Init chip failed.\n");
4391 break;
4392 }
4393
4394 /* Add time taken to initialize. */
4395 cs84xx_time = jiffies - cs84xx_time;
4396 wtime += cs84xx_time;
4397 mtime += cs84xx_time;
4398 ql_dbg(ql_dbg_taskm, vha, 0x8008,
4399 "Increasing wait time by %ld. "
4400 "New time %ld.\n", cs84xx_time,
4401 wtime);
4402 }
4403 } else if (state[0] == FSTATE_READY) {
4404 ql_dbg(ql_dbg_taskm, vha, 0x8037,
4405 "F/W Ready - OK.\n");
4406
4407 qla2x00_get_retry_cnt(vha, &ha->retry_count,
4408 &ha->login_timeout, &ha->r_a_tov);
4409
4410 rval = QLA_SUCCESS;
4411 break;
4412 }
4413
4414 rval = QLA_FUNCTION_FAILED;
4415
4416 if (atomic_read(&vha->loop_down_timer) &&
4417 state[0] != FSTATE_READY) {
4418 /* Loop down. Timeout on min_wait for states
4419 * other than Wait for Login.
4420 */
4421 if (time_after_eq(jiffies, mtime)) {
4422 ql_log(ql_log_info, vha, 0x8038,
4423 "Cable is unplugged...\n");
4424
4425 vha->device_flags |= DFLG_NO_CABLE;
4426 break;
4427 }
4428 }
4429 } else {
4430 /* Mailbox cmd failed. Timeout on min_wait. */
4431 if (time_after_eq(jiffies, mtime) ||
4432 ha->flags.isp82xx_fw_hung)
4433 break;
4434 }
4435
4436 if (time_after_eq(jiffies, wtime))
4437 break;
4438
4439 /* Delay for a while */
4440 msleep(500);
4441 } while (1);
4442
4443 ql_dbg(ql_dbg_taskm, vha, 0x803a,
4444 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0],
4445 state[1], state[2], state[3], state[4], state[5], jiffies);
4446
4447 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) {
4448 ql_log(ql_log_warn, vha, 0x803b,
4449 "Firmware ready **** FAILED ****.\n");
4450 }
4451
4452 return (rval);
4453 }
4454
4455 /*
4456 * qla2x00_configure_hba
4457 * Setup adapter context.
4458 *
4459 * Input:
4460 * ha = adapter state pointer.
4461 *
4462 * Returns:
4463 * 0 = success
4464 *
4465 * Context:
4466 * Kernel context.
4467 */
4468 static int
qla2x00_configure_hba(scsi_qla_host_t * vha)4469 qla2x00_configure_hba(scsi_qla_host_t *vha)
4470 {
4471 int rval;
4472 uint16_t loop_id;
4473 uint16_t topo;
4474 uint16_t sw_cap;
4475 uint8_t al_pa;
4476 uint8_t area;
4477 uint8_t domain;
4478 char connect_type[22];
4479 struct qla_hw_data *ha = vha->hw;
4480 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4481 port_id_t id;
4482 unsigned long flags;
4483
4484 /* Get host addresses. */
4485 rval = qla2x00_get_adapter_id(vha,
4486 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
4487 if (rval != QLA_SUCCESS) {
4488 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
4489 IS_CNA_CAPABLE(ha) ||
4490 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
4491 ql_dbg(ql_dbg_disc, vha, 0x2008,
4492 "Loop is in a transition state.\n");
4493 } else {
4494 ql_log(ql_log_warn, vha, 0x2009,
4495 "Unable to get host loop ID.\n");
4496 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) &&
4497 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) {
4498 ql_log(ql_log_warn, vha, 0x1151,
4499 "Doing link init.\n");
4500 if (qla24xx_link_initialize(vha) == QLA_SUCCESS)
4501 return rval;
4502 }
4503 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
4504 }
4505 return (rval);
4506 }
4507
4508 if (topo == 4) {
4509 ql_log(ql_log_info, vha, 0x200a,
4510 "Cannot get topology - retrying.\n");
4511 return (QLA_FUNCTION_FAILED);
4512 }
4513
4514 vha->loop_id = loop_id;
4515
4516 /* initialize */
4517 ha->min_external_loopid = SNS_FIRST_LOOP_ID;
4518 ha->operating_mode = LOOP;
4519 ha->switch_cap = 0;
4520
4521 switch (topo) {
4522 case 0:
4523 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n");
4524 ha->current_topology = ISP_CFG_NL;
4525 strcpy(connect_type, "(Loop)");
4526 break;
4527
4528 case 1:
4529 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n");
4530 ha->switch_cap = sw_cap;
4531 ha->current_topology = ISP_CFG_FL;
4532 strcpy(connect_type, "(FL_Port)");
4533 break;
4534
4535 case 2:
4536 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n");
4537 ha->operating_mode = P2P;
4538 ha->current_topology = ISP_CFG_N;
4539 strcpy(connect_type, "(N_Port-to-N_Port)");
4540 break;
4541
4542 case 3:
4543 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n");
4544 ha->switch_cap = sw_cap;
4545 ha->operating_mode = P2P;
4546 ha->current_topology = ISP_CFG_F;
4547 strcpy(connect_type, "(F_Port)");
4548 break;
4549
4550 default:
4551 ql_dbg(ql_dbg_disc, vha, 0x200f,
4552 "HBA in unknown topology %x, using NL.\n", topo);
4553 ha->current_topology = ISP_CFG_NL;
4554 strcpy(connect_type, "(Loop)");
4555 break;
4556 }
4557
4558 /* Save Host port and loop ID. */
4559 /* byte order - Big Endian */
4560 id.b.domain = domain;
4561 id.b.area = area;
4562 id.b.al_pa = al_pa;
4563 id.b.rsvd_1 = 0;
4564 spin_lock_irqsave(&ha->hardware_lock, flags);
4565 if (!(topo == 2 && ha->flags.n2n_bigger))
4566 qlt_update_host_map(vha, id);
4567 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4568
4569 if (!vha->flags.init_done)
4570 ql_log(ql_log_info, vha, 0x2010,
4571 "Topology - %s, Host Loop address 0x%x.\n",
4572 connect_type, vha->loop_id);
4573
4574 return(rval);
4575 }
4576
4577 inline void
qla2x00_set_model_info(scsi_qla_host_t * vha,uint8_t * model,size_t len,const char * def)4578 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
4579 const char *def)
4580 {
4581 char *st, *en;
4582 uint16_t index;
4583 uint64_t zero[2] = { 0 };
4584 struct qla_hw_data *ha = vha->hw;
4585 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
4586 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha);
4587
4588 if (len > sizeof(zero))
4589 len = sizeof(zero);
4590 if (memcmp(model, &zero, len) != 0) {
4591 memcpy(ha->model_number, model, len);
4592 st = en = ha->model_number;
4593 en += len - 1;
4594 while (en > st) {
4595 if (*en != 0x20 && *en != 0x00)
4596 break;
4597 *en-- = '\0';
4598 }
4599
4600 index = (ha->pdev->subsystem_device & 0xff);
4601 if (use_tbl &&
4602 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
4603 index < QLA_MODEL_NAMES)
4604 strlcpy(ha->model_desc,
4605 qla2x00_model_name[index * 2 + 1],
4606 sizeof(ha->model_desc));
4607 } else {
4608 index = (ha->pdev->subsystem_device & 0xff);
4609 if (use_tbl &&
4610 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
4611 index < QLA_MODEL_NAMES) {
4612 strlcpy(ha->model_number,
4613 qla2x00_model_name[index * 2],
4614 sizeof(ha->model_number));
4615 strlcpy(ha->model_desc,
4616 qla2x00_model_name[index * 2 + 1],
4617 sizeof(ha->model_desc));
4618 } else {
4619 strlcpy(ha->model_number, def,
4620 sizeof(ha->model_number));
4621 }
4622 }
4623 if (IS_FWI2_CAPABLE(ha))
4624 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
4625 sizeof(ha->model_desc));
4626 }
4627
4628 /* On sparc systems, obtain port and node WWN from firmware
4629 * properties.
4630 */
qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t * vha,nvram_t * nv)4631 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
4632 {
4633 #ifdef CONFIG_SPARC
4634 struct qla_hw_data *ha = vha->hw;
4635 struct pci_dev *pdev = ha->pdev;
4636 struct device_node *dp = pci_device_to_OF_node(pdev);
4637 const u8 *val;
4638 int len;
4639
4640 val = of_get_property(dp, "port-wwn", &len);
4641 if (val && len >= WWN_SIZE)
4642 memcpy(nv->port_name, val, WWN_SIZE);
4643
4644 val = of_get_property(dp, "node-wwn", &len);
4645 if (val && len >= WWN_SIZE)
4646 memcpy(nv->node_name, val, WWN_SIZE);
4647 #endif
4648 }
4649
4650 /*
4651 * NVRAM configuration for ISP 2xxx
4652 *
4653 * Input:
4654 * ha = adapter block pointer.
4655 *
4656 * Output:
4657 * initialization control block in response_ring
4658 * host adapters parameters in host adapter block
4659 *
4660 * Returns:
4661 * 0 = success.
4662 */
4663 int
qla2x00_nvram_config(scsi_qla_host_t * vha)4664 qla2x00_nvram_config(scsi_qla_host_t *vha)
4665 {
4666 int rval;
4667 uint8_t chksum = 0;
4668 uint16_t cnt;
4669 uint8_t *dptr1, *dptr2;
4670 struct qla_hw_data *ha = vha->hw;
4671 init_cb_t *icb = ha->init_cb;
4672 nvram_t *nv = ha->nvram;
4673 uint8_t *ptr = ha->nvram;
4674 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4675
4676 rval = QLA_SUCCESS;
4677
4678 /* Determine NVRAM starting address. */
4679 ha->nvram_size = sizeof(*nv);
4680 ha->nvram_base = 0;
4681 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
4682 if ((rd_reg_word(®->ctrl_status) >> 14) == 1)
4683 ha->nvram_base = 0x80;
4684
4685 /* Get NVRAM data and calculate checksum. */
4686 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
4687 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
4688 chksum += *ptr++;
4689
4690 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
4691 "Contents of NVRAM.\n");
4692 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
4693 nv, ha->nvram_size);
4694
4695 /* Bad NVRAM data, set defaults parameters. */
4696 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
4697 nv->nvram_version < 1) {
4698 /* Reset NVRAM data. */
4699 ql_log(ql_log_warn, vha, 0x0064,
4700 "Inconsistent NVRAM detected: checksum=%#x id=%.4s version=%#x.\n",
4701 chksum, nv->id, nv->nvram_version);
4702 ql_log(ql_log_warn, vha, 0x0065,
4703 "Falling back to "
4704 "functioning (yet invalid -- WWPN) defaults.\n");
4705
4706 /*
4707 * Set default initialization control block.
4708 */
4709 memset(nv, 0, ha->nvram_size);
4710 nv->parameter_block_version = ICB_VERSION;
4711
4712 if (IS_QLA23XX(ha)) {
4713 nv->firmware_options[0] = BIT_2 | BIT_1;
4714 nv->firmware_options[1] = BIT_7 | BIT_5;
4715 nv->add_firmware_options[0] = BIT_5;
4716 nv->add_firmware_options[1] = BIT_5 | BIT_4;
4717 nv->frame_payload_size = cpu_to_le16(2048);
4718 nv->special_options[1] = BIT_7;
4719 } else if (IS_QLA2200(ha)) {
4720 nv->firmware_options[0] = BIT_2 | BIT_1;
4721 nv->firmware_options[1] = BIT_7 | BIT_5;
4722 nv->add_firmware_options[0] = BIT_5;
4723 nv->add_firmware_options[1] = BIT_5 | BIT_4;
4724 nv->frame_payload_size = cpu_to_le16(1024);
4725 } else if (IS_QLA2100(ha)) {
4726 nv->firmware_options[0] = BIT_3 | BIT_1;
4727 nv->firmware_options[1] = BIT_5;
4728 nv->frame_payload_size = cpu_to_le16(1024);
4729 }
4730
4731 nv->max_iocb_allocation = cpu_to_le16(256);
4732 nv->execution_throttle = cpu_to_le16(16);
4733 nv->retry_count = 8;
4734 nv->retry_delay = 1;
4735
4736 nv->port_name[0] = 33;
4737 nv->port_name[3] = 224;
4738 nv->port_name[4] = 139;
4739
4740 qla2xxx_nvram_wwn_from_ofw(vha, nv);
4741
4742 nv->login_timeout = 4;
4743
4744 /*
4745 * Set default host adapter parameters
4746 */
4747 nv->host_p[1] = BIT_2;
4748 nv->reset_delay = 5;
4749 nv->port_down_retry_count = 8;
4750 nv->max_luns_per_target = cpu_to_le16(8);
4751 nv->link_down_timeout = 60;
4752
4753 rval = 1;
4754 }
4755
4756 /* Reset Initialization control block */
4757 memset(icb, 0, ha->init_cb_size);
4758
4759 /*
4760 * Setup driver NVRAM options.
4761 */
4762 nv->firmware_options[0] |= (BIT_6 | BIT_1);
4763 nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
4764 nv->firmware_options[1] |= (BIT_5 | BIT_0);
4765 nv->firmware_options[1] &= ~BIT_4;
4766
4767 if (IS_QLA23XX(ha)) {
4768 nv->firmware_options[0] |= BIT_2;
4769 nv->firmware_options[0] &= ~BIT_3;
4770 nv->special_options[0] &= ~BIT_6;
4771 nv->add_firmware_options[1] |= BIT_5 | BIT_4;
4772
4773 if (IS_QLA2300(ha)) {
4774 if (ha->fb_rev == FPM_2310) {
4775 strcpy(ha->model_number, "QLA2310");
4776 } else {
4777 strcpy(ha->model_number, "QLA2300");
4778 }
4779 } else {
4780 qla2x00_set_model_info(vha, nv->model_number,
4781 sizeof(nv->model_number), "QLA23xx");
4782 }
4783 } else if (IS_QLA2200(ha)) {
4784 nv->firmware_options[0] |= BIT_2;
4785 /*
4786 * 'Point-to-point preferred, else loop' is not a safe
4787 * connection mode setting.
4788 */
4789 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
4790 (BIT_5 | BIT_4)) {
4791 /* Force 'loop preferred, else point-to-point'. */
4792 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
4793 nv->add_firmware_options[0] |= BIT_5;
4794 }
4795 strcpy(ha->model_number, "QLA22xx");
4796 } else /*if (IS_QLA2100(ha))*/ {
4797 strcpy(ha->model_number, "QLA2100");
4798 }
4799
4800 /*
4801 * Copy over NVRAM RISC parameter block to initialization control block.
4802 */
4803 dptr1 = (uint8_t *)icb;
4804 dptr2 = (uint8_t *)&nv->parameter_block_version;
4805 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
4806 while (cnt--)
4807 *dptr1++ = *dptr2++;
4808
4809 /* Copy 2nd half. */
4810 dptr1 = (uint8_t *)icb->add_firmware_options;
4811 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
4812 while (cnt--)
4813 *dptr1++ = *dptr2++;
4814 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
4815 /* Use alternate WWN? */
4816 if (nv->host_p[1] & BIT_7) {
4817 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
4818 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
4819 }
4820
4821 /* Prepare nodename */
4822 if ((icb->firmware_options[1] & BIT_6) == 0) {
4823 /*
4824 * Firmware will apply the following mask if the nodename was
4825 * not provided.
4826 */
4827 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
4828 icb->node_name[0] &= 0xF0;
4829 }
4830
4831 /*
4832 * Set host adapter parameters.
4833 */
4834
4835 /*
4836 * BIT_7 in the host-parameters section allows for modification to
4837 * internal driver logging.
4838 */
4839 if (nv->host_p[0] & BIT_7)
4840 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
4841 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
4842 /* Always load RISC code on non ISP2[12]00 chips. */
4843 if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
4844 ha->flags.disable_risc_code_load = 0;
4845 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
4846 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
4847 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
4848 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
4849 ha->flags.disable_serdes = 0;
4850
4851 ha->operating_mode =
4852 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
4853
4854 memcpy(ha->fw_seriallink_options, nv->seriallink_options,
4855 sizeof(ha->fw_seriallink_options));
4856
4857 /* save HBA serial number */
4858 ha->serial0 = icb->port_name[5];
4859 ha->serial1 = icb->port_name[6];
4860 ha->serial2 = icb->port_name[7];
4861 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
4862 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
4863
4864 icb->execution_throttle = cpu_to_le16(0xFFFF);
4865
4866 ha->retry_count = nv->retry_count;
4867
4868 /* Set minimum login_timeout to 4 seconds. */
4869 if (nv->login_timeout != ql2xlogintimeout)
4870 nv->login_timeout = ql2xlogintimeout;
4871 if (nv->login_timeout < 4)
4872 nv->login_timeout = 4;
4873 ha->login_timeout = nv->login_timeout;
4874
4875 /* Set minimum RATOV to 100 tenths of a second. */
4876 ha->r_a_tov = 100;
4877
4878 ha->loop_reset_delay = nv->reset_delay;
4879
4880 /* Link Down Timeout = 0:
4881 *
4882 * When Port Down timer expires we will start returning
4883 * I/O's to OS with "DID_NO_CONNECT".
4884 *
4885 * Link Down Timeout != 0:
4886 *
4887 * The driver waits for the link to come up after link down
4888 * before returning I/Os to OS with "DID_NO_CONNECT".
4889 */
4890 if (nv->link_down_timeout == 0) {
4891 ha->loop_down_abort_time =
4892 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
4893 } else {
4894 ha->link_down_timeout = nv->link_down_timeout;
4895 ha->loop_down_abort_time =
4896 (LOOP_DOWN_TIME - ha->link_down_timeout);
4897 }
4898
4899 /*
4900 * Need enough time to try and get the port back.
4901 */
4902 ha->port_down_retry_count = nv->port_down_retry_count;
4903 if (qlport_down_retry)
4904 ha->port_down_retry_count = qlport_down_retry;
4905 /* Set login_retry_count */
4906 ha->login_retry_count = nv->retry_count;
4907 if (ha->port_down_retry_count == nv->port_down_retry_count &&
4908 ha->port_down_retry_count > 3)
4909 ha->login_retry_count = ha->port_down_retry_count;
4910 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
4911 ha->login_retry_count = ha->port_down_retry_count;
4912 if (ql2xloginretrycount)
4913 ha->login_retry_count = ql2xloginretrycount;
4914
4915 icb->lun_enables = cpu_to_le16(0);
4916 icb->command_resource_count = 0;
4917 icb->immediate_notify_resource_count = 0;
4918 icb->timeout = cpu_to_le16(0);
4919
4920 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
4921 /* Enable RIO */
4922 icb->firmware_options[0] &= ~BIT_3;
4923 icb->add_firmware_options[0] &=
4924 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
4925 icb->add_firmware_options[0] |= BIT_2;
4926 icb->response_accumulation_timer = 3;
4927 icb->interrupt_delay_timer = 5;
4928
4929 vha->flags.process_response_queue = 1;
4930 } else {
4931 /* Enable ZIO. */
4932 if (!vha->flags.init_done) {
4933 ha->zio_mode = icb->add_firmware_options[0] &
4934 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
4935 ha->zio_timer = icb->interrupt_delay_timer ?
4936 icb->interrupt_delay_timer : 2;
4937 }
4938 icb->add_firmware_options[0] &=
4939 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
4940 vha->flags.process_response_queue = 0;
4941 if (ha->zio_mode != QLA_ZIO_DISABLED) {
4942 ha->zio_mode = QLA_ZIO_MODE_6;
4943
4944 ql_log(ql_log_info, vha, 0x0068,
4945 "ZIO mode %d enabled; timer delay (%d us).\n",
4946 ha->zio_mode, ha->zio_timer * 100);
4947
4948 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
4949 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
4950 vha->flags.process_response_queue = 1;
4951 }
4952 }
4953
4954 if (rval) {
4955 ql_log(ql_log_warn, vha, 0x0069,
4956 "NVRAM configuration failed.\n");
4957 }
4958 return (rval);
4959 }
4960
4961 static void
qla2x00_rport_del(void * data)4962 qla2x00_rport_del(void *data)
4963 {
4964 fc_port_t *fcport = data;
4965 struct fc_rport *rport;
4966 unsigned long flags;
4967
4968 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
4969 rport = fcport->drport ? fcport->drport : fcport->rport;
4970 fcport->drport = NULL;
4971 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
4972 if (rport) {
4973 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b,
4974 "%s %8phN. rport %p roles %x\n",
4975 __func__, fcport->port_name, rport,
4976 rport->roles);
4977
4978 fc_remote_port_delete(rport);
4979 }
4980 }
4981
qla2x00_set_fcport_state(fc_port_t * fcport,int state)4982 void qla2x00_set_fcport_state(fc_port_t *fcport, int state)
4983 {
4984 int old_state;
4985
4986 old_state = atomic_read(&fcport->state);
4987 atomic_set(&fcport->state, state);
4988
4989 /* Don't print state transitions during initial allocation of fcport */
4990 if (old_state && old_state != state) {
4991 ql_dbg(ql_dbg_disc, fcport->vha, 0x207d,
4992 "FCPort %8phC state transitioned from %s to %s - portid=%02x%02x%02x.\n",
4993 fcport->port_name, port_state_str[old_state],
4994 port_state_str[state], fcport->d_id.b.domain,
4995 fcport->d_id.b.area, fcport->d_id.b.al_pa);
4996 }
4997 }
4998
4999 /**
5000 * qla2x00_alloc_fcport() - Allocate a generic fcport.
5001 * @vha: HA context
5002 * @flags: allocation flags
5003 *
5004 * Returns a pointer to the allocated fcport, or NULL, if none available.
5005 */
5006 fc_port_t *
qla2x00_alloc_fcport(scsi_qla_host_t * vha,gfp_t flags)5007 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
5008 {
5009 fc_port_t *fcport;
5010
5011 fcport = kzalloc(sizeof(fc_port_t), flags);
5012 if (!fcport)
5013 return NULL;
5014
5015 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev,
5016 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma,
5017 flags);
5018 if (!fcport->ct_desc.ct_sns) {
5019 ql_log(ql_log_warn, vha, 0xd049,
5020 "Failed to allocate ct_sns request.\n");
5021 kfree(fcport);
5022 return NULL;
5023 }
5024
5025 /* Setup fcport template structure. */
5026 fcport->vha = vha;
5027 fcport->port_type = FCT_UNKNOWN;
5028 fcport->loop_id = FC_NO_LOOP_ID;
5029 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);
5030 fcport->supported_classes = FC_COS_UNSPECIFIED;
5031 fcport->fp_speed = PORT_SPEED_UNKNOWN;
5032
5033 fcport->disc_state = DSC_DELETED;
5034 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
5035 fcport->deleted = QLA_SESS_DELETED;
5036 fcport->login_retry = vha->hw->login_retry_count;
5037 fcport->chip_reset = vha->hw->base_qpair->chip_reset;
5038 fcport->logout_on_delete = 1;
5039
5040 if (!fcport->ct_desc.ct_sns) {
5041 ql_log(ql_log_warn, vha, 0xd049,
5042 "Failed to allocate ct_sns request.\n");
5043 kfree(fcport);
5044 return NULL;
5045 }
5046
5047 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn);
5048 INIT_WORK(&fcport->free_work, qlt_free_session_done);
5049 INIT_WORK(&fcport->reg_work, qla_register_fcport_fn);
5050 INIT_LIST_HEAD(&fcport->gnl_entry);
5051 INIT_LIST_HEAD(&fcport->list);
5052
5053 return fcport;
5054 }
5055
5056 void
qla2x00_free_fcport(fc_port_t * fcport)5057 qla2x00_free_fcport(fc_port_t *fcport)
5058 {
5059 if (fcport->ct_desc.ct_sns) {
5060 dma_free_coherent(&fcport->vha->hw->pdev->dev,
5061 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns,
5062 fcport->ct_desc.ct_sns_dma);
5063
5064 fcport->ct_desc.ct_sns = NULL;
5065 }
5066 list_del(&fcport->list);
5067 qla2x00_clear_loop_id(fcport);
5068 kfree(fcport);
5069 }
5070
qla_get_login_template(scsi_qla_host_t * vha)5071 static void qla_get_login_template(scsi_qla_host_t *vha)
5072 {
5073 struct qla_hw_data *ha = vha->hw;
5074 int rval;
5075 u32 *bp, sz;
5076 __be32 *q;
5077
5078 memset(ha->init_cb, 0, ha->init_cb_size);
5079 sz = min_t(int, sizeof(struct fc_els_flogi), ha->init_cb_size);
5080 rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma,
5081 ha->init_cb, sz);
5082 if (rval != QLA_SUCCESS) {
5083 ql_dbg(ql_dbg_init, vha, 0x00d1,
5084 "PLOGI ELS param read fail.\n");
5085 return;
5086 }
5087 q = (__be32 *)&ha->plogi_els_payld.fl_csp;
5088
5089 bp = (uint32_t *)ha->init_cb;
5090 cpu_to_be32_array(q, bp, sz / 4);
5091 ha->flags.plogi_template_valid = 1;
5092 }
5093
5094 /*
5095 * qla2x00_configure_loop
5096 * Updates Fibre Channel Device Database with what is actually on loop.
5097 *
5098 * Input:
5099 * ha = adapter block pointer.
5100 *
5101 * Returns:
5102 * 0 = success.
5103 * 1 = error.
5104 * 2 = database was full and device was not configured.
5105 */
5106 static int
qla2x00_configure_loop(scsi_qla_host_t * vha)5107 qla2x00_configure_loop(scsi_qla_host_t *vha)
5108 {
5109 int rval;
5110 unsigned long flags, save_flags;
5111 struct qla_hw_data *ha = vha->hw;
5112
5113 rval = QLA_SUCCESS;
5114
5115 /* Get Initiator ID */
5116 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
5117 rval = qla2x00_configure_hba(vha);
5118 if (rval != QLA_SUCCESS) {
5119 ql_dbg(ql_dbg_disc, vha, 0x2013,
5120 "Unable to configure HBA.\n");
5121 return (rval);
5122 }
5123 }
5124
5125 save_flags = flags = vha->dpc_flags;
5126 ql_dbg(ql_dbg_disc, vha, 0x2014,
5127 "Configure loop -- dpc flags = 0x%lx.\n", flags);
5128
5129 /*
5130 * If we have both an RSCN and PORT UPDATE pending then handle them
5131 * both at the same time.
5132 */
5133 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5134 clear_bit(RSCN_UPDATE, &vha->dpc_flags);
5135
5136 qla2x00_get_data_rate(vha);
5137 qla_get_login_template(vha);
5138
5139 /* Determine what we need to do */
5140 if ((ha->current_topology == ISP_CFG_FL ||
5141 ha->current_topology == ISP_CFG_F) &&
5142 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
5143
5144 set_bit(RSCN_UPDATE, &flags);
5145 clear_bit(LOCAL_LOOP_UPDATE, &flags);
5146
5147 } else if (ha->current_topology == ISP_CFG_NL ||
5148 ha->current_topology == ISP_CFG_N) {
5149 clear_bit(RSCN_UPDATE, &flags);
5150 set_bit(LOCAL_LOOP_UPDATE, &flags);
5151 } else if (!vha->flags.online ||
5152 (test_bit(ABORT_ISP_ACTIVE, &flags))) {
5153 set_bit(RSCN_UPDATE, &flags);
5154 set_bit(LOCAL_LOOP_UPDATE, &flags);
5155 }
5156
5157 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
5158 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
5159 ql_dbg(ql_dbg_disc, vha, 0x2015,
5160 "Loop resync needed, failing.\n");
5161 rval = QLA_FUNCTION_FAILED;
5162 } else
5163 rval = qla2x00_configure_local_loop(vha);
5164 }
5165
5166 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
5167 if (LOOP_TRANSITION(vha)) {
5168 ql_dbg(ql_dbg_disc, vha, 0x2099,
5169 "Needs RSCN update and loop transition.\n");
5170 rval = QLA_FUNCTION_FAILED;
5171 }
5172 else
5173 rval = qla2x00_configure_fabric(vha);
5174 }
5175
5176 if (rval == QLA_SUCCESS) {
5177 if (atomic_read(&vha->loop_down_timer) ||
5178 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
5179 rval = QLA_FUNCTION_FAILED;
5180 } else {
5181 atomic_set(&vha->loop_state, LOOP_READY);
5182 ql_dbg(ql_dbg_disc, vha, 0x2069,
5183 "LOOP READY.\n");
5184 ha->flags.fw_init_done = 1;
5185
5186 /*
5187 * Process any ATIO queue entries that came in
5188 * while we weren't online.
5189 */
5190 if (qla_tgt_mode_enabled(vha) ||
5191 qla_dual_mode_enabled(vha)) {
5192 spin_lock_irqsave(&ha->tgt.atio_lock, flags);
5193 qlt_24xx_process_atio_queue(vha, 0);
5194 spin_unlock_irqrestore(&ha->tgt.atio_lock,
5195 flags);
5196 }
5197 }
5198 }
5199
5200 if (rval) {
5201 ql_dbg(ql_dbg_disc, vha, 0x206a,
5202 "%s *** FAILED ***.\n", __func__);
5203 } else {
5204 ql_dbg(ql_dbg_disc, vha, 0x206b,
5205 "%s: exiting normally.\n", __func__);
5206 }
5207
5208 /* Restore state if a resync event occurred during processing */
5209 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
5210 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
5211 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5212 if (test_bit(RSCN_UPDATE, &save_flags)) {
5213 set_bit(RSCN_UPDATE, &vha->dpc_flags);
5214 }
5215 }
5216
5217 return (rval);
5218 }
5219
qla2x00_configure_n2n_loop(scsi_qla_host_t * vha)5220 static int qla2x00_configure_n2n_loop(scsi_qla_host_t *vha)
5221 {
5222 unsigned long flags;
5223 fc_port_t *fcport;
5224
5225 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags))
5226 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5227
5228 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5229 if (fcport->n2n_flag) {
5230 qla24xx_fcport_handle_login(vha, fcport);
5231 return QLA_SUCCESS;
5232 }
5233 }
5234
5235 spin_lock_irqsave(&vha->work_lock, flags);
5236 vha->scan.scan_retry++;
5237 spin_unlock_irqrestore(&vha->work_lock, flags);
5238
5239 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) {
5240 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5241 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5242 }
5243 return QLA_FUNCTION_FAILED;
5244 }
5245
5246 /*
5247 * qla2x00_configure_local_loop
5248 * Updates Fibre Channel Device Database with local loop devices.
5249 *
5250 * Input:
5251 * ha = adapter block pointer.
5252 *
5253 * Returns:
5254 * 0 = success.
5255 */
5256 static int
qla2x00_configure_local_loop(scsi_qla_host_t * vha)5257 qla2x00_configure_local_loop(scsi_qla_host_t *vha)
5258 {
5259 int rval, rval2;
5260 int found_devs;
5261 int found;
5262 fc_port_t *fcport, *new_fcport;
5263 uint16_t index;
5264 uint16_t entries;
5265 struct gid_list_info *gid;
5266 uint16_t loop_id;
5267 uint8_t domain, area, al_pa;
5268 struct qla_hw_data *ha = vha->hw;
5269 unsigned long flags;
5270
5271 /* Inititae N2N login. */
5272 if (N2N_TOPO(ha))
5273 return qla2x00_configure_n2n_loop(vha);
5274
5275 found_devs = 0;
5276 new_fcport = NULL;
5277 entries = MAX_FIBRE_DEVICES_LOOP;
5278
5279 /* Get list of logged in devices. */
5280 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha));
5281 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
5282 &entries);
5283 if (rval != QLA_SUCCESS)
5284 goto err;
5285
5286 ql_dbg(ql_dbg_disc, vha, 0x2011,
5287 "Entries in ID list (%d).\n", entries);
5288 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
5289 ha->gid_list, entries * sizeof(*ha->gid_list));
5290
5291 if (entries == 0) {
5292 spin_lock_irqsave(&vha->work_lock, flags);
5293 vha->scan.scan_retry++;
5294 spin_unlock_irqrestore(&vha->work_lock, flags);
5295
5296 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) {
5297 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5298 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5299 }
5300 } else {
5301 vha->scan.scan_retry = 0;
5302 }
5303
5304 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5305 fcport->scan_state = QLA_FCPORT_SCAN;
5306 }
5307
5308 /* Allocate temporary fcport for any new fcports discovered. */
5309 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5310 if (new_fcport == NULL) {
5311 ql_log(ql_log_warn, vha, 0x2012,
5312 "Memory allocation failed for fcport.\n");
5313 rval = QLA_MEMORY_ALLOC_FAILED;
5314 goto err;
5315 }
5316 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
5317
5318 /* Add devices to port list. */
5319 gid = ha->gid_list;
5320 for (index = 0; index < entries; index++) {
5321 domain = gid->domain;
5322 area = gid->area;
5323 al_pa = gid->al_pa;
5324 if (IS_QLA2100(ha) || IS_QLA2200(ha))
5325 loop_id = gid->loop_id_2100;
5326 else
5327 loop_id = le16_to_cpu(gid->loop_id);
5328 gid = (void *)gid + ha->gid_list_info_size;
5329
5330 /* Bypass reserved domain fields. */
5331 if ((domain & 0xf0) == 0xf0)
5332 continue;
5333
5334 /* Bypass if not same domain and area of adapter. */
5335 if (area && domain && ((area != vha->d_id.b.area) ||
5336 (domain != vha->d_id.b.domain)) &&
5337 (ha->current_topology == ISP_CFG_NL))
5338 continue;
5339
5340
5341 /* Bypass invalid local loop ID. */
5342 if (loop_id > LAST_LOCAL_LOOP_ID)
5343 continue;
5344
5345 memset(new_fcport->port_name, 0, WWN_SIZE);
5346
5347 /* Fill in member data. */
5348 new_fcport->d_id.b.domain = domain;
5349 new_fcport->d_id.b.area = area;
5350 new_fcport->d_id.b.al_pa = al_pa;
5351 new_fcport->loop_id = loop_id;
5352 new_fcport->scan_state = QLA_FCPORT_FOUND;
5353
5354 rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
5355 if (rval2 != QLA_SUCCESS) {
5356 ql_dbg(ql_dbg_disc, vha, 0x2097,
5357 "Failed to retrieve fcport information "
5358 "-- get_port_database=%x, loop_id=0x%04x.\n",
5359 rval2, new_fcport->loop_id);
5360 /* Skip retry if N2N */
5361 if (ha->current_topology != ISP_CFG_N) {
5362 ql_dbg(ql_dbg_disc, vha, 0x2105,
5363 "Scheduling resync.\n");
5364 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5365 continue;
5366 }
5367 }
5368
5369 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5370 /* Check for matching device in port list. */
5371 found = 0;
5372 fcport = NULL;
5373 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5374 if (memcmp(new_fcport->port_name, fcport->port_name,
5375 WWN_SIZE))
5376 continue;
5377
5378 fcport->flags &= ~FCF_FABRIC_DEVICE;
5379 fcport->loop_id = new_fcport->loop_id;
5380 fcport->port_type = new_fcport->port_type;
5381 fcport->d_id.b24 = new_fcport->d_id.b24;
5382 memcpy(fcport->node_name, new_fcport->node_name,
5383 WWN_SIZE);
5384 fcport->scan_state = QLA_FCPORT_FOUND;
5385 found++;
5386 break;
5387 }
5388
5389 if (!found) {
5390 /* New device, add to fcports list. */
5391 list_add_tail(&new_fcport->list, &vha->vp_fcports);
5392
5393 /* Allocate a new replacement fcport. */
5394 fcport = new_fcport;
5395
5396 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5397
5398 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5399
5400 if (new_fcport == NULL) {
5401 ql_log(ql_log_warn, vha, 0xd031,
5402 "Failed to allocate memory for fcport.\n");
5403 rval = QLA_MEMORY_ALLOC_FAILED;
5404 goto err;
5405 }
5406 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5407 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
5408 }
5409
5410 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5411
5412 /* Base iIDMA settings on HBA port speed. */
5413 fcport->fp_speed = ha->link_data_rate;
5414
5415 found_devs++;
5416 }
5417
5418 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5419 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5420 break;
5421
5422 if (fcport->scan_state == QLA_FCPORT_SCAN) {
5423 if ((qla_dual_mode_enabled(vha) ||
5424 qla_ini_mode_enabled(vha)) &&
5425 atomic_read(&fcport->state) == FCS_ONLINE) {
5426 qla2x00_mark_device_lost(vha, fcport,
5427 ql2xplogiabsentdevice);
5428 if (fcport->loop_id != FC_NO_LOOP_ID &&
5429 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
5430 fcport->port_type != FCT_INITIATOR &&
5431 fcport->port_type != FCT_BROADCAST) {
5432 ql_dbg(ql_dbg_disc, vha, 0x20f0,
5433 "%s %d %8phC post del sess\n",
5434 __func__, __LINE__,
5435 fcport->port_name);
5436
5437 qlt_schedule_sess_for_deletion(fcport);
5438 continue;
5439 }
5440 }
5441 }
5442
5443 if (fcport->scan_state == QLA_FCPORT_FOUND)
5444 qla24xx_fcport_handle_login(vha, fcport);
5445 }
5446
5447 qla2x00_free_fcport(new_fcport);
5448
5449 return rval;
5450
5451 err:
5452 ql_dbg(ql_dbg_disc, vha, 0x2098,
5453 "Configure local loop error exit: rval=%x.\n", rval);
5454 return rval;
5455 }
5456
5457 static void
qla2x00_iidma_fcport(scsi_qla_host_t * vha,fc_port_t * fcport)5458 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
5459 {
5460 int rval;
5461 uint16_t mb[MAILBOX_REGISTER_COUNT];
5462 struct qla_hw_data *ha = vha->hw;
5463
5464 if (!IS_IIDMA_CAPABLE(ha))
5465 return;
5466
5467 if (atomic_read(&fcport->state) != FCS_ONLINE)
5468 return;
5469
5470 if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
5471 fcport->fp_speed > ha->link_data_rate ||
5472 !ha->flags.gpsc_supported)
5473 return;
5474
5475 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
5476 mb);
5477 if (rval != QLA_SUCCESS) {
5478 ql_dbg(ql_dbg_disc, vha, 0x2004,
5479 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n",
5480 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]);
5481 } else {
5482 ql_dbg(ql_dbg_disc, vha, 0x2005,
5483 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n",
5484 qla2x00_get_link_speed_str(ha, fcport->fp_speed),
5485 fcport->fp_speed, fcport->port_name);
5486 }
5487 }
5488
qla_do_iidma_work(struct scsi_qla_host * vha,fc_port_t * fcport)5489 void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
5490 {
5491 qla2x00_iidma_fcport(vha, fcport);
5492 qla24xx_update_fcport_fcp_prio(vha, fcport);
5493 }
5494
qla_post_iidma_work(struct scsi_qla_host * vha,fc_port_t * fcport)5495 int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
5496 {
5497 struct qla_work_evt *e;
5498
5499 e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA);
5500 if (!e)
5501 return QLA_FUNCTION_FAILED;
5502
5503 e->u.fcport.fcport = fcport;
5504 return qla2x00_post_work(vha, e);
5505 }
5506
5507 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/
5508 static void
qla2x00_reg_remote_port(scsi_qla_host_t * vha,fc_port_t * fcport)5509 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
5510 {
5511 struct fc_rport_identifiers rport_ids;
5512 struct fc_rport *rport;
5513 unsigned long flags;
5514
5515 if (atomic_read(&fcport->state) == FCS_ONLINE)
5516 return;
5517
5518 rport_ids.node_name = wwn_to_u64(fcport->node_name);
5519 rport_ids.port_name = wwn_to_u64(fcport->port_name);
5520 rport_ids.port_id = fcport->d_id.b.domain << 16 |
5521 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
5522 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
5523 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
5524 if (!rport) {
5525 ql_log(ql_log_warn, vha, 0x2006,
5526 "Unable to allocate fc remote port.\n");
5527 return;
5528 }
5529
5530 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
5531 *((fc_port_t **)rport->dd_data) = fcport;
5532 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
5533
5534 rport->supported_classes = fcport->supported_classes;
5535
5536 rport_ids.roles = FC_PORT_ROLE_UNKNOWN;
5537 if (fcport->port_type == FCT_INITIATOR)
5538 rport_ids.roles |= FC_PORT_ROLE_FCP_INITIATOR;
5539 if (fcport->port_type == FCT_TARGET)
5540 rport_ids.roles |= FC_PORT_ROLE_FCP_TARGET;
5541 if (fcport->port_type & FCT_NVME_INITIATOR)
5542 rport_ids.roles |= FC_PORT_ROLE_NVME_INITIATOR;
5543 if (fcport->port_type & FCT_NVME_TARGET)
5544 rport_ids.roles |= FC_PORT_ROLE_NVME_TARGET;
5545 if (fcport->port_type & FCT_NVME_DISCOVERY)
5546 rport_ids.roles |= FC_PORT_ROLE_NVME_DISCOVERY;
5547
5548 ql_dbg(ql_dbg_disc, vha, 0x20ee,
5549 "%s %8phN. rport %p is %s mode\n",
5550 __func__, fcport->port_name, rport,
5551 (fcport->port_type == FCT_TARGET) ? "tgt" :
5552 ((fcport->port_type & FCT_NVME) ? "nvme" : "ini"));
5553
5554 fc_remote_port_rolechg(rport, rport_ids.roles);
5555 }
5556
5557 /*
5558 * qla2x00_update_fcport
5559 * Updates device on list.
5560 *
5561 * Input:
5562 * ha = adapter block pointer.
5563 * fcport = port structure pointer.
5564 *
5565 * Return:
5566 * 0 - Success
5567 * BIT_0 - error
5568 *
5569 * Context:
5570 * Kernel context.
5571 */
5572 void
qla2x00_update_fcport(scsi_qla_host_t * vha,fc_port_t * fcport)5573 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
5574 {
5575 if (IS_SW_RESV_ADDR(fcport->d_id))
5576 return;
5577
5578 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n",
5579 __func__, fcport->port_name);
5580
5581 qla2x00_set_fcport_disc_state(fcport, DSC_UPD_FCPORT);
5582 fcport->login_retry = vha->hw->login_retry_count;
5583 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
5584 fcport->deleted = 0;
5585 if (vha->hw->current_topology == ISP_CFG_NL)
5586 fcport->logout_on_delete = 0;
5587 else
5588 fcport->logout_on_delete = 1;
5589 fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0;
5590
5591 switch (vha->hw->current_topology) {
5592 case ISP_CFG_N:
5593 case ISP_CFG_NL:
5594 fcport->keep_nport_handle = 1;
5595 break;
5596 default:
5597 break;
5598 }
5599
5600 qla2x00_iidma_fcport(vha, fcport);
5601
5602 qla2x00_dfs_create_rport(vha, fcport);
5603
5604 if (NVME_TARGET(vha->hw, fcport)) {
5605 qla_nvme_register_remote(vha, fcport);
5606 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_COMPLETE);
5607 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
5608 return;
5609 }
5610
5611 qla24xx_update_fcport_fcp_prio(vha, fcport);
5612
5613 switch (vha->host->active_mode) {
5614 case MODE_INITIATOR:
5615 qla2x00_reg_remote_port(vha, fcport);
5616 break;
5617 case MODE_TARGET:
5618 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
5619 !vha->vha_tgt.qla_tgt->tgt_stopped)
5620 qlt_fc_port_added(vha, fcport);
5621 break;
5622 case MODE_DUAL:
5623 qla2x00_reg_remote_port(vha, fcport);
5624 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
5625 !vha->vha_tgt.qla_tgt->tgt_stopped)
5626 qlt_fc_port_added(vha, fcport);
5627 break;
5628 default:
5629 break;
5630 }
5631
5632 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
5633
5634 if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) {
5635 if (fcport->id_changed) {
5636 fcport->id_changed = 0;
5637 ql_dbg(ql_dbg_disc, vha, 0x20d7,
5638 "%s %d %8phC post gfpnid fcp_cnt %d\n",
5639 __func__, __LINE__, fcport->port_name,
5640 vha->fcport_count);
5641 qla24xx_post_gfpnid_work(vha, fcport);
5642 } else {
5643 ql_dbg(ql_dbg_disc, vha, 0x20d7,
5644 "%s %d %8phC post gpsc fcp_cnt %d\n",
5645 __func__, __LINE__, fcport->port_name,
5646 vha->fcport_count);
5647 qla24xx_post_gpsc_work(vha, fcport);
5648 }
5649 }
5650
5651 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_COMPLETE);
5652 }
5653
qla_register_fcport_fn(struct work_struct * work)5654 void qla_register_fcport_fn(struct work_struct *work)
5655 {
5656 fc_port_t *fcport = container_of(work, struct fc_port, reg_work);
5657 u32 rscn_gen = fcport->rscn_gen;
5658 u16 data[2];
5659
5660 if (IS_SW_RESV_ADDR(fcport->d_id))
5661 return;
5662
5663 qla2x00_update_fcport(fcport->vha, fcport);
5664
5665 if (rscn_gen != fcport->rscn_gen) {
5666 /* RSCN(s) came in while registration */
5667 switch (fcport->next_disc_state) {
5668 case DSC_DELETE_PEND:
5669 qlt_schedule_sess_for_deletion(fcport);
5670 break;
5671 case DSC_ADISC:
5672 data[0] = data[1] = 0;
5673 qla2x00_post_async_adisc_work(fcport->vha, fcport,
5674 data);
5675 break;
5676 default:
5677 break;
5678 }
5679 }
5680 }
5681
5682 /*
5683 * qla2x00_configure_fabric
5684 * Setup SNS devices with loop ID's.
5685 *
5686 * Input:
5687 * ha = adapter block pointer.
5688 *
5689 * Returns:
5690 * 0 = success.
5691 * BIT_0 = error
5692 */
5693 static int
qla2x00_configure_fabric(scsi_qla_host_t * vha)5694 qla2x00_configure_fabric(scsi_qla_host_t *vha)
5695 {
5696 int rval;
5697 fc_port_t *fcport;
5698 uint16_t mb[MAILBOX_REGISTER_COUNT];
5699 uint16_t loop_id;
5700 LIST_HEAD(new_fcports);
5701 struct qla_hw_data *ha = vha->hw;
5702 int discovery_gen;
5703
5704 /* If FL port exists, then SNS is present */
5705 if (IS_FWI2_CAPABLE(ha))
5706 loop_id = NPH_F_PORT;
5707 else
5708 loop_id = SNS_FL_PORT;
5709 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
5710 if (rval != QLA_SUCCESS) {
5711 ql_dbg(ql_dbg_disc, vha, 0x20a0,
5712 "MBX_GET_PORT_NAME failed, No FL Port.\n");
5713
5714 vha->device_flags &= ~SWITCH_FOUND;
5715 return (QLA_SUCCESS);
5716 }
5717 vha->device_flags |= SWITCH_FOUND;
5718
5719 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_port_name, 0);
5720 if (rval != QLA_SUCCESS)
5721 ql_dbg(ql_dbg_disc, vha, 0x20ff,
5722 "Failed to get Fabric Port Name\n");
5723
5724 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) {
5725 rval = qla2x00_send_change_request(vha, 0x3, 0);
5726 if (rval != QLA_SUCCESS)
5727 ql_log(ql_log_warn, vha, 0x121,
5728 "Failed to enable receiving of RSCN requests: 0x%x.\n",
5729 rval);
5730 }
5731
5732 do {
5733 qla2x00_mgmt_svr_login(vha);
5734
5735 /* Ensure we are logged into the SNS. */
5736 loop_id = NPH_SNS_LID(ha);
5737 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
5738 0xfc, mb, BIT_1|BIT_0);
5739 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
5740 ql_dbg(ql_dbg_disc, vha, 0x20a1,
5741 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n",
5742 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval);
5743 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5744 return rval;
5745 }
5746
5747 /* FDMI support. */
5748 if (ql2xfdmienable &&
5749 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
5750 qla2x00_fdmi_register(vha);
5751
5752 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
5753 if (qla2x00_rft_id(vha)) {
5754 /* EMPTY */
5755 ql_dbg(ql_dbg_disc, vha, 0x20a2,
5756 "Register FC-4 TYPE failed.\n");
5757 if (test_bit(LOOP_RESYNC_NEEDED,
5758 &vha->dpc_flags))
5759 break;
5760 }
5761 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) {
5762 /* EMPTY */
5763 ql_dbg(ql_dbg_disc, vha, 0x209a,
5764 "Register FC-4 Features failed.\n");
5765 if (test_bit(LOOP_RESYNC_NEEDED,
5766 &vha->dpc_flags))
5767 break;
5768 }
5769 if (vha->flags.nvme_enabled) {
5770 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) {
5771 ql_dbg(ql_dbg_disc, vha, 0x2049,
5772 "Register NVME FC Type Features failed.\n");
5773 }
5774 }
5775 if (qla2x00_rnn_id(vha)) {
5776 /* EMPTY */
5777 ql_dbg(ql_dbg_disc, vha, 0x2104,
5778 "Register Node Name failed.\n");
5779 if (test_bit(LOOP_RESYNC_NEEDED,
5780 &vha->dpc_flags))
5781 break;
5782 } else if (qla2x00_rsnn_nn(vha)) {
5783 /* EMPTY */
5784 ql_dbg(ql_dbg_disc, vha, 0x209b,
5785 "Register Symbolic Node Name failed.\n");
5786 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5787 break;
5788 }
5789 }
5790
5791
5792 /* Mark the time right before querying FW for connected ports.
5793 * This process is long, asynchronous and by the time it's done,
5794 * collected information might not be accurate anymore. E.g.
5795 * disconnected port might have re-connected and a brand new
5796 * session has been created. In this case session's generation
5797 * will be newer than discovery_gen. */
5798 qlt_do_generation_tick(vha, &discovery_gen);
5799
5800 if (USE_ASYNC_SCAN(ha)) {
5801 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI,
5802 NULL);
5803 if (rval)
5804 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5805 } else {
5806 list_for_each_entry(fcport, &vha->vp_fcports, list)
5807 fcport->scan_state = QLA_FCPORT_SCAN;
5808
5809 rval = qla2x00_find_all_fabric_devs(vha);
5810 }
5811 if (rval != QLA_SUCCESS)
5812 break;
5813 } while (0);
5814
5815 if (!vha->nvme_local_port && vha->flags.nvme_enabled)
5816 qla_nvme_register_hba(vha);
5817
5818 if (rval)
5819 ql_dbg(ql_dbg_disc, vha, 0x2068,
5820 "Configure fabric error exit rval=%d.\n", rval);
5821
5822 return (rval);
5823 }
5824
5825 /*
5826 * qla2x00_find_all_fabric_devs
5827 *
5828 * Input:
5829 * ha = adapter block pointer.
5830 * dev = database device entry pointer.
5831 *
5832 * Returns:
5833 * 0 = success.
5834 *
5835 * Context:
5836 * Kernel context.
5837 */
5838 static int
qla2x00_find_all_fabric_devs(scsi_qla_host_t * vha)5839 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha)
5840 {
5841 int rval;
5842 uint16_t loop_id;
5843 fc_port_t *fcport, *new_fcport;
5844 int found;
5845
5846 sw_info_t *swl;
5847 int swl_idx;
5848 int first_dev, last_dev;
5849 port_id_t wrap = {}, nxt_d_id;
5850 struct qla_hw_data *ha = vha->hw;
5851 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
5852 unsigned long flags;
5853
5854 rval = QLA_SUCCESS;
5855
5856 /* Try GID_PT to get device list, else GAN. */
5857 if (!ha->swl)
5858 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t),
5859 GFP_KERNEL);
5860 swl = ha->swl;
5861 if (!swl) {
5862 /*EMPTY*/
5863 ql_dbg(ql_dbg_disc, vha, 0x209c,
5864 "GID_PT allocations failed, fallback on GA_NXT.\n");
5865 } else {
5866 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t));
5867 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
5868 swl = NULL;
5869 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5870 return rval;
5871 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
5872 swl = NULL;
5873 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5874 return rval;
5875 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
5876 swl = NULL;
5877 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5878 return rval;
5879 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) {
5880 swl = NULL;
5881 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5882 return rval;
5883 }
5884
5885 /* If other queries succeeded probe for FC-4 type */
5886 if (swl) {
5887 qla2x00_gff_id(vha, swl);
5888 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5889 return rval;
5890 }
5891 }
5892 swl_idx = 0;
5893
5894 /* Allocate temporary fcport for any new fcports discovered. */
5895 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5896 if (new_fcport == NULL) {
5897 ql_log(ql_log_warn, vha, 0x209d,
5898 "Failed to allocate memory for fcport.\n");
5899 return (QLA_MEMORY_ALLOC_FAILED);
5900 }
5901 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
5902 /* Set start port ID scan at adapter ID. */
5903 first_dev = 1;
5904 last_dev = 0;
5905
5906 /* Starting free loop ID. */
5907 loop_id = ha->min_external_loopid;
5908 for (; loop_id <= ha->max_loop_id; loop_id++) {
5909 if (qla2x00_is_reserved_id(vha, loop_id))
5910 continue;
5911
5912 if (ha->current_topology == ISP_CFG_FL &&
5913 (atomic_read(&vha->loop_down_timer) ||
5914 LOOP_TRANSITION(vha))) {
5915 atomic_set(&vha->loop_down_timer, 0);
5916 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5917 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5918 break;
5919 }
5920
5921 if (swl != NULL) {
5922 if (last_dev) {
5923 wrap.b24 = new_fcport->d_id.b24;
5924 } else {
5925 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
5926 memcpy(new_fcport->node_name,
5927 swl[swl_idx].node_name, WWN_SIZE);
5928 memcpy(new_fcport->port_name,
5929 swl[swl_idx].port_name, WWN_SIZE);
5930 memcpy(new_fcport->fabric_port_name,
5931 swl[swl_idx].fabric_port_name, WWN_SIZE);
5932 new_fcport->fp_speed = swl[swl_idx].fp_speed;
5933 new_fcport->fc4_type = swl[swl_idx].fc4_type;
5934
5935 new_fcport->nvme_flag = 0;
5936 if (vha->flags.nvme_enabled &&
5937 swl[swl_idx].fc4_type & FS_FC4TYPE_NVME) {
5938 ql_log(ql_log_info, vha, 0x2131,
5939 "FOUND: NVME port %8phC as FC Type 28h\n",
5940 new_fcport->port_name);
5941 }
5942
5943 if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
5944 last_dev = 1;
5945 }
5946 swl_idx++;
5947 }
5948 } else {
5949 /* Send GA_NXT to the switch */
5950 rval = qla2x00_ga_nxt(vha, new_fcport);
5951 if (rval != QLA_SUCCESS) {
5952 ql_log(ql_log_warn, vha, 0x209e,
5953 "SNS scan failed -- assuming "
5954 "zero-entry result.\n");
5955 rval = QLA_SUCCESS;
5956 break;
5957 }
5958 }
5959
5960 /* If wrap on switch device list, exit. */
5961 if (first_dev) {
5962 wrap.b24 = new_fcport->d_id.b24;
5963 first_dev = 0;
5964 } else if (new_fcport->d_id.b24 == wrap.b24) {
5965 ql_dbg(ql_dbg_disc, vha, 0x209f,
5966 "Device wrap (%02x%02x%02x).\n",
5967 new_fcport->d_id.b.domain,
5968 new_fcport->d_id.b.area,
5969 new_fcport->d_id.b.al_pa);
5970 break;
5971 }
5972
5973 /* Bypass if same physical adapter. */
5974 if (new_fcport->d_id.b24 == base_vha->d_id.b24)
5975 continue;
5976
5977 /* Bypass virtual ports of the same host. */
5978 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24))
5979 continue;
5980
5981 /* Bypass if same domain and area of adapter. */
5982 if (((new_fcport->d_id.b24 & 0xffff00) ==
5983 (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
5984 ISP_CFG_FL)
5985 continue;
5986
5987 /* Bypass reserved domain fields. */
5988 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
5989 continue;
5990
5991 /* Bypass ports whose FCP-4 type is not FCP_SCSI */
5992 if (ql2xgffidenable &&
5993 (!(new_fcport->fc4_type & FS_FC4TYPE_FCP) &&
5994 new_fcport->fc4_type != 0))
5995 continue;
5996
5997 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5998
5999 /* Locate matching device in database. */
6000 found = 0;
6001 list_for_each_entry(fcport, &vha->vp_fcports, list) {
6002 if (memcmp(new_fcport->port_name, fcport->port_name,
6003 WWN_SIZE))
6004 continue;
6005
6006 fcport->scan_state = QLA_FCPORT_FOUND;
6007
6008 found++;
6009
6010 /* Update port state. */
6011 memcpy(fcport->fabric_port_name,
6012 new_fcport->fabric_port_name, WWN_SIZE);
6013 fcport->fp_speed = new_fcport->fp_speed;
6014
6015 /*
6016 * If address the same and state FCS_ONLINE
6017 * (or in target mode), nothing changed.
6018 */
6019 if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
6020 (atomic_read(&fcport->state) == FCS_ONLINE ||
6021 (vha->host->active_mode == MODE_TARGET))) {
6022 break;
6023 }
6024
6025 /*
6026 * If device was not a fabric device before.
6027 */
6028 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
6029 fcport->d_id.b24 = new_fcport->d_id.b24;
6030 qla2x00_clear_loop_id(fcport);
6031 fcport->flags |= (FCF_FABRIC_DEVICE |
6032 FCF_LOGIN_NEEDED);
6033 break;
6034 }
6035
6036 /*
6037 * Port ID changed or device was marked to be updated;
6038 * Log it out if still logged in and mark it for
6039 * relogin later.
6040 */
6041 if (qla_tgt_mode_enabled(base_vha)) {
6042 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080,
6043 "port changed FC ID, %8phC"
6044 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n",
6045 fcport->port_name,
6046 fcport->d_id.b.domain,
6047 fcport->d_id.b.area,
6048 fcport->d_id.b.al_pa,
6049 fcport->loop_id,
6050 new_fcport->d_id.b.domain,
6051 new_fcport->d_id.b.area,
6052 new_fcport->d_id.b.al_pa);
6053 fcport->d_id.b24 = new_fcport->d_id.b24;
6054 break;
6055 }
6056
6057 fcport->d_id.b24 = new_fcport->d_id.b24;
6058 fcport->flags |= FCF_LOGIN_NEEDED;
6059 break;
6060 }
6061
6062 if (found && NVME_TARGET(vha->hw, fcport)) {
6063 if (fcport->disc_state == DSC_DELETE_PEND) {
6064 qla2x00_set_fcport_disc_state(fcport, DSC_GNL);
6065 vha->fcport_count--;
6066 fcport->login_succ = 0;
6067 }
6068 }
6069
6070 if (found) {
6071 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
6072 continue;
6073 }
6074 /* If device was not in our fcports list, then add it. */
6075 new_fcport->scan_state = QLA_FCPORT_FOUND;
6076 list_add_tail(&new_fcport->list, &vha->vp_fcports);
6077
6078 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
6079
6080
6081 /* Allocate a new replacement fcport. */
6082 nxt_d_id.b24 = new_fcport->d_id.b24;
6083 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
6084 if (new_fcport == NULL) {
6085 ql_log(ql_log_warn, vha, 0xd032,
6086 "Memory allocation failed for fcport.\n");
6087 return (QLA_MEMORY_ALLOC_FAILED);
6088 }
6089 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
6090 new_fcport->d_id.b24 = nxt_d_id.b24;
6091 }
6092
6093 qla2x00_free_fcport(new_fcport);
6094
6095 /*
6096 * Logout all previous fabric dev marked lost, except FCP2 devices.
6097 */
6098 list_for_each_entry(fcport, &vha->vp_fcports, list) {
6099 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6100 break;
6101
6102 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
6103 continue;
6104
6105 if (fcport->scan_state == QLA_FCPORT_SCAN) {
6106 if ((qla_dual_mode_enabled(vha) ||
6107 qla_ini_mode_enabled(vha)) &&
6108 atomic_read(&fcport->state) == FCS_ONLINE) {
6109 qla2x00_mark_device_lost(vha, fcport,
6110 ql2xplogiabsentdevice);
6111 if (fcport->loop_id != FC_NO_LOOP_ID &&
6112 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
6113 fcport->port_type != FCT_INITIATOR &&
6114 fcport->port_type != FCT_BROADCAST) {
6115 ql_dbg(ql_dbg_disc, vha, 0x20f0,
6116 "%s %d %8phC post del sess\n",
6117 __func__, __LINE__,
6118 fcport->port_name);
6119 qlt_schedule_sess_for_deletion(fcport);
6120 continue;
6121 }
6122 }
6123 }
6124
6125 if (fcport->scan_state == QLA_FCPORT_FOUND &&
6126 (fcport->flags & FCF_LOGIN_NEEDED) != 0)
6127 qla24xx_fcport_handle_login(vha, fcport);
6128 }
6129 return (rval);
6130 }
6131
6132 /* FW does not set aside Loop id for MGMT Server/FFFFFAh */
6133 int
qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t * vha)6134 qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha)
6135 {
6136 int loop_id = FC_NO_LOOP_ID;
6137 int lid = NPH_MGMT_SERVER - vha->vp_idx;
6138 unsigned long flags;
6139 struct qla_hw_data *ha = vha->hw;
6140
6141 if (vha->vp_idx == 0) {
6142 set_bit(NPH_MGMT_SERVER, ha->loop_id_map);
6143 return NPH_MGMT_SERVER;
6144 }
6145
6146 /* pick id from high and work down to low */
6147 spin_lock_irqsave(&ha->vport_slock, flags);
6148 for (; lid > 0; lid--) {
6149 if (!test_bit(lid, vha->hw->loop_id_map)) {
6150 set_bit(lid, vha->hw->loop_id_map);
6151 loop_id = lid;
6152 break;
6153 }
6154 }
6155 spin_unlock_irqrestore(&ha->vport_slock, flags);
6156
6157 return loop_id;
6158 }
6159
6160 /*
6161 * qla2x00_fabric_login
6162 * Issue fabric login command.
6163 *
6164 * Input:
6165 * ha = adapter block pointer.
6166 * device = pointer to FC device type structure.
6167 *
6168 * Returns:
6169 * 0 - Login successfully
6170 * 1 - Login failed
6171 * 2 - Initiator device
6172 * 3 - Fatal error
6173 */
6174 int
qla2x00_fabric_login(scsi_qla_host_t * vha,fc_port_t * fcport,uint16_t * next_loopid)6175 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
6176 uint16_t *next_loopid)
6177 {
6178 int rval;
6179 int retry;
6180 uint16_t tmp_loopid;
6181 uint16_t mb[MAILBOX_REGISTER_COUNT];
6182 struct qla_hw_data *ha = vha->hw;
6183
6184 retry = 0;
6185 tmp_loopid = 0;
6186
6187 for (;;) {
6188 ql_dbg(ql_dbg_disc, vha, 0x2000,
6189 "Trying Fabric Login w/loop id 0x%04x for port "
6190 "%02x%02x%02x.\n",
6191 fcport->loop_id, fcport->d_id.b.domain,
6192 fcport->d_id.b.area, fcport->d_id.b.al_pa);
6193
6194 /* Login fcport on switch. */
6195 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id,
6196 fcport->d_id.b.domain, fcport->d_id.b.area,
6197 fcport->d_id.b.al_pa, mb, BIT_0);
6198 if (rval != QLA_SUCCESS) {
6199 return rval;
6200 }
6201 if (mb[0] == MBS_PORT_ID_USED) {
6202 /*
6203 * Device has another loop ID. The firmware team
6204 * recommends the driver perform an implicit login with
6205 * the specified ID again. The ID we just used is save
6206 * here so we return with an ID that can be tried by
6207 * the next login.
6208 */
6209 retry++;
6210 tmp_loopid = fcport->loop_id;
6211 fcport->loop_id = mb[1];
6212
6213 ql_dbg(ql_dbg_disc, vha, 0x2001,
6214 "Fabric Login: port in use - next loop "
6215 "id=0x%04x, port id= %02x%02x%02x.\n",
6216 fcport->loop_id, fcport->d_id.b.domain,
6217 fcport->d_id.b.area, fcport->d_id.b.al_pa);
6218
6219 } else if (mb[0] == MBS_COMMAND_COMPLETE) {
6220 /*
6221 * Login succeeded.
6222 */
6223 if (retry) {
6224 /* A retry occurred before. */
6225 *next_loopid = tmp_loopid;
6226 } else {
6227 /*
6228 * No retry occurred before. Just increment the
6229 * ID value for next login.
6230 */
6231 *next_loopid = (fcport->loop_id + 1);
6232 }
6233
6234 if (mb[1] & BIT_0) {
6235 fcport->port_type = FCT_INITIATOR;
6236 } else {
6237 fcport->port_type = FCT_TARGET;
6238 if (mb[1] & BIT_1) {
6239 fcport->flags |= FCF_FCP2_DEVICE;
6240 }
6241 }
6242
6243 if (mb[10] & BIT_0)
6244 fcport->supported_classes |= FC_COS_CLASS2;
6245 if (mb[10] & BIT_1)
6246 fcport->supported_classes |= FC_COS_CLASS3;
6247
6248 if (IS_FWI2_CAPABLE(ha)) {
6249 if (mb[10] & BIT_7)
6250 fcport->flags |=
6251 FCF_CONF_COMP_SUPPORTED;
6252 }
6253
6254 rval = QLA_SUCCESS;
6255 break;
6256 } else if (mb[0] == MBS_LOOP_ID_USED) {
6257 /*
6258 * Loop ID already used, try next loop ID.
6259 */
6260 fcport->loop_id++;
6261 rval = qla2x00_find_new_loop_id(vha, fcport);
6262 if (rval != QLA_SUCCESS) {
6263 /* Ran out of loop IDs to use */
6264 break;
6265 }
6266 } else if (mb[0] == MBS_COMMAND_ERROR) {
6267 /*
6268 * Firmware possibly timed out during login. If NO
6269 * retries are left to do then the device is declared
6270 * dead.
6271 */
6272 *next_loopid = fcport->loop_id;
6273 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
6274 fcport->d_id.b.domain, fcport->d_id.b.area,
6275 fcport->d_id.b.al_pa);
6276 qla2x00_mark_device_lost(vha, fcport, 1);
6277
6278 rval = 1;
6279 break;
6280 } else {
6281 /*
6282 * unrecoverable / not handled error
6283 */
6284 ql_dbg(ql_dbg_disc, vha, 0x2002,
6285 "Failed=%x port_id=%02x%02x%02x loop_id=%x "
6286 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
6287 fcport->d_id.b.area, fcport->d_id.b.al_pa,
6288 fcport->loop_id, jiffies);
6289
6290 *next_loopid = fcport->loop_id;
6291 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
6292 fcport->d_id.b.domain, fcport->d_id.b.area,
6293 fcport->d_id.b.al_pa);
6294 qla2x00_clear_loop_id(fcport);
6295 fcport->login_retry = 0;
6296
6297 rval = 3;
6298 break;
6299 }
6300 }
6301
6302 return (rval);
6303 }
6304
6305 /*
6306 * qla2x00_local_device_login
6307 * Issue local device login command.
6308 *
6309 * Input:
6310 * ha = adapter block pointer.
6311 * loop_id = loop id of device to login to.
6312 *
6313 * Returns (Where's the #define!!!!):
6314 * 0 - Login successfully
6315 * 1 - Login failed
6316 * 3 - Fatal error
6317 */
6318 int
qla2x00_local_device_login(scsi_qla_host_t * vha,fc_port_t * fcport)6319 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
6320 {
6321 int rval;
6322 uint16_t mb[MAILBOX_REGISTER_COUNT];
6323
6324 memset(mb, 0, sizeof(mb));
6325 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
6326 if (rval == QLA_SUCCESS) {
6327 /* Interrogate mailbox registers for any errors */
6328 if (mb[0] == MBS_COMMAND_ERROR)
6329 rval = 1;
6330 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
6331 /* device not in PCB table */
6332 rval = 3;
6333 }
6334
6335 return (rval);
6336 }
6337
6338 /*
6339 * qla2x00_loop_resync
6340 * Resync with fibre channel devices.
6341 *
6342 * Input:
6343 * ha = adapter block pointer.
6344 *
6345 * Returns:
6346 * 0 = success
6347 */
6348 int
qla2x00_loop_resync(scsi_qla_host_t * vha)6349 qla2x00_loop_resync(scsi_qla_host_t *vha)
6350 {
6351 int rval = QLA_SUCCESS;
6352 uint32_t wait_time;
6353
6354 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6355 if (vha->flags.online) {
6356 if (!(rval = qla2x00_fw_ready(vha))) {
6357 /* Wait at most MAX_TARGET RSCNs for a stable link. */
6358 wait_time = 256;
6359 do {
6360 if (!IS_QLAFX00(vha->hw)) {
6361 /*
6362 * Issue a marker after FW becomes
6363 * ready.
6364 */
6365 qla2x00_marker(vha, vha->hw->base_qpair,
6366 0, 0, MK_SYNC_ALL);
6367 vha->marker_needed = 0;
6368 }
6369
6370 /* Remap devices on Loop. */
6371 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
6372
6373 if (IS_QLAFX00(vha->hw))
6374 qlafx00_configure_devices(vha);
6375 else
6376 qla2x00_configure_loop(vha);
6377
6378 wait_time--;
6379 } while (!atomic_read(&vha->loop_down_timer) &&
6380 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
6381 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
6382 &vha->dpc_flags)));
6383 }
6384 }
6385
6386 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
6387 return (QLA_FUNCTION_FAILED);
6388
6389 if (rval)
6390 ql_dbg(ql_dbg_disc, vha, 0x206c,
6391 "%s *** FAILED ***.\n", __func__);
6392
6393 return (rval);
6394 }
6395
6396 /*
6397 * qla2x00_perform_loop_resync
6398 * Description: This function will set the appropriate flags and call
6399 * qla2x00_loop_resync. If successful loop will be resynced
6400 * Arguments : scsi_qla_host_t pointer
6401 * returm : Success or Failure
6402 */
6403
qla2x00_perform_loop_resync(scsi_qla_host_t * ha)6404 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
6405 {
6406 int32_t rval = 0;
6407
6408 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
6409 /*Configure the flags so that resync happens properly*/
6410 atomic_set(&ha->loop_down_timer, 0);
6411 if (!(ha->device_flags & DFLG_NO_CABLE)) {
6412 atomic_set(&ha->loop_state, LOOP_UP);
6413 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
6414 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
6415 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
6416
6417 rval = qla2x00_loop_resync(ha);
6418 } else
6419 atomic_set(&ha->loop_state, LOOP_DEAD);
6420
6421 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
6422 }
6423
6424 return rval;
6425 }
6426
6427 void
qla2x00_update_fcports(scsi_qla_host_t * base_vha)6428 qla2x00_update_fcports(scsi_qla_host_t *base_vha)
6429 {
6430 fc_port_t *fcport;
6431 struct scsi_qla_host *vha;
6432 struct qla_hw_data *ha = base_vha->hw;
6433 unsigned long flags;
6434
6435 spin_lock_irqsave(&ha->vport_slock, flags);
6436 /* Go with deferred removal of rport references. */
6437 list_for_each_entry(vha, &base_vha->hw->vp_list, list) {
6438 atomic_inc(&vha->vref_count);
6439 list_for_each_entry(fcport, &vha->vp_fcports, list) {
6440 if (fcport->drport &&
6441 atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
6442 spin_unlock_irqrestore(&ha->vport_slock, flags);
6443 qla2x00_rport_del(fcport);
6444
6445 spin_lock_irqsave(&ha->vport_slock, flags);
6446 }
6447 }
6448 atomic_dec(&vha->vref_count);
6449 wake_up(&vha->vref_waitq);
6450 }
6451 spin_unlock_irqrestore(&ha->vport_slock, flags);
6452 }
6453
6454 /* Assumes idc_lock always held on entry */
6455 void
qla83xx_reset_ownership(scsi_qla_host_t * vha)6456 qla83xx_reset_ownership(scsi_qla_host_t *vha)
6457 {
6458 struct qla_hw_data *ha = vha->hw;
6459 uint32_t drv_presence, drv_presence_mask;
6460 uint32_t dev_part_info1, dev_part_info2, class_type;
6461 uint32_t class_type_mask = 0x3;
6462 uint16_t fcoe_other_function = 0xffff, i;
6463
6464 if (IS_QLA8044(ha)) {
6465 drv_presence = qla8044_rd_direct(vha,
6466 QLA8044_CRB_DRV_ACTIVE_INDEX);
6467 dev_part_info1 = qla8044_rd_direct(vha,
6468 QLA8044_CRB_DEV_PART_INFO_INDEX);
6469 dev_part_info2 = qla8044_rd_direct(vha,
6470 QLA8044_CRB_DEV_PART_INFO2);
6471 } else {
6472 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6473 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1);
6474 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2);
6475 }
6476 for (i = 0; i < 8; i++) {
6477 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask);
6478 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
6479 (i != ha->portnum)) {
6480 fcoe_other_function = i;
6481 break;
6482 }
6483 }
6484 if (fcoe_other_function == 0xffff) {
6485 for (i = 0; i < 8; i++) {
6486 class_type = ((dev_part_info2 >> (i * 4)) &
6487 class_type_mask);
6488 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
6489 ((i + 8) != ha->portnum)) {
6490 fcoe_other_function = i + 8;
6491 break;
6492 }
6493 }
6494 }
6495 /*
6496 * Prepare drv-presence mask based on fcoe functions present.
6497 * However consider only valid physical fcoe function numbers (0-15).
6498 */
6499 drv_presence_mask = ~((1 << (ha->portnum)) |
6500 ((fcoe_other_function == 0xffff) ?
6501 0 : (1 << (fcoe_other_function))));
6502
6503 /* We are the reset owner iff:
6504 * - No other protocol drivers present.
6505 * - This is the lowest among fcoe functions. */
6506 if (!(drv_presence & drv_presence_mask) &&
6507 (ha->portnum < fcoe_other_function)) {
6508 ql_dbg(ql_dbg_p3p, vha, 0xb07f,
6509 "This host is Reset owner.\n");
6510 ha->flags.nic_core_reset_owner = 1;
6511 }
6512 }
6513
6514 static int
__qla83xx_set_drv_ack(scsi_qla_host_t * vha)6515 __qla83xx_set_drv_ack(scsi_qla_host_t *vha)
6516 {
6517 int rval = QLA_SUCCESS;
6518 struct qla_hw_data *ha = vha->hw;
6519 uint32_t drv_ack;
6520
6521 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6522 if (rval == QLA_SUCCESS) {
6523 drv_ack |= (1 << ha->portnum);
6524 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
6525 }
6526
6527 return rval;
6528 }
6529
6530 static int
__qla83xx_clear_drv_ack(scsi_qla_host_t * vha)6531 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha)
6532 {
6533 int rval = QLA_SUCCESS;
6534 struct qla_hw_data *ha = vha->hw;
6535 uint32_t drv_ack;
6536
6537 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6538 if (rval == QLA_SUCCESS) {
6539 drv_ack &= ~(1 << ha->portnum);
6540 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
6541 }
6542
6543 return rval;
6544 }
6545
6546 static const char *
qla83xx_dev_state_to_string(uint32_t dev_state)6547 qla83xx_dev_state_to_string(uint32_t dev_state)
6548 {
6549 switch (dev_state) {
6550 case QLA8XXX_DEV_COLD:
6551 return "COLD/RE-INIT";
6552 case QLA8XXX_DEV_INITIALIZING:
6553 return "INITIALIZING";
6554 case QLA8XXX_DEV_READY:
6555 return "READY";
6556 case QLA8XXX_DEV_NEED_RESET:
6557 return "NEED RESET";
6558 case QLA8XXX_DEV_NEED_QUIESCENT:
6559 return "NEED QUIESCENT";
6560 case QLA8XXX_DEV_FAILED:
6561 return "FAILED";
6562 case QLA8XXX_DEV_QUIESCENT:
6563 return "QUIESCENT";
6564 default:
6565 return "Unknown";
6566 }
6567 }
6568
6569 /* Assumes idc-lock always held on entry */
6570 void
qla83xx_idc_audit(scsi_qla_host_t * vha,int audit_type)6571 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type)
6572 {
6573 struct qla_hw_data *ha = vha->hw;
6574 uint32_t idc_audit_reg = 0, duration_secs = 0;
6575
6576 switch (audit_type) {
6577 case IDC_AUDIT_TIMESTAMP:
6578 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000);
6579 idc_audit_reg = (ha->portnum) |
6580 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8);
6581 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
6582 break;
6583
6584 case IDC_AUDIT_COMPLETION:
6585 duration_secs = ((jiffies_to_msecs(jiffies) -
6586 jiffies_to_msecs(ha->idc_audit_ts)) / 1000);
6587 idc_audit_reg = (ha->portnum) |
6588 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8);
6589 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
6590 break;
6591
6592 default:
6593 ql_log(ql_log_warn, vha, 0xb078,
6594 "Invalid audit type specified.\n");
6595 break;
6596 }
6597 }
6598
6599 /* Assumes idc_lock always held on entry */
6600 static int
qla83xx_initiating_reset(scsi_qla_host_t * vha)6601 qla83xx_initiating_reset(scsi_qla_host_t *vha)
6602 {
6603 struct qla_hw_data *ha = vha->hw;
6604 uint32_t idc_control, dev_state;
6605
6606 __qla83xx_get_idc_control(vha, &idc_control);
6607 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) {
6608 ql_log(ql_log_info, vha, 0xb080,
6609 "NIC Core reset has been disabled. idc-control=0x%x\n",
6610 idc_control);
6611 return QLA_FUNCTION_FAILED;
6612 }
6613
6614 /* Set NEED-RESET iff in READY state and we are the reset-owner */
6615 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6616 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) {
6617 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
6618 QLA8XXX_DEV_NEED_RESET);
6619 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n");
6620 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP);
6621 } else {
6622 const char *state = qla83xx_dev_state_to_string(dev_state);
6623
6624 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state);
6625
6626 /* SV: XXX: Is timeout required here? */
6627 /* Wait for IDC state change READY -> NEED_RESET */
6628 while (dev_state == QLA8XXX_DEV_READY) {
6629 qla83xx_idc_unlock(vha, 0);
6630 msleep(200);
6631 qla83xx_idc_lock(vha, 0);
6632 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6633 }
6634 }
6635
6636 /* Send IDC ack by writing to drv-ack register */
6637 __qla83xx_set_drv_ack(vha);
6638
6639 return QLA_SUCCESS;
6640 }
6641
6642 int
__qla83xx_set_idc_control(scsi_qla_host_t * vha,uint32_t idc_control)6643 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control)
6644 {
6645 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
6646 }
6647
6648 int
__qla83xx_get_idc_control(scsi_qla_host_t * vha,uint32_t * idc_control)6649 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control)
6650 {
6651 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
6652 }
6653
6654 static int
qla83xx_check_driver_presence(scsi_qla_host_t * vha)6655 qla83xx_check_driver_presence(scsi_qla_host_t *vha)
6656 {
6657 uint32_t drv_presence = 0;
6658 struct qla_hw_data *ha = vha->hw;
6659
6660 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6661 if (drv_presence & (1 << ha->portnum))
6662 return QLA_SUCCESS;
6663 else
6664 return QLA_TEST_FAILED;
6665 }
6666
6667 int
qla83xx_nic_core_reset(scsi_qla_host_t * vha)6668 qla83xx_nic_core_reset(scsi_qla_host_t *vha)
6669 {
6670 int rval = QLA_SUCCESS;
6671 struct qla_hw_data *ha = vha->hw;
6672
6673 ql_dbg(ql_dbg_p3p, vha, 0xb058,
6674 "Entered %s().\n", __func__);
6675
6676 if (vha->device_flags & DFLG_DEV_FAILED) {
6677 ql_log(ql_log_warn, vha, 0xb059,
6678 "Device in unrecoverable FAILED state.\n");
6679 return QLA_FUNCTION_FAILED;
6680 }
6681
6682 qla83xx_idc_lock(vha, 0);
6683
6684 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) {
6685 ql_log(ql_log_warn, vha, 0xb05a,
6686 "Function=0x%x has been removed from IDC participation.\n",
6687 ha->portnum);
6688 rval = QLA_FUNCTION_FAILED;
6689 goto exit;
6690 }
6691
6692 qla83xx_reset_ownership(vha);
6693
6694 rval = qla83xx_initiating_reset(vha);
6695
6696 /*
6697 * Perform reset if we are the reset-owner,
6698 * else wait till IDC state changes to READY/FAILED.
6699 */
6700 if (rval == QLA_SUCCESS) {
6701 rval = qla83xx_idc_state_handler(vha);
6702
6703 if (rval == QLA_SUCCESS)
6704 ha->flags.nic_core_hung = 0;
6705 __qla83xx_clear_drv_ack(vha);
6706 }
6707
6708 exit:
6709 qla83xx_idc_unlock(vha, 0);
6710
6711 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__);
6712
6713 return rval;
6714 }
6715
6716 int
qla2xxx_mctp_dump(scsi_qla_host_t * vha)6717 qla2xxx_mctp_dump(scsi_qla_host_t *vha)
6718 {
6719 struct qla_hw_data *ha = vha->hw;
6720 int rval = QLA_FUNCTION_FAILED;
6721
6722 if (!IS_MCTP_CAPABLE(ha)) {
6723 /* This message can be removed from the final version */
6724 ql_log(ql_log_info, vha, 0x506d,
6725 "This board is not MCTP capable\n");
6726 return rval;
6727 }
6728
6729 if (!ha->mctp_dump) {
6730 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev,
6731 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL);
6732
6733 if (!ha->mctp_dump) {
6734 ql_log(ql_log_warn, vha, 0x506e,
6735 "Failed to allocate memory for mctp dump\n");
6736 return rval;
6737 }
6738 }
6739
6740 #define MCTP_DUMP_STR_ADDR 0x00000000
6741 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma,
6742 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4);
6743 if (rval != QLA_SUCCESS) {
6744 ql_log(ql_log_warn, vha, 0x506f,
6745 "Failed to capture mctp dump\n");
6746 } else {
6747 ql_log(ql_log_info, vha, 0x5070,
6748 "Mctp dump capture for host (%ld/%p).\n",
6749 vha->host_no, ha->mctp_dump);
6750 ha->mctp_dumped = 1;
6751 }
6752
6753 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) {
6754 ha->flags.nic_core_reset_hdlr_active = 1;
6755 rval = qla83xx_restart_nic_firmware(vha);
6756 if (rval)
6757 /* NIC Core reset failed. */
6758 ql_log(ql_log_warn, vha, 0x5071,
6759 "Failed to restart nic firmware\n");
6760 else
6761 ql_dbg(ql_dbg_p3p, vha, 0xb084,
6762 "Restarted NIC firmware successfully.\n");
6763 ha->flags.nic_core_reset_hdlr_active = 0;
6764 }
6765
6766 return rval;
6767
6768 }
6769
6770 /*
6771 * qla2x00_quiesce_io
6772 * Description: This function will block the new I/Os
6773 * Its not aborting any I/Os as context
6774 * is not destroyed during quiescence
6775 * Arguments: scsi_qla_host_t
6776 * return : void
6777 */
6778 void
qla2x00_quiesce_io(scsi_qla_host_t * vha)6779 qla2x00_quiesce_io(scsi_qla_host_t *vha)
6780 {
6781 struct qla_hw_data *ha = vha->hw;
6782 struct scsi_qla_host *vp;
6783
6784 ql_dbg(ql_dbg_dpc, vha, 0x401d,
6785 "Quiescing I/O - ha=%p.\n", ha);
6786
6787 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
6788 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
6789 atomic_set(&vha->loop_state, LOOP_DOWN);
6790 qla2x00_mark_all_devices_lost(vha);
6791 list_for_each_entry(vp, &ha->vp_list, list)
6792 qla2x00_mark_all_devices_lost(vp);
6793 } else {
6794 if (!atomic_read(&vha->loop_down_timer))
6795 atomic_set(&vha->loop_down_timer,
6796 LOOP_DOWN_TIME);
6797 }
6798 /* Wait for pending cmds to complete */
6799 WARN_ON_ONCE(qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST)
6800 != QLA_SUCCESS);
6801 }
6802
6803 void
qla2x00_abort_isp_cleanup(scsi_qla_host_t * vha)6804 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
6805 {
6806 struct qla_hw_data *ha = vha->hw;
6807 struct scsi_qla_host *vp;
6808 unsigned long flags;
6809 fc_port_t *fcport;
6810 u16 i;
6811
6812 /* For ISP82XX, driver waits for completion of the commands.
6813 * online flag should be set.
6814 */
6815 if (!(IS_P3P_TYPE(ha)))
6816 vha->flags.online = 0;
6817 ha->flags.chip_reset_done = 0;
6818 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
6819 vha->qla_stats.total_isp_aborts++;
6820
6821 ql_log(ql_log_info, vha, 0x00af,
6822 "Performing ISP error recovery - ha=%p.\n", ha);
6823
6824 ha->flags.purge_mbox = 1;
6825 /* For ISP82XX, reset_chip is just disabling interrupts.
6826 * Driver waits for the completion of the commands.
6827 * the interrupts need to be enabled.
6828 */
6829 if (!(IS_P3P_TYPE(ha)))
6830 ha->isp_ops->reset_chip(vha);
6831
6832 ha->link_data_rate = PORT_SPEED_UNKNOWN;
6833 SAVE_TOPO(ha);
6834 ha->flags.rida_fmt2 = 0;
6835 ha->flags.n2n_ae = 0;
6836 ha->flags.lip_ae = 0;
6837 ha->current_topology = 0;
6838 QLA_FW_STOPPED(ha);
6839 ha->flags.fw_init_done = 0;
6840 ha->chip_reset++;
6841 ha->base_qpair->chip_reset = ha->chip_reset;
6842 for (i = 0; i < ha->max_qpairs; i++) {
6843 if (ha->queue_pair_map[i])
6844 ha->queue_pair_map[i]->chip_reset =
6845 ha->base_qpair->chip_reset;
6846 }
6847
6848 /* purge MBox commands */
6849 if (atomic_read(&ha->num_pend_mbx_stage3)) {
6850 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
6851 complete(&ha->mbx_intr_comp);
6852 }
6853
6854 i = 0;
6855 while (atomic_read(&ha->num_pend_mbx_stage3) ||
6856 atomic_read(&ha->num_pend_mbx_stage2) ||
6857 atomic_read(&ha->num_pend_mbx_stage1)) {
6858 msleep(20);
6859 i++;
6860 if (i > 50)
6861 break;
6862 }
6863 ha->flags.purge_mbox = 0;
6864
6865 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
6866 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
6867 atomic_set(&vha->loop_state, LOOP_DOWN);
6868 qla2x00_mark_all_devices_lost(vha);
6869
6870 spin_lock_irqsave(&ha->vport_slock, flags);
6871 list_for_each_entry(vp, &ha->vp_list, list) {
6872 atomic_inc(&vp->vref_count);
6873 spin_unlock_irqrestore(&ha->vport_slock, flags);
6874
6875 qla2x00_mark_all_devices_lost(vp);
6876
6877 spin_lock_irqsave(&ha->vport_slock, flags);
6878 atomic_dec(&vp->vref_count);
6879 }
6880 spin_unlock_irqrestore(&ha->vport_slock, flags);
6881 } else {
6882 if (!atomic_read(&vha->loop_down_timer))
6883 atomic_set(&vha->loop_down_timer,
6884 LOOP_DOWN_TIME);
6885 }
6886
6887 /* Clear all async request states across all VPs. */
6888 list_for_each_entry(fcport, &vha->vp_fcports, list) {
6889 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6890 fcport->scan_state = 0;
6891 }
6892 spin_lock_irqsave(&ha->vport_slock, flags);
6893 list_for_each_entry(vp, &ha->vp_list, list) {
6894 atomic_inc(&vp->vref_count);
6895 spin_unlock_irqrestore(&ha->vport_slock, flags);
6896
6897 list_for_each_entry(fcport, &vp->vp_fcports, list)
6898 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6899
6900 spin_lock_irqsave(&ha->vport_slock, flags);
6901 atomic_dec(&vp->vref_count);
6902 }
6903 spin_unlock_irqrestore(&ha->vport_slock, flags);
6904
6905 if (!ha->flags.eeh_busy) {
6906 /* Make sure for ISP 82XX IO DMA is complete */
6907 if (IS_P3P_TYPE(ha)) {
6908 qla82xx_chip_reset_cleanup(vha);
6909 ql_log(ql_log_info, vha, 0x00b4,
6910 "Done chip reset cleanup.\n");
6911
6912 /* Done waiting for pending commands.
6913 * Reset the online flag.
6914 */
6915 vha->flags.online = 0;
6916 }
6917
6918 /* Requeue all commands in outstanding command list. */
6919 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
6920 }
6921 /* memory barrier */
6922 wmb();
6923 }
6924
6925 /*
6926 * qla2x00_abort_isp
6927 * Resets ISP and aborts all outstanding commands.
6928 *
6929 * Input:
6930 * ha = adapter block pointer.
6931 *
6932 * Returns:
6933 * 0 = success
6934 */
6935 int
qla2x00_abort_isp(scsi_qla_host_t * vha)6936 qla2x00_abort_isp(scsi_qla_host_t *vha)
6937 {
6938 int rval;
6939 uint8_t status = 0;
6940 struct qla_hw_data *ha = vha->hw;
6941 struct scsi_qla_host *vp;
6942 struct req_que *req = ha->req_q_map[0];
6943 unsigned long flags;
6944
6945 if (vha->flags.online) {
6946 qla2x00_abort_isp_cleanup(vha);
6947
6948 if (test_and_clear_bit(ISP_ABORT_TO_ROM, &vha->dpc_flags)) {
6949 ha->flags.chip_reset_done = 1;
6950 vha->flags.online = 1;
6951 status = 0;
6952 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6953 return status;
6954 }
6955
6956 if (IS_QLA8031(ha)) {
6957 ql_dbg(ql_dbg_p3p, vha, 0xb05c,
6958 "Clearing fcoe driver presence.\n");
6959 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS)
6960 ql_dbg(ql_dbg_p3p, vha, 0xb073,
6961 "Error while clearing DRV-Presence.\n");
6962 }
6963
6964 if (unlikely(pci_channel_offline(ha->pdev) &&
6965 ha->flags.pci_channel_io_perm_failure)) {
6966 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6967 status = 0;
6968 return status;
6969 }
6970
6971 switch (vha->qlini_mode) {
6972 case QLA2XXX_INI_MODE_DISABLED:
6973 if (!qla_tgt_mode_enabled(vha))
6974 return 0;
6975 break;
6976 case QLA2XXX_INI_MODE_DUAL:
6977 if (!qla_dual_mode_enabled(vha) &&
6978 !qla_ini_mode_enabled(vha))
6979 return 0;
6980 break;
6981 case QLA2XXX_INI_MODE_ENABLED:
6982 default:
6983 break;
6984 }
6985
6986 ha->isp_ops->get_flash_version(vha, req->ring);
6987
6988 ha->isp_ops->nvram_config(vha);
6989
6990 if (!qla2x00_restart_isp(vha)) {
6991 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6992
6993 if (!atomic_read(&vha->loop_down_timer)) {
6994 /*
6995 * Issue marker command only when we are going
6996 * to start the I/O .
6997 */
6998 vha->marker_needed = 1;
6999 }
7000
7001 vha->flags.online = 1;
7002
7003 ha->isp_ops->enable_intrs(ha);
7004
7005 ha->isp_abort_cnt = 0;
7006 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
7007
7008 if (IS_QLA81XX(ha) || IS_QLA8031(ha))
7009 qla2x00_get_fw_version(vha);
7010 if (ha->fce) {
7011 ha->flags.fce_enabled = 1;
7012 memset(ha->fce, 0,
7013 fce_calc_size(ha->fce_bufs));
7014 rval = qla2x00_enable_fce_trace(vha,
7015 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
7016 &ha->fce_bufs);
7017 if (rval) {
7018 ql_log(ql_log_warn, vha, 0x8033,
7019 "Unable to reinitialize FCE "
7020 "(%d).\n", rval);
7021 ha->flags.fce_enabled = 0;
7022 }
7023 }
7024
7025 if (ha->eft) {
7026 memset(ha->eft, 0, EFT_SIZE);
7027 rval = qla2x00_enable_eft_trace(vha,
7028 ha->eft_dma, EFT_NUM_BUFFERS);
7029 if (rval) {
7030 ql_log(ql_log_warn, vha, 0x8034,
7031 "Unable to reinitialize EFT "
7032 "(%d).\n", rval);
7033 }
7034 }
7035 } else { /* failed the ISP abort */
7036 vha->flags.online = 1;
7037 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
7038 if (ha->isp_abort_cnt == 0) {
7039 ql_log(ql_log_fatal, vha, 0x8035,
7040 "ISP error recover failed - "
7041 "board disabled.\n");
7042 /*
7043 * The next call disables the board
7044 * completely.
7045 */
7046 qla2x00_abort_isp_cleanup(vha);
7047 vha->flags.online = 0;
7048 clear_bit(ISP_ABORT_RETRY,
7049 &vha->dpc_flags);
7050 status = 0;
7051 } else { /* schedule another ISP abort */
7052 ha->isp_abort_cnt--;
7053 ql_dbg(ql_dbg_taskm, vha, 0x8020,
7054 "ISP abort - retry remaining %d.\n",
7055 ha->isp_abort_cnt);
7056 status = 1;
7057 }
7058 } else {
7059 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
7060 ql_dbg(ql_dbg_taskm, vha, 0x8021,
7061 "ISP error recovery - retrying (%d) "
7062 "more times.\n", ha->isp_abort_cnt);
7063 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
7064 status = 1;
7065 }
7066 }
7067
7068 }
7069
7070 if (!status) {
7071 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__);
7072 qla2x00_configure_hba(vha);
7073 spin_lock_irqsave(&ha->vport_slock, flags);
7074 list_for_each_entry(vp, &ha->vp_list, list) {
7075 if (vp->vp_idx) {
7076 atomic_inc(&vp->vref_count);
7077 spin_unlock_irqrestore(&ha->vport_slock, flags);
7078
7079 qla2x00_vp_abort_isp(vp);
7080
7081 spin_lock_irqsave(&ha->vport_slock, flags);
7082 atomic_dec(&vp->vref_count);
7083 }
7084 }
7085 spin_unlock_irqrestore(&ha->vport_slock, flags);
7086
7087 if (IS_QLA8031(ha)) {
7088 ql_dbg(ql_dbg_p3p, vha, 0xb05d,
7089 "Setting back fcoe driver presence.\n");
7090 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS)
7091 ql_dbg(ql_dbg_p3p, vha, 0xb074,
7092 "Error while setting DRV-Presence.\n");
7093 }
7094 } else {
7095 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n",
7096 __func__);
7097 }
7098
7099 return(status);
7100 }
7101
7102 /*
7103 * qla2x00_restart_isp
7104 * restarts the ISP after a reset
7105 *
7106 * Input:
7107 * ha = adapter block pointer.
7108 *
7109 * Returns:
7110 * 0 = success
7111 */
7112 static int
qla2x00_restart_isp(scsi_qla_host_t * vha)7113 qla2x00_restart_isp(scsi_qla_host_t *vha)
7114 {
7115 int status;
7116 struct qla_hw_data *ha = vha->hw;
7117
7118 /* If firmware needs to be loaded */
7119 if (qla2x00_isp_firmware(vha)) {
7120 vha->flags.online = 0;
7121 status = ha->isp_ops->chip_diag(vha);
7122 if (status)
7123 return status;
7124 status = qla2x00_setup_chip(vha);
7125 if (status)
7126 return status;
7127 }
7128
7129 status = qla2x00_init_rings(vha);
7130 if (status)
7131 return status;
7132
7133 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
7134 ha->flags.chip_reset_done = 1;
7135
7136 /* Initialize the queues in use */
7137 qla25xx_init_queues(ha);
7138
7139 status = qla2x00_fw_ready(vha);
7140 if (status) {
7141 /* if no cable then assume it's good */
7142 return vha->device_flags & DFLG_NO_CABLE ? 0 : status;
7143 }
7144
7145 /* Issue a marker after FW becomes ready. */
7146 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
7147 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
7148
7149 return 0;
7150 }
7151
7152 static int
qla25xx_init_queues(struct qla_hw_data * ha)7153 qla25xx_init_queues(struct qla_hw_data *ha)
7154 {
7155 struct rsp_que *rsp = NULL;
7156 struct req_que *req = NULL;
7157 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
7158 int ret = -1;
7159 int i;
7160
7161 for (i = 1; i < ha->max_rsp_queues; i++) {
7162 rsp = ha->rsp_q_map[i];
7163 if (rsp && test_bit(i, ha->rsp_qid_map)) {
7164 rsp->options &= ~BIT_0;
7165 ret = qla25xx_init_rsp_que(base_vha, rsp);
7166 if (ret != QLA_SUCCESS)
7167 ql_dbg(ql_dbg_init, base_vha, 0x00ff,
7168 "%s Rsp que: %d init failed.\n",
7169 __func__, rsp->id);
7170 else
7171 ql_dbg(ql_dbg_init, base_vha, 0x0100,
7172 "%s Rsp que: %d inited.\n",
7173 __func__, rsp->id);
7174 }
7175 }
7176 for (i = 1; i < ha->max_req_queues; i++) {
7177 req = ha->req_q_map[i];
7178 if (req && test_bit(i, ha->req_qid_map)) {
7179 /* Clear outstanding commands array. */
7180 req->options &= ~BIT_0;
7181 ret = qla25xx_init_req_que(base_vha, req);
7182 if (ret != QLA_SUCCESS)
7183 ql_dbg(ql_dbg_init, base_vha, 0x0101,
7184 "%s Req que: %d init failed.\n",
7185 __func__, req->id);
7186 else
7187 ql_dbg(ql_dbg_init, base_vha, 0x0102,
7188 "%s Req que: %d inited.\n",
7189 __func__, req->id);
7190 }
7191 }
7192 return ret;
7193 }
7194
7195 /*
7196 * qla2x00_reset_adapter
7197 * Reset adapter.
7198 *
7199 * Input:
7200 * ha = adapter block pointer.
7201 */
7202 int
qla2x00_reset_adapter(scsi_qla_host_t * vha)7203 qla2x00_reset_adapter(scsi_qla_host_t *vha)
7204 {
7205 unsigned long flags = 0;
7206 struct qla_hw_data *ha = vha->hw;
7207 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
7208
7209 vha->flags.online = 0;
7210 ha->isp_ops->disable_intrs(ha);
7211
7212 spin_lock_irqsave(&ha->hardware_lock, flags);
7213 wrt_reg_word(®->hccr, HCCR_RESET_RISC);
7214 rd_reg_word(®->hccr); /* PCI Posting. */
7215 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC);
7216 rd_reg_word(®->hccr); /* PCI Posting. */
7217 spin_unlock_irqrestore(&ha->hardware_lock, flags);
7218
7219 return QLA_SUCCESS;
7220 }
7221
7222 int
qla24xx_reset_adapter(scsi_qla_host_t * vha)7223 qla24xx_reset_adapter(scsi_qla_host_t *vha)
7224 {
7225 unsigned long flags = 0;
7226 struct qla_hw_data *ha = vha->hw;
7227 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
7228
7229 if (IS_P3P_TYPE(ha))
7230 return QLA_SUCCESS;
7231
7232 vha->flags.online = 0;
7233 ha->isp_ops->disable_intrs(ha);
7234
7235 spin_lock_irqsave(&ha->hardware_lock, flags);
7236 wrt_reg_dword(®->hccr, HCCRX_SET_RISC_RESET);
7237 rd_reg_dword(®->hccr);
7238 wrt_reg_dword(®->hccr, HCCRX_REL_RISC_PAUSE);
7239 rd_reg_dword(®->hccr);
7240 spin_unlock_irqrestore(&ha->hardware_lock, flags);
7241
7242 if (IS_NOPOLLING_TYPE(ha))
7243 ha->isp_ops->enable_intrs(ha);
7244
7245 return QLA_SUCCESS;
7246 }
7247
7248 /* On sparc systems, obtain port and node WWN from firmware
7249 * properties.
7250 */
qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t * vha,struct nvram_24xx * nv)7251 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
7252 struct nvram_24xx *nv)
7253 {
7254 #ifdef CONFIG_SPARC
7255 struct qla_hw_data *ha = vha->hw;
7256 struct pci_dev *pdev = ha->pdev;
7257 struct device_node *dp = pci_device_to_OF_node(pdev);
7258 const u8 *val;
7259 int len;
7260
7261 val = of_get_property(dp, "port-wwn", &len);
7262 if (val && len >= WWN_SIZE)
7263 memcpy(nv->port_name, val, WWN_SIZE);
7264
7265 val = of_get_property(dp, "node-wwn", &len);
7266 if (val && len >= WWN_SIZE)
7267 memcpy(nv->node_name, val, WWN_SIZE);
7268 #endif
7269 }
7270
7271 int
qla24xx_nvram_config(scsi_qla_host_t * vha)7272 qla24xx_nvram_config(scsi_qla_host_t *vha)
7273 {
7274 int rval;
7275 struct init_cb_24xx *icb;
7276 struct nvram_24xx *nv;
7277 __le32 *dptr;
7278 uint8_t *dptr1, *dptr2;
7279 uint32_t chksum;
7280 uint16_t cnt;
7281 struct qla_hw_data *ha = vha->hw;
7282
7283 rval = QLA_SUCCESS;
7284 icb = (struct init_cb_24xx *)ha->init_cb;
7285 nv = ha->nvram;
7286
7287 /* Determine NVRAM starting address. */
7288 if (ha->port_no == 0) {
7289 ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
7290 ha->vpd_base = FA_NVRAM_VPD0_ADDR;
7291 } else {
7292 ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
7293 ha->vpd_base = FA_NVRAM_VPD1_ADDR;
7294 }
7295
7296 ha->nvram_size = sizeof(*nv);
7297 ha->vpd_size = FA_NVRAM_VPD_SIZE;
7298
7299 /* Get VPD data into cache */
7300 ha->vpd = ha->nvram + VPD_OFFSET;
7301 ha->isp_ops->read_nvram(vha, ha->vpd,
7302 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
7303
7304 /* Get NVRAM data into cache and calculate checksum. */
7305 dptr = (__force __le32 *)nv;
7306 ha->isp_ops->read_nvram(vha, dptr, ha->nvram_base, ha->nvram_size);
7307 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
7308 chksum += le32_to_cpu(*dptr);
7309
7310 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
7311 "Contents of NVRAM\n");
7312 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
7313 nv, ha->nvram_size);
7314
7315 /* Bad NVRAM data, set defaults parameters. */
7316 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
7317 le16_to_cpu(nv->nvram_version) < ICB_VERSION) {
7318 /* Reset NVRAM data. */
7319 ql_log(ql_log_warn, vha, 0x006b,
7320 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n",
7321 chksum, nv->id, nv->nvram_version);
7322 ql_dump_buffer(ql_dbg_init, vha, 0x006b, nv, sizeof(*nv));
7323 ql_log(ql_log_warn, vha, 0x006c,
7324 "Falling back to functioning (yet invalid -- WWPN) "
7325 "defaults.\n");
7326
7327 /*
7328 * Set default initialization control block.
7329 */
7330 memset(nv, 0, ha->nvram_size);
7331 nv->nvram_version = cpu_to_le16(ICB_VERSION);
7332 nv->version = cpu_to_le16(ICB_VERSION);
7333 nv->frame_payload_size = cpu_to_le16(2048);
7334 nv->execution_throttle = cpu_to_le16(0xFFFF);
7335 nv->exchange_count = cpu_to_le16(0);
7336 nv->hard_address = cpu_to_le16(124);
7337 nv->port_name[0] = 0x21;
7338 nv->port_name[1] = 0x00 + ha->port_no + 1;
7339 nv->port_name[2] = 0x00;
7340 nv->port_name[3] = 0xe0;
7341 nv->port_name[4] = 0x8b;
7342 nv->port_name[5] = 0x1c;
7343 nv->port_name[6] = 0x55;
7344 nv->port_name[7] = 0x86;
7345 nv->node_name[0] = 0x20;
7346 nv->node_name[1] = 0x00;
7347 nv->node_name[2] = 0x00;
7348 nv->node_name[3] = 0xe0;
7349 nv->node_name[4] = 0x8b;
7350 nv->node_name[5] = 0x1c;
7351 nv->node_name[6] = 0x55;
7352 nv->node_name[7] = 0x86;
7353 qla24xx_nvram_wwn_from_ofw(vha, nv);
7354 nv->login_retry_count = cpu_to_le16(8);
7355 nv->interrupt_delay_timer = cpu_to_le16(0);
7356 nv->login_timeout = cpu_to_le16(0);
7357 nv->firmware_options_1 =
7358 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
7359 nv->firmware_options_2 = cpu_to_le32(2 << 4);
7360 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
7361 nv->firmware_options_3 = cpu_to_le32(2 << 13);
7362 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
7363 nv->efi_parameters = cpu_to_le32(0);
7364 nv->reset_delay = 5;
7365 nv->max_luns_per_target = cpu_to_le16(128);
7366 nv->port_down_retry_count = cpu_to_le16(30);
7367 nv->link_down_timeout = cpu_to_le16(30);
7368
7369 rval = 1;
7370 }
7371
7372 if (qla_tgt_mode_enabled(vha)) {
7373 /* Don't enable full login after initial LIP */
7374 nv->firmware_options_1 &= cpu_to_le32(~BIT_13);
7375 /* Don't enable LIP full login for initiator */
7376 nv->host_p &= cpu_to_le32(~BIT_10);
7377 }
7378
7379 qlt_24xx_config_nvram_stage1(vha, nv);
7380
7381 /* Reset Initialization control block */
7382 memset(icb, 0, ha->init_cb_size);
7383
7384 /* Copy 1st segment. */
7385 dptr1 = (uint8_t *)icb;
7386 dptr2 = (uint8_t *)&nv->version;
7387 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
7388 while (cnt--)
7389 *dptr1++ = *dptr2++;
7390
7391 icb->login_retry_count = nv->login_retry_count;
7392 icb->link_down_on_nos = nv->link_down_on_nos;
7393
7394 /* Copy 2nd segment. */
7395 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
7396 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
7397 cnt = (uint8_t *)&icb->reserved_3 -
7398 (uint8_t *)&icb->interrupt_delay_timer;
7399 while (cnt--)
7400 *dptr1++ = *dptr2++;
7401 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
7402 /*
7403 * Setup driver NVRAM options.
7404 */
7405 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
7406 "QLA2462");
7407
7408 qlt_24xx_config_nvram_stage2(vha, icb);
7409
7410 if (nv->host_p & cpu_to_le32(BIT_15)) {
7411 /* Use alternate WWN? */
7412 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
7413 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
7414 }
7415
7416 /* Prepare nodename */
7417 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
7418 /*
7419 * Firmware will apply the following mask if the nodename was
7420 * not provided.
7421 */
7422 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
7423 icb->node_name[0] &= 0xF0;
7424 }
7425
7426 /* Set host adapter parameters. */
7427 ha->flags.disable_risc_code_load = 0;
7428 ha->flags.enable_lip_reset = 0;
7429 ha->flags.enable_lip_full_login =
7430 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0;
7431 ha->flags.enable_target_reset =
7432 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0;
7433 ha->flags.enable_led_scheme = 0;
7434 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0;
7435
7436 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
7437 (BIT_6 | BIT_5 | BIT_4)) >> 4;
7438
7439 memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
7440 sizeof(ha->fw_seriallink_options24));
7441
7442 /* save HBA serial number */
7443 ha->serial0 = icb->port_name[5];
7444 ha->serial1 = icb->port_name[6];
7445 ha->serial2 = icb->port_name[7];
7446 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
7447 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
7448
7449 icb->execution_throttle = cpu_to_le16(0xFFFF);
7450
7451 ha->retry_count = le16_to_cpu(nv->login_retry_count);
7452
7453 /* Set minimum login_timeout to 4 seconds. */
7454 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
7455 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
7456 if (le16_to_cpu(nv->login_timeout) < 4)
7457 nv->login_timeout = cpu_to_le16(4);
7458 ha->login_timeout = le16_to_cpu(nv->login_timeout);
7459
7460 /* Set minimum RATOV to 100 tenths of a second. */
7461 ha->r_a_tov = 100;
7462
7463 ha->loop_reset_delay = nv->reset_delay;
7464
7465 /* Link Down Timeout = 0:
7466 *
7467 * When Port Down timer expires we will start returning
7468 * I/O's to OS with "DID_NO_CONNECT".
7469 *
7470 * Link Down Timeout != 0:
7471 *
7472 * The driver waits for the link to come up after link down
7473 * before returning I/Os to OS with "DID_NO_CONNECT".
7474 */
7475 if (le16_to_cpu(nv->link_down_timeout) == 0) {
7476 ha->loop_down_abort_time =
7477 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
7478 } else {
7479 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
7480 ha->loop_down_abort_time =
7481 (LOOP_DOWN_TIME - ha->link_down_timeout);
7482 }
7483
7484 /* Need enough time to try and get the port back. */
7485 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
7486 if (qlport_down_retry)
7487 ha->port_down_retry_count = qlport_down_retry;
7488
7489 /* Set login_retry_count */
7490 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
7491 if (ha->port_down_retry_count ==
7492 le16_to_cpu(nv->port_down_retry_count) &&
7493 ha->port_down_retry_count > 3)
7494 ha->login_retry_count = ha->port_down_retry_count;
7495 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
7496 ha->login_retry_count = ha->port_down_retry_count;
7497 if (ql2xloginretrycount)
7498 ha->login_retry_count = ql2xloginretrycount;
7499
7500 /* N2N: driver will initiate Login instead of FW */
7501 icb->firmware_options_3 |= cpu_to_le32(BIT_8);
7502
7503 /* Enable ZIO. */
7504 if (!vha->flags.init_done) {
7505 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
7506 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
7507 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
7508 le16_to_cpu(icb->interrupt_delay_timer) : 2;
7509 }
7510 icb->firmware_options_2 &= cpu_to_le32(
7511 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
7512 if (ha->zio_mode != QLA_ZIO_DISABLED) {
7513 ha->zio_mode = QLA_ZIO_MODE_6;
7514
7515 ql_log(ql_log_info, vha, 0x006f,
7516 "ZIO mode %d enabled; timer delay (%d us).\n",
7517 ha->zio_mode, ha->zio_timer * 100);
7518
7519 icb->firmware_options_2 |= cpu_to_le32(
7520 (uint32_t)ha->zio_mode);
7521 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
7522 }
7523
7524 if (rval) {
7525 ql_log(ql_log_warn, vha, 0x0070,
7526 "NVRAM configuration failed.\n");
7527 }
7528 return (rval);
7529 }
7530
7531 static void
qla27xx_print_image(struct scsi_qla_host * vha,char * name,struct qla27xx_image_status * image_status)7532 qla27xx_print_image(struct scsi_qla_host *vha, char *name,
7533 struct qla27xx_image_status *image_status)
7534 {
7535 ql_dbg(ql_dbg_init, vha, 0x018b,
7536 "%s %s: mask=%#02x gen=%#04x ver=%u.%u map=%#01x sum=%#08x sig=%#08x\n",
7537 name, "status",
7538 image_status->image_status_mask,
7539 le16_to_cpu(image_status->generation),
7540 image_status->ver_major,
7541 image_status->ver_minor,
7542 image_status->bitmap,
7543 le32_to_cpu(image_status->checksum),
7544 le32_to_cpu(image_status->signature));
7545 }
7546
7547 static bool
qla28xx_check_aux_image_status_signature(struct qla27xx_image_status * image_status)7548 qla28xx_check_aux_image_status_signature(
7549 struct qla27xx_image_status *image_status)
7550 {
7551 ulong signature = le32_to_cpu(image_status->signature);
7552
7553 return signature != QLA28XX_AUX_IMG_STATUS_SIGN;
7554 }
7555
7556 static bool
qla27xx_check_image_status_signature(struct qla27xx_image_status * image_status)7557 qla27xx_check_image_status_signature(struct qla27xx_image_status *image_status)
7558 {
7559 ulong signature = le32_to_cpu(image_status->signature);
7560
7561 return
7562 signature != QLA27XX_IMG_STATUS_SIGN &&
7563 signature != QLA28XX_IMG_STATUS_SIGN;
7564 }
7565
7566 static ulong
qla27xx_image_status_checksum(struct qla27xx_image_status * image_status)7567 qla27xx_image_status_checksum(struct qla27xx_image_status *image_status)
7568 {
7569 __le32 *p = (__force __le32 *)image_status;
7570 uint n = sizeof(*image_status) / sizeof(*p);
7571 uint32_t sum = 0;
7572
7573 for ( ; n--; p++)
7574 sum += le32_to_cpup(p);
7575
7576 return sum;
7577 }
7578
7579 static inline uint
qla28xx_component_bitmask(struct qla27xx_image_status * aux,uint bitmask)7580 qla28xx_component_bitmask(struct qla27xx_image_status *aux, uint bitmask)
7581 {
7582 return aux->bitmap & bitmask ?
7583 QLA27XX_SECONDARY_IMAGE : QLA27XX_PRIMARY_IMAGE;
7584 }
7585
7586 static void
qla28xx_component_status(struct active_regions * active_regions,struct qla27xx_image_status * aux)7587 qla28xx_component_status(
7588 struct active_regions *active_regions, struct qla27xx_image_status *aux)
7589 {
7590 active_regions->aux.board_config =
7591 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_BOARD_CONFIG);
7592
7593 active_regions->aux.vpd_nvram =
7594 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_VPD_NVRAM);
7595
7596 active_regions->aux.npiv_config_0_1 =
7597 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_0_1);
7598
7599 active_regions->aux.npiv_config_2_3 =
7600 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_2_3);
7601 }
7602
7603 static int
qla27xx_compare_image_generation(struct qla27xx_image_status * pri_image_status,struct qla27xx_image_status * sec_image_status)7604 qla27xx_compare_image_generation(
7605 struct qla27xx_image_status *pri_image_status,
7606 struct qla27xx_image_status *sec_image_status)
7607 {
7608 /* calculate generation delta as uint16 (this accounts for wrap) */
7609 int16_t delta =
7610 le16_to_cpu(pri_image_status->generation) -
7611 le16_to_cpu(sec_image_status->generation);
7612
7613 ql_dbg(ql_dbg_init, NULL, 0x0180, "generation delta = %d\n", delta);
7614
7615 return delta;
7616 }
7617
7618 void
qla28xx_get_aux_images(struct scsi_qla_host * vha,struct active_regions * active_regions)7619 qla28xx_get_aux_images(
7620 struct scsi_qla_host *vha, struct active_regions *active_regions)
7621 {
7622 struct qla_hw_data *ha = vha->hw;
7623 struct qla27xx_image_status pri_aux_image_status, sec_aux_image_status;
7624 bool valid_pri_image = false, valid_sec_image = false;
7625 bool active_pri_image = false, active_sec_image = false;
7626
7627 if (!ha->flt_region_aux_img_status_pri) {
7628 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary aux image not addressed\n");
7629 goto check_sec_image;
7630 }
7631
7632 qla24xx_read_flash_data(vha, (uint32_t *)&pri_aux_image_status,
7633 ha->flt_region_aux_img_status_pri,
7634 sizeof(pri_aux_image_status) >> 2);
7635 qla27xx_print_image(vha, "Primary aux image", &pri_aux_image_status);
7636
7637 if (qla28xx_check_aux_image_status_signature(&pri_aux_image_status)) {
7638 ql_dbg(ql_dbg_init, vha, 0x018b,
7639 "Primary aux image signature (%#x) not valid\n",
7640 le32_to_cpu(pri_aux_image_status.signature));
7641 goto check_sec_image;
7642 }
7643
7644 if (qla27xx_image_status_checksum(&pri_aux_image_status)) {
7645 ql_dbg(ql_dbg_init, vha, 0x018c,
7646 "Primary aux image checksum failed\n");
7647 goto check_sec_image;
7648 }
7649
7650 valid_pri_image = true;
7651
7652 if (pri_aux_image_status.image_status_mask & 1) {
7653 ql_dbg(ql_dbg_init, vha, 0x018d,
7654 "Primary aux image is active\n");
7655 active_pri_image = true;
7656 }
7657
7658 check_sec_image:
7659 if (!ha->flt_region_aux_img_status_sec) {
7660 ql_dbg(ql_dbg_init, vha, 0x018a,
7661 "Secondary aux image not addressed\n");
7662 goto check_valid_image;
7663 }
7664
7665 qla24xx_read_flash_data(vha, (uint32_t *)&sec_aux_image_status,
7666 ha->flt_region_aux_img_status_sec,
7667 sizeof(sec_aux_image_status) >> 2);
7668 qla27xx_print_image(vha, "Secondary aux image", &sec_aux_image_status);
7669
7670 if (qla28xx_check_aux_image_status_signature(&sec_aux_image_status)) {
7671 ql_dbg(ql_dbg_init, vha, 0x018b,
7672 "Secondary aux image signature (%#x) not valid\n",
7673 le32_to_cpu(sec_aux_image_status.signature));
7674 goto check_valid_image;
7675 }
7676
7677 if (qla27xx_image_status_checksum(&sec_aux_image_status)) {
7678 ql_dbg(ql_dbg_init, vha, 0x018c,
7679 "Secondary aux image checksum failed\n");
7680 goto check_valid_image;
7681 }
7682
7683 valid_sec_image = true;
7684
7685 if (sec_aux_image_status.image_status_mask & 1) {
7686 ql_dbg(ql_dbg_init, vha, 0x018d,
7687 "Secondary aux image is active\n");
7688 active_sec_image = true;
7689 }
7690
7691 check_valid_image:
7692 if (valid_pri_image && active_pri_image &&
7693 valid_sec_image && active_sec_image) {
7694 if (qla27xx_compare_image_generation(&pri_aux_image_status,
7695 &sec_aux_image_status) >= 0) {
7696 qla28xx_component_status(active_regions,
7697 &pri_aux_image_status);
7698 } else {
7699 qla28xx_component_status(active_regions,
7700 &sec_aux_image_status);
7701 }
7702 } else if (valid_pri_image && active_pri_image) {
7703 qla28xx_component_status(active_regions, &pri_aux_image_status);
7704 } else if (valid_sec_image && active_sec_image) {
7705 qla28xx_component_status(active_regions, &sec_aux_image_status);
7706 }
7707
7708 ql_dbg(ql_dbg_init, vha, 0x018f,
7709 "aux images active: BCFG=%u VPD/NVR=%u NPIV0/1=%u NPIV2/3=%u\n",
7710 active_regions->aux.board_config,
7711 active_regions->aux.vpd_nvram,
7712 active_regions->aux.npiv_config_0_1,
7713 active_regions->aux.npiv_config_2_3);
7714 }
7715
7716 void
qla27xx_get_active_image(struct scsi_qla_host * vha,struct active_regions * active_regions)7717 qla27xx_get_active_image(struct scsi_qla_host *vha,
7718 struct active_regions *active_regions)
7719 {
7720 struct qla_hw_data *ha = vha->hw;
7721 struct qla27xx_image_status pri_image_status, sec_image_status;
7722 bool valid_pri_image = false, valid_sec_image = false;
7723 bool active_pri_image = false, active_sec_image = false;
7724
7725 if (!ha->flt_region_img_status_pri) {
7726 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary image not addressed\n");
7727 goto check_sec_image;
7728 }
7729
7730 if (qla24xx_read_flash_data(vha, (uint32_t *)&pri_image_status,
7731 ha->flt_region_img_status_pri, sizeof(pri_image_status) >> 2) !=
7732 QLA_SUCCESS) {
7733 WARN_ON_ONCE(true);
7734 goto check_sec_image;
7735 }
7736 qla27xx_print_image(vha, "Primary image", &pri_image_status);
7737
7738 if (qla27xx_check_image_status_signature(&pri_image_status)) {
7739 ql_dbg(ql_dbg_init, vha, 0x018b,
7740 "Primary image signature (%#x) not valid\n",
7741 le32_to_cpu(pri_image_status.signature));
7742 goto check_sec_image;
7743 }
7744
7745 if (qla27xx_image_status_checksum(&pri_image_status)) {
7746 ql_dbg(ql_dbg_init, vha, 0x018c,
7747 "Primary image checksum failed\n");
7748 goto check_sec_image;
7749 }
7750
7751 valid_pri_image = true;
7752
7753 if (pri_image_status.image_status_mask & 1) {
7754 ql_dbg(ql_dbg_init, vha, 0x018d,
7755 "Primary image is active\n");
7756 active_pri_image = true;
7757 }
7758
7759 check_sec_image:
7760 if (!ha->flt_region_img_status_sec) {
7761 ql_dbg(ql_dbg_init, vha, 0x018a, "Secondary image not addressed\n");
7762 goto check_valid_image;
7763 }
7764
7765 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status),
7766 ha->flt_region_img_status_sec, sizeof(sec_image_status) >> 2);
7767 qla27xx_print_image(vha, "Secondary image", &sec_image_status);
7768
7769 if (qla27xx_check_image_status_signature(&sec_image_status)) {
7770 ql_dbg(ql_dbg_init, vha, 0x018b,
7771 "Secondary image signature (%#x) not valid\n",
7772 le32_to_cpu(sec_image_status.signature));
7773 goto check_valid_image;
7774 }
7775
7776 if (qla27xx_image_status_checksum(&sec_image_status)) {
7777 ql_dbg(ql_dbg_init, vha, 0x018c,
7778 "Secondary image checksum failed\n");
7779 goto check_valid_image;
7780 }
7781
7782 valid_sec_image = true;
7783
7784 if (sec_image_status.image_status_mask & 1) {
7785 ql_dbg(ql_dbg_init, vha, 0x018d,
7786 "Secondary image is active\n");
7787 active_sec_image = true;
7788 }
7789
7790 check_valid_image:
7791 if (valid_pri_image && active_pri_image)
7792 active_regions->global = QLA27XX_PRIMARY_IMAGE;
7793
7794 if (valid_sec_image && active_sec_image) {
7795 if (!active_regions->global ||
7796 qla27xx_compare_image_generation(
7797 &pri_image_status, &sec_image_status) < 0) {
7798 active_regions->global = QLA27XX_SECONDARY_IMAGE;
7799 }
7800 }
7801
7802 ql_dbg(ql_dbg_init, vha, 0x018f, "active image %s (%u)\n",
7803 active_regions->global == QLA27XX_DEFAULT_IMAGE ?
7804 "default (boot/fw)" :
7805 active_regions->global == QLA27XX_PRIMARY_IMAGE ?
7806 "primary" :
7807 active_regions->global == QLA27XX_SECONDARY_IMAGE ?
7808 "secondary" : "invalid",
7809 active_regions->global);
7810 }
7811
qla24xx_risc_firmware_invalid(uint32_t * dword)7812 bool qla24xx_risc_firmware_invalid(uint32_t *dword)
7813 {
7814 return
7815 !(dword[4] | dword[5] | dword[6] | dword[7]) ||
7816 !(~dword[4] | ~dword[5] | ~dword[6] | ~dword[7]);
7817 }
7818
7819 static int
qla24xx_load_risc_flash(scsi_qla_host_t * vha,uint32_t * srisc_addr,uint32_t faddr)7820 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
7821 uint32_t faddr)
7822 {
7823 int rval;
7824 uint templates, segments, fragment;
7825 ulong i;
7826 uint j;
7827 ulong dlen;
7828 uint32_t *dcode;
7829 uint32_t risc_addr, risc_size, risc_attr = 0;
7830 struct qla_hw_data *ha = vha->hw;
7831 struct req_que *req = ha->req_q_map[0];
7832 struct fwdt *fwdt = ha->fwdt;
7833
7834 ql_dbg(ql_dbg_init, vha, 0x008b,
7835 "FW: Loading firmware from flash (%x).\n", faddr);
7836
7837 dcode = (uint32_t *)req->ring;
7838 qla24xx_read_flash_data(vha, dcode, faddr, 8);
7839 if (qla24xx_risc_firmware_invalid(dcode)) {
7840 ql_log(ql_log_fatal, vha, 0x008c,
7841 "Unable to verify the integrity of flash firmware "
7842 "image.\n");
7843 ql_log(ql_log_fatal, vha, 0x008d,
7844 "Firmware data: %08x %08x %08x %08x.\n",
7845 dcode[0], dcode[1], dcode[2], dcode[3]);
7846
7847 return QLA_FUNCTION_FAILED;
7848 }
7849
7850 dcode = (uint32_t *)req->ring;
7851 *srisc_addr = 0;
7852 segments = FA_RISC_CODE_SEGMENTS;
7853 for (j = 0; j < segments; j++) {
7854 ql_dbg(ql_dbg_init, vha, 0x008d,
7855 "-> Loading segment %u...\n", j);
7856 qla24xx_read_flash_data(vha, dcode, faddr, 10);
7857 risc_addr = be32_to_cpu((__force __be32)dcode[2]);
7858 risc_size = be32_to_cpu((__force __be32)dcode[3]);
7859 if (!*srisc_addr) {
7860 *srisc_addr = risc_addr;
7861 risc_attr = be32_to_cpu((__force __be32)dcode[9]);
7862 }
7863
7864 dlen = ha->fw_transfer_size >> 2;
7865 for (fragment = 0; risc_size; fragment++) {
7866 if (dlen > risc_size)
7867 dlen = risc_size;
7868
7869 ql_dbg(ql_dbg_init, vha, 0x008e,
7870 "-> Loading fragment %u: %#x <- %#x (%#lx dwords)...\n",
7871 fragment, risc_addr, faddr, dlen);
7872 qla24xx_read_flash_data(vha, dcode, faddr, dlen);
7873 for (i = 0; i < dlen; i++)
7874 dcode[i] = swab32(dcode[i]);
7875
7876 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen);
7877 if (rval) {
7878 ql_log(ql_log_fatal, vha, 0x008f,
7879 "-> Failed load firmware fragment %u.\n",
7880 fragment);
7881 return QLA_FUNCTION_FAILED;
7882 }
7883
7884 faddr += dlen;
7885 risc_addr += dlen;
7886 risc_size -= dlen;
7887 }
7888 }
7889
7890 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
7891 return QLA_SUCCESS;
7892
7893 templates = (risc_attr & BIT_9) ? 2 : 1;
7894 ql_dbg(ql_dbg_init, vha, 0x0160, "-> templates = %u\n", templates);
7895 for (j = 0; j < templates; j++, fwdt++) {
7896 if (fwdt->template)
7897 vfree(fwdt->template);
7898 fwdt->template = NULL;
7899 fwdt->length = 0;
7900
7901 dcode = (uint32_t *)req->ring;
7902 qla24xx_read_flash_data(vha, dcode, faddr, 7);
7903 risc_size = be32_to_cpu((__force __be32)dcode[2]);
7904 ql_dbg(ql_dbg_init, vha, 0x0161,
7905 "-> fwdt%u template array at %#x (%#x dwords)\n",
7906 j, faddr, risc_size);
7907 if (!risc_size || !~risc_size) {
7908 ql_dbg(ql_dbg_init, vha, 0x0162,
7909 "-> fwdt%u failed to read array\n", j);
7910 goto failed;
7911 }
7912
7913 /* skip header and ignore checksum */
7914 faddr += 7;
7915 risc_size -= 8;
7916
7917 ql_dbg(ql_dbg_init, vha, 0x0163,
7918 "-> fwdt%u template allocate template %#x words...\n",
7919 j, risc_size);
7920 fwdt->template = vmalloc(risc_size * sizeof(*dcode));
7921 if (!fwdt->template) {
7922 ql_log(ql_log_warn, vha, 0x0164,
7923 "-> fwdt%u failed allocate template.\n", j);
7924 goto failed;
7925 }
7926
7927 dcode = fwdt->template;
7928 qla24xx_read_flash_data(vha, dcode, faddr, risc_size);
7929
7930 if (!qla27xx_fwdt_template_valid(dcode)) {
7931 ql_log(ql_log_warn, vha, 0x0165,
7932 "-> fwdt%u failed template validate\n", j);
7933 goto failed;
7934 }
7935
7936 dlen = qla27xx_fwdt_template_size(dcode);
7937 ql_dbg(ql_dbg_init, vha, 0x0166,
7938 "-> fwdt%u template size %#lx bytes (%#lx words)\n",
7939 j, dlen, dlen / sizeof(*dcode));
7940 if (dlen > risc_size * sizeof(*dcode)) {
7941 ql_log(ql_log_warn, vha, 0x0167,
7942 "-> fwdt%u template exceeds array (%-lu bytes)\n",
7943 j, dlen - risc_size * sizeof(*dcode));
7944 goto failed;
7945 }
7946
7947 fwdt->length = dlen;
7948 ql_dbg(ql_dbg_init, vha, 0x0168,
7949 "-> fwdt%u loaded template ok\n", j);
7950
7951 faddr += risc_size + 1;
7952 }
7953
7954 return QLA_SUCCESS;
7955
7956 failed:
7957 if (fwdt->template)
7958 vfree(fwdt->template);
7959 fwdt->template = NULL;
7960 fwdt->length = 0;
7961
7962 return QLA_SUCCESS;
7963 }
7964
7965 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/"
7966
7967 int
qla2x00_load_risc(scsi_qla_host_t * vha,uint32_t * srisc_addr)7968 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7969 {
7970 int rval;
7971 int i, fragment;
7972 uint16_t *wcode;
7973 __be16 *fwcode;
7974 uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
7975 struct fw_blob *blob;
7976 struct qla_hw_data *ha = vha->hw;
7977 struct req_que *req = ha->req_q_map[0];
7978
7979 /* Load firmware blob. */
7980 blob = qla2x00_request_firmware(vha);
7981 if (!blob) {
7982 ql_log(ql_log_info, vha, 0x0083,
7983 "Firmware image unavailable.\n");
7984 ql_log(ql_log_info, vha, 0x0084,
7985 "Firmware images can be retrieved from: "QLA_FW_URL ".\n");
7986 return QLA_FUNCTION_FAILED;
7987 }
7988
7989 rval = QLA_SUCCESS;
7990
7991 wcode = (uint16_t *)req->ring;
7992 *srisc_addr = 0;
7993 fwcode = (__force __be16 *)blob->fw->data;
7994 fwclen = 0;
7995
7996 /* Validate firmware image by checking version. */
7997 if (blob->fw->size < 8 * sizeof(uint16_t)) {
7998 ql_log(ql_log_fatal, vha, 0x0085,
7999 "Unable to verify integrity of firmware image (%zd).\n",
8000 blob->fw->size);
8001 goto fail_fw_integrity;
8002 }
8003 for (i = 0; i < 4; i++)
8004 wcode[i] = be16_to_cpu(fwcode[i + 4]);
8005 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
8006 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
8007 wcode[2] == 0 && wcode[3] == 0)) {
8008 ql_log(ql_log_fatal, vha, 0x0086,
8009 "Unable to verify integrity of firmware image.\n");
8010 ql_log(ql_log_fatal, vha, 0x0087,
8011 "Firmware data: %04x %04x %04x %04x.\n",
8012 wcode[0], wcode[1], wcode[2], wcode[3]);
8013 goto fail_fw_integrity;
8014 }
8015
8016 seg = blob->segs;
8017 while (*seg && rval == QLA_SUCCESS) {
8018 risc_addr = *seg;
8019 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
8020 risc_size = be16_to_cpu(fwcode[3]);
8021
8022 /* Validate firmware image size. */
8023 fwclen += risc_size * sizeof(uint16_t);
8024 if (blob->fw->size < fwclen) {
8025 ql_log(ql_log_fatal, vha, 0x0088,
8026 "Unable to verify integrity of firmware image "
8027 "(%zd).\n", blob->fw->size);
8028 goto fail_fw_integrity;
8029 }
8030
8031 fragment = 0;
8032 while (risc_size > 0 && rval == QLA_SUCCESS) {
8033 wlen = (uint16_t)(ha->fw_transfer_size >> 1);
8034 if (wlen > risc_size)
8035 wlen = risc_size;
8036 ql_dbg(ql_dbg_init, vha, 0x0089,
8037 "Loading risc segment@ risc addr %x number of "
8038 "words 0x%x.\n", risc_addr, wlen);
8039
8040 for (i = 0; i < wlen; i++)
8041 wcode[i] = swab16((__force u32)fwcode[i]);
8042
8043 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
8044 wlen);
8045 if (rval) {
8046 ql_log(ql_log_fatal, vha, 0x008a,
8047 "Failed to load segment %d of firmware.\n",
8048 fragment);
8049 break;
8050 }
8051
8052 fwcode += wlen;
8053 risc_addr += wlen;
8054 risc_size -= wlen;
8055 fragment++;
8056 }
8057
8058 /* Next segment. */
8059 seg++;
8060 }
8061 return rval;
8062
8063 fail_fw_integrity:
8064 return QLA_FUNCTION_FAILED;
8065 }
8066
8067 static int
qla24xx_load_risc_blob(scsi_qla_host_t * vha,uint32_t * srisc_addr)8068 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8069 {
8070 int rval;
8071 uint templates, segments, fragment;
8072 uint32_t *dcode;
8073 ulong dlen;
8074 uint32_t risc_addr, risc_size, risc_attr = 0;
8075 ulong i;
8076 uint j;
8077 struct fw_blob *blob;
8078 __be32 *fwcode;
8079 struct qla_hw_data *ha = vha->hw;
8080 struct req_que *req = ha->req_q_map[0];
8081 struct fwdt *fwdt = ha->fwdt;
8082
8083 ql_dbg(ql_dbg_init, vha, 0x0090,
8084 "-> FW: Loading via request-firmware.\n");
8085
8086 blob = qla2x00_request_firmware(vha);
8087 if (!blob) {
8088 ql_log(ql_log_warn, vha, 0x0092,
8089 "-> Firmware file not found.\n");
8090
8091 return QLA_FUNCTION_FAILED;
8092 }
8093
8094 fwcode = (__force __be32 *)blob->fw->data;
8095 dcode = (__force uint32_t *)fwcode;
8096 if (qla24xx_risc_firmware_invalid(dcode)) {
8097 ql_log(ql_log_fatal, vha, 0x0093,
8098 "Unable to verify integrity of firmware image (%zd).\n",
8099 blob->fw->size);
8100 ql_log(ql_log_fatal, vha, 0x0095,
8101 "Firmware data: %08x %08x %08x %08x.\n",
8102 dcode[0], dcode[1], dcode[2], dcode[3]);
8103 return QLA_FUNCTION_FAILED;
8104 }
8105
8106 dcode = (uint32_t *)req->ring;
8107 *srisc_addr = 0;
8108 segments = FA_RISC_CODE_SEGMENTS;
8109 for (j = 0; j < segments; j++) {
8110 ql_dbg(ql_dbg_init, vha, 0x0096,
8111 "-> Loading segment %u...\n", j);
8112 risc_addr = be32_to_cpu(fwcode[2]);
8113 risc_size = be32_to_cpu(fwcode[3]);
8114
8115 if (!*srisc_addr) {
8116 *srisc_addr = risc_addr;
8117 risc_attr = be32_to_cpu(fwcode[9]);
8118 }
8119
8120 dlen = ha->fw_transfer_size >> 2;
8121 for (fragment = 0; risc_size; fragment++) {
8122 if (dlen > risc_size)
8123 dlen = risc_size;
8124
8125 ql_dbg(ql_dbg_init, vha, 0x0097,
8126 "-> Loading fragment %u: %#x <- %#x (%#lx words)...\n",
8127 fragment, risc_addr,
8128 (uint32_t)(fwcode - (typeof(fwcode))blob->fw->data),
8129 dlen);
8130
8131 for (i = 0; i < dlen; i++)
8132 dcode[i] = swab32((__force u32)fwcode[i]);
8133
8134 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen);
8135 if (rval) {
8136 ql_log(ql_log_fatal, vha, 0x0098,
8137 "-> Failed load firmware fragment %u.\n",
8138 fragment);
8139 return QLA_FUNCTION_FAILED;
8140 }
8141
8142 fwcode += dlen;
8143 risc_addr += dlen;
8144 risc_size -= dlen;
8145 }
8146 }
8147
8148 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
8149 return QLA_SUCCESS;
8150
8151 templates = (risc_attr & BIT_9) ? 2 : 1;
8152 ql_dbg(ql_dbg_init, vha, 0x0170, "-> templates = %u\n", templates);
8153 for (j = 0; j < templates; j++, fwdt++) {
8154 if (fwdt->template)
8155 vfree(fwdt->template);
8156 fwdt->template = NULL;
8157 fwdt->length = 0;
8158
8159 risc_size = be32_to_cpu(fwcode[2]);
8160 ql_dbg(ql_dbg_init, vha, 0x0171,
8161 "-> fwdt%u template array at %#x (%#x dwords)\n",
8162 j, (uint32_t)((void *)fwcode - (void *)blob->fw->data),
8163 risc_size);
8164 if (!risc_size || !~risc_size) {
8165 ql_dbg(ql_dbg_init, vha, 0x0172,
8166 "-> fwdt%u failed to read array\n", j);
8167 goto failed;
8168 }
8169
8170 /* skip header and ignore checksum */
8171 fwcode += 7;
8172 risc_size -= 8;
8173
8174 ql_dbg(ql_dbg_init, vha, 0x0173,
8175 "-> fwdt%u template allocate template %#x words...\n",
8176 j, risc_size);
8177 fwdt->template = vmalloc(risc_size * sizeof(*dcode));
8178 if (!fwdt->template) {
8179 ql_log(ql_log_warn, vha, 0x0174,
8180 "-> fwdt%u failed allocate template.\n", j);
8181 goto failed;
8182 }
8183
8184 dcode = fwdt->template;
8185 for (i = 0; i < risc_size; i++)
8186 dcode[i] = (__force u32)fwcode[i];
8187
8188 if (!qla27xx_fwdt_template_valid(dcode)) {
8189 ql_log(ql_log_warn, vha, 0x0175,
8190 "-> fwdt%u failed template validate\n", j);
8191 goto failed;
8192 }
8193
8194 dlen = qla27xx_fwdt_template_size(dcode);
8195 ql_dbg(ql_dbg_init, vha, 0x0176,
8196 "-> fwdt%u template size %#lx bytes (%#lx words)\n",
8197 j, dlen, dlen / sizeof(*dcode));
8198 if (dlen > risc_size * sizeof(*dcode)) {
8199 ql_log(ql_log_warn, vha, 0x0177,
8200 "-> fwdt%u template exceeds array (%-lu bytes)\n",
8201 j, dlen - risc_size * sizeof(*dcode));
8202 goto failed;
8203 }
8204
8205 fwdt->length = dlen;
8206 ql_dbg(ql_dbg_init, vha, 0x0178,
8207 "-> fwdt%u loaded template ok\n", j);
8208
8209 fwcode += risc_size + 1;
8210 }
8211
8212 return QLA_SUCCESS;
8213
8214 failed:
8215 if (fwdt->template)
8216 vfree(fwdt->template);
8217 fwdt->template = NULL;
8218 fwdt->length = 0;
8219
8220 return QLA_SUCCESS;
8221 }
8222
8223 int
qla24xx_load_risc(scsi_qla_host_t * vha,uint32_t * srisc_addr)8224 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8225 {
8226 int rval;
8227
8228 if (ql2xfwloadbin == 1)
8229 return qla81xx_load_risc(vha, srisc_addr);
8230
8231 /*
8232 * FW Load priority:
8233 * 1) Firmware via request-firmware interface (.bin file).
8234 * 2) Firmware residing in flash.
8235 */
8236 rval = qla24xx_load_risc_blob(vha, srisc_addr);
8237 if (rval == QLA_SUCCESS)
8238 return rval;
8239
8240 return qla24xx_load_risc_flash(vha, srisc_addr,
8241 vha->hw->flt_region_fw);
8242 }
8243
8244 int
qla81xx_load_risc(scsi_qla_host_t * vha,uint32_t * srisc_addr)8245 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8246 {
8247 int rval;
8248 struct qla_hw_data *ha = vha->hw;
8249 struct active_regions active_regions = { };
8250
8251 if (ql2xfwloadbin == 2)
8252 goto try_blob_fw;
8253
8254 /* FW Load priority:
8255 * 1) Firmware residing in flash.
8256 * 2) Firmware via request-firmware interface (.bin file).
8257 * 3) Golden-Firmware residing in flash -- (limited operation).
8258 */
8259
8260 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
8261 goto try_primary_fw;
8262
8263 qla27xx_get_active_image(vha, &active_regions);
8264
8265 if (active_regions.global != QLA27XX_SECONDARY_IMAGE)
8266 goto try_primary_fw;
8267
8268 ql_dbg(ql_dbg_init, vha, 0x008b,
8269 "Loading secondary firmware image.\n");
8270 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw_sec);
8271 if (!rval)
8272 return rval;
8273
8274 try_primary_fw:
8275 ql_dbg(ql_dbg_init, vha, 0x008b,
8276 "Loading primary firmware image.\n");
8277 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
8278 if (!rval)
8279 return rval;
8280
8281 try_blob_fw:
8282 rval = qla24xx_load_risc_blob(vha, srisc_addr);
8283 if (!rval || !ha->flt_region_gold_fw)
8284 return rval;
8285
8286 ql_log(ql_log_info, vha, 0x0099,
8287 "Attempting to fallback to golden firmware.\n");
8288 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
8289 if (rval)
8290 return rval;
8291
8292 ql_log(ql_log_info, vha, 0x009a, "Need firmware flash update.\n");
8293 ha->flags.running_gold_fw = 1;
8294 return rval;
8295 }
8296
8297 void
qla2x00_try_to_stop_firmware(scsi_qla_host_t * vha)8298 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
8299 {
8300 int ret, retries;
8301 struct qla_hw_data *ha = vha->hw;
8302
8303 if (ha->flags.pci_channel_io_perm_failure)
8304 return;
8305 if (!IS_FWI2_CAPABLE(ha))
8306 return;
8307 if (!ha->fw_major_version)
8308 return;
8309 if (!ha->flags.fw_started)
8310 return;
8311
8312 ret = qla2x00_stop_firmware(vha);
8313 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
8314 ret != QLA_INVALID_COMMAND && retries ; retries--) {
8315 ha->isp_ops->reset_chip(vha);
8316 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
8317 continue;
8318 if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
8319 continue;
8320 ql_log(ql_log_info, vha, 0x8015,
8321 "Attempting retry of stop-firmware command.\n");
8322 ret = qla2x00_stop_firmware(vha);
8323 }
8324
8325 QLA_FW_STOPPED(ha);
8326 ha->flags.fw_init_done = 0;
8327 }
8328
8329 int
qla24xx_configure_vhba(scsi_qla_host_t * vha)8330 qla24xx_configure_vhba(scsi_qla_host_t *vha)
8331 {
8332 int rval = QLA_SUCCESS;
8333 int rval2;
8334 uint16_t mb[MAILBOX_REGISTER_COUNT];
8335 struct qla_hw_data *ha = vha->hw;
8336 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
8337
8338 if (!vha->vp_idx)
8339 return -EINVAL;
8340
8341 rval = qla2x00_fw_ready(base_vha);
8342
8343 if (rval == QLA_SUCCESS) {
8344 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8345 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
8346 }
8347
8348 vha->flags.management_server_logged_in = 0;
8349
8350 /* Login to SNS first */
8351 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb,
8352 BIT_1);
8353 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
8354 if (rval2 == QLA_MEMORY_ALLOC_FAILED)
8355 ql_dbg(ql_dbg_init, vha, 0x0120,
8356 "Failed SNS login: loop_id=%x, rval2=%d\n",
8357 NPH_SNS, rval2);
8358 else
8359 ql_dbg(ql_dbg_init, vha, 0x0103,
8360 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
8361 "mb[2]=%x mb[6]=%x mb[7]=%x.\n",
8362 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
8363 return (QLA_FUNCTION_FAILED);
8364 }
8365
8366 atomic_set(&vha->loop_down_timer, 0);
8367 atomic_set(&vha->loop_state, LOOP_UP);
8368 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
8369 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
8370 rval = qla2x00_loop_resync(base_vha);
8371
8372 return rval;
8373 }
8374
8375 /* 84XX Support **************************************************************/
8376
8377 static LIST_HEAD(qla_cs84xx_list);
8378 static DEFINE_MUTEX(qla_cs84xx_mutex);
8379
8380 static struct qla_chip_state_84xx *
qla84xx_get_chip(struct scsi_qla_host * vha)8381 qla84xx_get_chip(struct scsi_qla_host *vha)
8382 {
8383 struct qla_chip_state_84xx *cs84xx;
8384 struct qla_hw_data *ha = vha->hw;
8385
8386 mutex_lock(&qla_cs84xx_mutex);
8387
8388 /* Find any shared 84xx chip. */
8389 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
8390 if (cs84xx->bus == ha->pdev->bus) {
8391 kref_get(&cs84xx->kref);
8392 goto done;
8393 }
8394 }
8395
8396 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
8397 if (!cs84xx)
8398 goto done;
8399
8400 kref_init(&cs84xx->kref);
8401 spin_lock_init(&cs84xx->access_lock);
8402 mutex_init(&cs84xx->fw_update_mutex);
8403 cs84xx->bus = ha->pdev->bus;
8404
8405 list_add_tail(&cs84xx->list, &qla_cs84xx_list);
8406 done:
8407 mutex_unlock(&qla_cs84xx_mutex);
8408 return cs84xx;
8409 }
8410
8411 static void
__qla84xx_chip_release(struct kref * kref)8412 __qla84xx_chip_release(struct kref *kref)
8413 {
8414 struct qla_chip_state_84xx *cs84xx =
8415 container_of(kref, struct qla_chip_state_84xx, kref);
8416
8417 mutex_lock(&qla_cs84xx_mutex);
8418 list_del(&cs84xx->list);
8419 mutex_unlock(&qla_cs84xx_mutex);
8420 kfree(cs84xx);
8421 }
8422
8423 void
qla84xx_put_chip(struct scsi_qla_host * vha)8424 qla84xx_put_chip(struct scsi_qla_host *vha)
8425 {
8426 struct qla_hw_data *ha = vha->hw;
8427
8428 if (ha->cs84xx)
8429 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
8430 }
8431
8432 static int
qla84xx_init_chip(scsi_qla_host_t * vha)8433 qla84xx_init_chip(scsi_qla_host_t *vha)
8434 {
8435 int rval;
8436 uint16_t status[2];
8437 struct qla_hw_data *ha = vha->hw;
8438
8439 mutex_lock(&ha->cs84xx->fw_update_mutex);
8440
8441 rval = qla84xx_verify_chip(vha, status);
8442
8443 mutex_unlock(&ha->cs84xx->fw_update_mutex);
8444
8445 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED :
8446 QLA_SUCCESS;
8447 }
8448
8449 /* 81XX Support **************************************************************/
8450
8451 int
qla81xx_nvram_config(scsi_qla_host_t * vha)8452 qla81xx_nvram_config(scsi_qla_host_t *vha)
8453 {
8454 int rval;
8455 struct init_cb_81xx *icb;
8456 struct nvram_81xx *nv;
8457 __le32 *dptr;
8458 uint8_t *dptr1, *dptr2;
8459 uint32_t chksum;
8460 uint16_t cnt;
8461 struct qla_hw_data *ha = vha->hw;
8462 uint32_t faddr;
8463 struct active_regions active_regions = { };
8464
8465 rval = QLA_SUCCESS;
8466 icb = (struct init_cb_81xx *)ha->init_cb;
8467 nv = ha->nvram;
8468
8469 /* Determine NVRAM starting address. */
8470 ha->nvram_size = sizeof(*nv);
8471 ha->vpd_size = FA_NVRAM_VPD_SIZE;
8472 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha))
8473 ha->vpd_size = FA_VPD_SIZE_82XX;
8474
8475 if (IS_QLA28XX(ha) || IS_QLA27XX(ha))
8476 qla28xx_get_aux_images(vha, &active_regions);
8477
8478 /* Get VPD data into cache */
8479 ha->vpd = ha->nvram + VPD_OFFSET;
8480
8481 faddr = ha->flt_region_vpd;
8482 if (IS_QLA28XX(ha)) {
8483 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
8484 faddr = ha->flt_region_vpd_sec;
8485 ql_dbg(ql_dbg_init, vha, 0x0110,
8486 "Loading %s nvram image.\n",
8487 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ?
8488 "primary" : "secondary");
8489 }
8490 ha->isp_ops->read_optrom(vha, ha->vpd, faddr << 2, ha->vpd_size);
8491
8492 /* Get NVRAM data into cache and calculate checksum. */
8493 faddr = ha->flt_region_nvram;
8494 if (IS_QLA28XX(ha)) {
8495 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
8496 faddr = ha->flt_region_nvram_sec;
8497 }
8498 ql_dbg(ql_dbg_init, vha, 0x0110,
8499 "Loading %s nvram image.\n",
8500 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ?
8501 "primary" : "secondary");
8502 ha->isp_ops->read_optrom(vha, ha->nvram, faddr << 2, ha->nvram_size);
8503
8504 dptr = (__force __le32 *)nv;
8505 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
8506 chksum += le32_to_cpu(*dptr);
8507
8508 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
8509 "Contents of NVRAM:\n");
8510 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
8511 nv, ha->nvram_size);
8512
8513 /* Bad NVRAM data, set defaults parameters. */
8514 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
8515 le16_to_cpu(nv->nvram_version) < ICB_VERSION) {
8516 /* Reset NVRAM data. */
8517 ql_log(ql_log_info, vha, 0x0073,
8518 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n",
8519 chksum, nv->id, le16_to_cpu(nv->nvram_version));
8520 ql_dump_buffer(ql_dbg_init, vha, 0x0073, nv, sizeof(*nv));
8521 ql_log(ql_log_info, vha, 0x0074,
8522 "Falling back to functioning (yet invalid -- WWPN) "
8523 "defaults.\n");
8524
8525 /*
8526 * Set default initialization control block.
8527 */
8528 memset(nv, 0, ha->nvram_size);
8529 nv->nvram_version = cpu_to_le16(ICB_VERSION);
8530 nv->version = cpu_to_le16(ICB_VERSION);
8531 nv->frame_payload_size = cpu_to_le16(2048);
8532 nv->execution_throttle = cpu_to_le16(0xFFFF);
8533 nv->exchange_count = cpu_to_le16(0);
8534 nv->port_name[0] = 0x21;
8535 nv->port_name[1] = 0x00 + ha->port_no + 1;
8536 nv->port_name[2] = 0x00;
8537 nv->port_name[3] = 0xe0;
8538 nv->port_name[4] = 0x8b;
8539 nv->port_name[5] = 0x1c;
8540 nv->port_name[6] = 0x55;
8541 nv->port_name[7] = 0x86;
8542 nv->node_name[0] = 0x20;
8543 nv->node_name[1] = 0x00;
8544 nv->node_name[2] = 0x00;
8545 nv->node_name[3] = 0xe0;
8546 nv->node_name[4] = 0x8b;
8547 nv->node_name[5] = 0x1c;
8548 nv->node_name[6] = 0x55;
8549 nv->node_name[7] = 0x86;
8550 nv->login_retry_count = cpu_to_le16(8);
8551 nv->interrupt_delay_timer = cpu_to_le16(0);
8552 nv->login_timeout = cpu_to_le16(0);
8553 nv->firmware_options_1 =
8554 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
8555 nv->firmware_options_2 = cpu_to_le32(2 << 4);
8556 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
8557 nv->firmware_options_3 = cpu_to_le32(2 << 13);
8558 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
8559 nv->efi_parameters = cpu_to_le32(0);
8560 nv->reset_delay = 5;
8561 nv->max_luns_per_target = cpu_to_le16(128);
8562 nv->port_down_retry_count = cpu_to_le16(30);
8563 nv->link_down_timeout = cpu_to_le16(180);
8564 nv->enode_mac[0] = 0x00;
8565 nv->enode_mac[1] = 0xC0;
8566 nv->enode_mac[2] = 0xDD;
8567 nv->enode_mac[3] = 0x04;
8568 nv->enode_mac[4] = 0x05;
8569 nv->enode_mac[5] = 0x06 + ha->port_no + 1;
8570
8571 rval = 1;
8572 }
8573
8574 if (IS_T10_PI_CAPABLE(ha))
8575 nv->frame_payload_size &= cpu_to_le16(~7);
8576
8577 qlt_81xx_config_nvram_stage1(vha, nv);
8578
8579 /* Reset Initialization control block */
8580 memset(icb, 0, ha->init_cb_size);
8581
8582 /* Copy 1st segment. */
8583 dptr1 = (uint8_t *)icb;
8584 dptr2 = (uint8_t *)&nv->version;
8585 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
8586 while (cnt--)
8587 *dptr1++ = *dptr2++;
8588
8589 icb->login_retry_count = nv->login_retry_count;
8590
8591 /* Copy 2nd segment. */
8592 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
8593 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
8594 cnt = (uint8_t *)&icb->reserved_5 -
8595 (uint8_t *)&icb->interrupt_delay_timer;
8596 while (cnt--)
8597 *dptr1++ = *dptr2++;
8598
8599 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
8600 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
8601 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
8602 icb->enode_mac[0] = 0x00;
8603 icb->enode_mac[1] = 0xC0;
8604 icb->enode_mac[2] = 0xDD;
8605 icb->enode_mac[3] = 0x04;
8606 icb->enode_mac[4] = 0x05;
8607 icb->enode_mac[5] = 0x06 + ha->port_no + 1;
8608 }
8609
8610 /* Use extended-initialization control block. */
8611 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
8612 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
8613 /*
8614 * Setup driver NVRAM options.
8615 */
8616 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
8617 "QLE8XXX");
8618
8619 qlt_81xx_config_nvram_stage2(vha, icb);
8620
8621 /* Use alternate WWN? */
8622 if (nv->host_p & cpu_to_le32(BIT_15)) {
8623 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
8624 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
8625 }
8626
8627 /* Prepare nodename */
8628 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
8629 /*
8630 * Firmware will apply the following mask if the nodename was
8631 * not provided.
8632 */
8633 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
8634 icb->node_name[0] &= 0xF0;
8635 }
8636
8637 if (IS_QLA28XX(ha) || IS_QLA27XX(ha)) {
8638 if ((nv->enhanced_features & BIT_7) == 0)
8639 ha->flags.scm_supported_a = 1;
8640 }
8641
8642 /* Set host adapter parameters. */
8643 ha->flags.disable_risc_code_load = 0;
8644 ha->flags.enable_lip_reset = 0;
8645 ha->flags.enable_lip_full_login =
8646 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0;
8647 ha->flags.enable_target_reset =
8648 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0;
8649 ha->flags.enable_led_scheme = 0;
8650 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0;
8651
8652 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
8653 (BIT_6 | BIT_5 | BIT_4)) >> 4;
8654
8655 /* save HBA serial number */
8656 ha->serial0 = icb->port_name[5];
8657 ha->serial1 = icb->port_name[6];
8658 ha->serial2 = icb->port_name[7];
8659 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
8660 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
8661
8662 icb->execution_throttle = cpu_to_le16(0xFFFF);
8663
8664 ha->retry_count = le16_to_cpu(nv->login_retry_count);
8665
8666 /* Set minimum login_timeout to 4 seconds. */
8667 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
8668 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
8669 if (le16_to_cpu(nv->login_timeout) < 4)
8670 nv->login_timeout = cpu_to_le16(4);
8671 ha->login_timeout = le16_to_cpu(nv->login_timeout);
8672
8673 /* Set minimum RATOV to 100 tenths of a second. */
8674 ha->r_a_tov = 100;
8675
8676 ha->loop_reset_delay = nv->reset_delay;
8677
8678 /* Link Down Timeout = 0:
8679 *
8680 * When Port Down timer expires we will start returning
8681 * I/O's to OS with "DID_NO_CONNECT".
8682 *
8683 * Link Down Timeout != 0:
8684 *
8685 * The driver waits for the link to come up after link down
8686 * before returning I/Os to OS with "DID_NO_CONNECT".
8687 */
8688 if (le16_to_cpu(nv->link_down_timeout) == 0) {
8689 ha->loop_down_abort_time =
8690 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
8691 } else {
8692 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
8693 ha->loop_down_abort_time =
8694 (LOOP_DOWN_TIME - ha->link_down_timeout);
8695 }
8696
8697 /* Need enough time to try and get the port back. */
8698 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
8699 if (qlport_down_retry)
8700 ha->port_down_retry_count = qlport_down_retry;
8701
8702 /* Set login_retry_count */
8703 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
8704 if (ha->port_down_retry_count ==
8705 le16_to_cpu(nv->port_down_retry_count) &&
8706 ha->port_down_retry_count > 3)
8707 ha->login_retry_count = ha->port_down_retry_count;
8708 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
8709 ha->login_retry_count = ha->port_down_retry_count;
8710 if (ql2xloginretrycount)
8711 ha->login_retry_count = ql2xloginretrycount;
8712
8713 /* if not running MSI-X we need handshaking on interrupts */
8714 if (!vha->hw->flags.msix_enabled &&
8715 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)))
8716 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
8717
8718 /* Enable ZIO. */
8719 if (!vha->flags.init_done) {
8720 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
8721 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
8722 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
8723 le16_to_cpu(icb->interrupt_delay_timer) : 2;
8724 }
8725 icb->firmware_options_2 &= cpu_to_le32(
8726 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
8727 vha->flags.process_response_queue = 0;
8728 if (ha->zio_mode != QLA_ZIO_DISABLED) {
8729 ha->zio_mode = QLA_ZIO_MODE_6;
8730
8731 ql_log(ql_log_info, vha, 0x0075,
8732 "ZIO mode %d enabled; timer delay (%d us).\n",
8733 ha->zio_mode,
8734 ha->zio_timer * 100);
8735
8736 icb->firmware_options_2 |= cpu_to_le32(
8737 (uint32_t)ha->zio_mode);
8738 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
8739 vha->flags.process_response_queue = 1;
8740 }
8741
8742 /* enable RIDA Format2 */
8743 icb->firmware_options_3 |= cpu_to_le32(BIT_0);
8744
8745 /* N2N: driver will initiate Login instead of FW */
8746 icb->firmware_options_3 |= cpu_to_le32(BIT_8);
8747
8748 /* Determine NVMe/FCP priority for target ports */
8749 ha->fc4_type_priority = qla2xxx_get_fc4_priority(vha);
8750
8751 if (rval) {
8752 ql_log(ql_log_warn, vha, 0x0076,
8753 "NVRAM configuration failed.\n");
8754 }
8755 return (rval);
8756 }
8757
8758 int
qla82xx_restart_isp(scsi_qla_host_t * vha)8759 qla82xx_restart_isp(scsi_qla_host_t *vha)
8760 {
8761 int status, rval;
8762 struct qla_hw_data *ha = vha->hw;
8763 struct scsi_qla_host *vp;
8764 unsigned long flags;
8765
8766 status = qla2x00_init_rings(vha);
8767 if (!status) {
8768 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8769 ha->flags.chip_reset_done = 1;
8770
8771 status = qla2x00_fw_ready(vha);
8772 if (!status) {
8773 /* Issue a marker after FW becomes ready. */
8774 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
8775 vha->flags.online = 1;
8776 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
8777 }
8778
8779 /* if no cable then assume it's good */
8780 if ((vha->device_flags & DFLG_NO_CABLE))
8781 status = 0;
8782 }
8783
8784 if (!status) {
8785 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8786
8787 if (!atomic_read(&vha->loop_down_timer)) {
8788 /*
8789 * Issue marker command only when we are going
8790 * to start the I/O .
8791 */
8792 vha->marker_needed = 1;
8793 }
8794
8795 ha->isp_ops->enable_intrs(ha);
8796
8797 ha->isp_abort_cnt = 0;
8798 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
8799
8800 /* Update the firmware version */
8801 status = qla82xx_check_md_needed(vha);
8802
8803 if (ha->fce) {
8804 ha->flags.fce_enabled = 1;
8805 memset(ha->fce, 0,
8806 fce_calc_size(ha->fce_bufs));
8807 rval = qla2x00_enable_fce_trace(vha,
8808 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
8809 &ha->fce_bufs);
8810 if (rval) {
8811 ql_log(ql_log_warn, vha, 0x8001,
8812 "Unable to reinitialize FCE (%d).\n",
8813 rval);
8814 ha->flags.fce_enabled = 0;
8815 }
8816 }
8817
8818 if (ha->eft) {
8819 memset(ha->eft, 0, EFT_SIZE);
8820 rval = qla2x00_enable_eft_trace(vha,
8821 ha->eft_dma, EFT_NUM_BUFFERS);
8822 if (rval) {
8823 ql_log(ql_log_warn, vha, 0x8010,
8824 "Unable to reinitialize EFT (%d).\n",
8825 rval);
8826 }
8827 }
8828 }
8829
8830 if (!status) {
8831 ql_dbg(ql_dbg_taskm, vha, 0x8011,
8832 "qla82xx_restart_isp succeeded.\n");
8833
8834 spin_lock_irqsave(&ha->vport_slock, flags);
8835 list_for_each_entry(vp, &ha->vp_list, list) {
8836 if (vp->vp_idx) {
8837 atomic_inc(&vp->vref_count);
8838 spin_unlock_irqrestore(&ha->vport_slock, flags);
8839
8840 qla2x00_vp_abort_isp(vp);
8841
8842 spin_lock_irqsave(&ha->vport_slock, flags);
8843 atomic_dec(&vp->vref_count);
8844 }
8845 }
8846 spin_unlock_irqrestore(&ha->vport_slock, flags);
8847
8848 } else {
8849 ql_log(ql_log_warn, vha, 0x8016,
8850 "qla82xx_restart_isp **** FAILED ****.\n");
8851 }
8852
8853 return status;
8854 }
8855
8856 /*
8857 * qla24xx_get_fcp_prio
8858 * Gets the fcp cmd priority value for the logged in port.
8859 * Looks for a match of the port descriptors within
8860 * each of the fcp prio config entries. If a match is found,
8861 * the tag (priority) value is returned.
8862 *
8863 * Input:
8864 * vha = scsi host structure pointer.
8865 * fcport = port structure pointer.
8866 *
8867 * Return:
8868 * non-zero (if found)
8869 * -1 (if not found)
8870 *
8871 * Context:
8872 * Kernel context
8873 */
8874 static int
qla24xx_get_fcp_prio(scsi_qla_host_t * vha,fc_port_t * fcport)8875 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
8876 {
8877 int i, entries;
8878 uint8_t pid_match, wwn_match;
8879 int priority;
8880 uint32_t pid1, pid2;
8881 uint64_t wwn1, wwn2;
8882 struct qla_fcp_prio_entry *pri_entry;
8883 struct qla_hw_data *ha = vha->hw;
8884
8885 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
8886 return -1;
8887
8888 priority = -1;
8889 entries = ha->fcp_prio_cfg->num_entries;
8890 pri_entry = &ha->fcp_prio_cfg->entry[0];
8891
8892 for (i = 0; i < entries; i++) {
8893 pid_match = wwn_match = 0;
8894
8895 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
8896 pri_entry++;
8897 continue;
8898 }
8899
8900 /* check source pid for a match */
8901 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
8902 pid1 = pri_entry->src_pid & INVALID_PORT_ID;
8903 pid2 = vha->d_id.b24 & INVALID_PORT_ID;
8904 if (pid1 == INVALID_PORT_ID)
8905 pid_match++;
8906 else if (pid1 == pid2)
8907 pid_match++;
8908 }
8909
8910 /* check destination pid for a match */
8911 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
8912 pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
8913 pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
8914 if (pid1 == INVALID_PORT_ID)
8915 pid_match++;
8916 else if (pid1 == pid2)
8917 pid_match++;
8918 }
8919
8920 /* check source WWN for a match */
8921 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
8922 wwn1 = wwn_to_u64(vha->port_name);
8923 wwn2 = wwn_to_u64(pri_entry->src_wwpn);
8924 if (wwn2 == (uint64_t)-1)
8925 wwn_match++;
8926 else if (wwn1 == wwn2)
8927 wwn_match++;
8928 }
8929
8930 /* check destination WWN for a match */
8931 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
8932 wwn1 = wwn_to_u64(fcport->port_name);
8933 wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
8934 if (wwn2 == (uint64_t)-1)
8935 wwn_match++;
8936 else if (wwn1 == wwn2)
8937 wwn_match++;
8938 }
8939
8940 if (pid_match == 2 || wwn_match == 2) {
8941 /* Found a matching entry */
8942 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
8943 priority = pri_entry->tag;
8944 break;
8945 }
8946
8947 pri_entry++;
8948 }
8949
8950 return priority;
8951 }
8952
8953 /*
8954 * qla24xx_update_fcport_fcp_prio
8955 * Activates fcp priority for the logged in fc port
8956 *
8957 * Input:
8958 * vha = scsi host structure pointer.
8959 * fcp = port structure pointer.
8960 *
8961 * Return:
8962 * QLA_SUCCESS or QLA_FUNCTION_FAILED
8963 *
8964 * Context:
8965 * Kernel context.
8966 */
8967 int
qla24xx_update_fcport_fcp_prio(scsi_qla_host_t * vha,fc_port_t * fcport)8968 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
8969 {
8970 int ret;
8971 int priority;
8972 uint16_t mb[5];
8973
8974 if (fcport->port_type != FCT_TARGET ||
8975 fcport->loop_id == FC_NO_LOOP_ID)
8976 return QLA_FUNCTION_FAILED;
8977
8978 priority = qla24xx_get_fcp_prio(vha, fcport);
8979 if (priority < 0)
8980 return QLA_FUNCTION_FAILED;
8981
8982 if (IS_P3P_TYPE(vha->hw)) {
8983 fcport->fcp_prio = priority & 0xf;
8984 return QLA_SUCCESS;
8985 }
8986
8987 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
8988 if (ret == QLA_SUCCESS) {
8989 if (fcport->fcp_prio != priority)
8990 ql_dbg(ql_dbg_user, vha, 0x709e,
8991 "Updated FCP_CMND priority - value=%d loop_id=%d "
8992 "port_id=%02x%02x%02x.\n", priority,
8993 fcport->loop_id, fcport->d_id.b.domain,
8994 fcport->d_id.b.area, fcport->d_id.b.al_pa);
8995 fcport->fcp_prio = priority & 0xf;
8996 } else
8997 ql_dbg(ql_dbg_user, vha, 0x704f,
8998 "Unable to update FCP_CMND priority - ret=0x%x for "
8999 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id,
9000 fcport->d_id.b.domain, fcport->d_id.b.area,
9001 fcport->d_id.b.al_pa);
9002 return ret;
9003 }
9004
9005 /*
9006 * qla24xx_update_all_fcp_prio
9007 * Activates fcp priority for all the logged in ports
9008 *
9009 * Input:
9010 * ha = adapter block pointer.
9011 *
9012 * Return:
9013 * QLA_SUCCESS or QLA_FUNCTION_FAILED
9014 *
9015 * Context:
9016 * Kernel context.
9017 */
9018 int
qla24xx_update_all_fcp_prio(scsi_qla_host_t * vha)9019 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
9020 {
9021 int ret;
9022 fc_port_t *fcport;
9023
9024 ret = QLA_FUNCTION_FAILED;
9025 /* We need to set priority for all logged in ports */
9026 list_for_each_entry(fcport, &vha->vp_fcports, list)
9027 ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
9028
9029 return ret;
9030 }
9031
qla2xxx_create_qpair(struct scsi_qla_host * vha,int qos,int vp_idx,bool startqp)9032 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos,
9033 int vp_idx, bool startqp)
9034 {
9035 int rsp_id = 0;
9036 int req_id = 0;
9037 int i;
9038 struct qla_hw_data *ha = vha->hw;
9039 uint16_t qpair_id = 0;
9040 struct qla_qpair *qpair = NULL;
9041 struct qla_msix_entry *msix;
9042
9043 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) {
9044 ql_log(ql_log_warn, vha, 0x00181,
9045 "FW/Driver is not multi-queue capable.\n");
9046 return NULL;
9047 }
9048
9049 if (ql2xmqsupport || ql2xnvmeenable) {
9050 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
9051 if (qpair == NULL) {
9052 ql_log(ql_log_warn, vha, 0x0182,
9053 "Failed to allocate memory for queue pair.\n");
9054 return NULL;
9055 }
9056
9057 qpair->hw = vha->hw;
9058 qpair->vha = vha;
9059 qpair->qp_lock_ptr = &qpair->qp_lock;
9060 spin_lock_init(&qpair->qp_lock);
9061 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
9062
9063 /* Assign available que pair id */
9064 mutex_lock(&ha->mq_lock);
9065 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs);
9066 if (ha->num_qpairs >= ha->max_qpairs) {
9067 mutex_unlock(&ha->mq_lock);
9068 ql_log(ql_log_warn, vha, 0x0183,
9069 "No resources to create additional q pair.\n");
9070 goto fail_qid_map;
9071 }
9072 ha->num_qpairs++;
9073 set_bit(qpair_id, ha->qpair_qid_map);
9074 ha->queue_pair_map[qpair_id] = qpair;
9075 qpair->id = qpair_id;
9076 qpair->vp_idx = vp_idx;
9077 qpair->fw_started = ha->flags.fw_started;
9078 INIT_LIST_HEAD(&qpair->hints_list);
9079 qpair->chip_reset = ha->base_qpair->chip_reset;
9080 qpair->enable_class_2 = ha->base_qpair->enable_class_2;
9081 qpair->enable_explicit_conf =
9082 ha->base_qpair->enable_explicit_conf;
9083
9084 for (i = 0; i < ha->msix_count; i++) {
9085 msix = &ha->msix_entries[i];
9086 if (msix->in_use)
9087 continue;
9088 qpair->msix = msix;
9089 ql_dbg(ql_dbg_multiq, vha, 0xc00f,
9090 "Vector %x selected for qpair\n", msix->vector);
9091 break;
9092 }
9093 if (!qpair->msix) {
9094 ql_log(ql_log_warn, vha, 0x0184,
9095 "Out of MSI-X vectors!.\n");
9096 goto fail_msix;
9097 }
9098
9099 qpair->msix->in_use = 1;
9100 list_add_tail(&qpair->qp_list_elem, &vha->qp_list);
9101 qpair->pdev = ha->pdev;
9102 if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha))
9103 qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
9104
9105 mutex_unlock(&ha->mq_lock);
9106
9107 /* Create response queue first */
9108 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp);
9109 if (!rsp_id) {
9110 ql_log(ql_log_warn, vha, 0x0185,
9111 "Failed to create response queue.\n");
9112 goto fail_rsp;
9113 }
9114
9115 qpair->rsp = ha->rsp_q_map[rsp_id];
9116
9117 /* Create request queue */
9118 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos,
9119 startqp);
9120 if (!req_id) {
9121 ql_log(ql_log_warn, vha, 0x0186,
9122 "Failed to create request queue.\n");
9123 goto fail_req;
9124 }
9125
9126 qpair->req = ha->req_q_map[req_id];
9127 qpair->rsp->req = qpair->req;
9128 qpair->rsp->qpair = qpair;
9129 /* init qpair to this cpu. Will adjust at run time. */
9130 qla_cpu_update(qpair, smp_processor_id());
9131
9132 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
9133 if (ha->fw_attributes & BIT_4)
9134 qpair->difdix_supported = 1;
9135 }
9136
9137 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
9138 if (!qpair->srb_mempool) {
9139 ql_log(ql_log_warn, vha, 0xd036,
9140 "Failed to create srb mempool for qpair %d\n",
9141 qpair->id);
9142 goto fail_mempool;
9143 }
9144
9145 /* Mark as online */
9146 qpair->online = 1;
9147
9148 if (!vha->flags.qpairs_available)
9149 vha->flags.qpairs_available = 1;
9150
9151 ql_dbg(ql_dbg_multiq, vha, 0xc00d,
9152 "Request/Response queue pair created, id %d\n",
9153 qpair->id);
9154 ql_dbg(ql_dbg_init, vha, 0x0187,
9155 "Request/Response queue pair created, id %d\n",
9156 qpair->id);
9157 }
9158 return qpair;
9159
9160 fail_mempool:
9161 fail_req:
9162 qla25xx_delete_rsp_que(vha, qpair->rsp);
9163 fail_rsp:
9164 mutex_lock(&ha->mq_lock);
9165 qpair->msix->in_use = 0;
9166 list_del(&qpair->qp_list_elem);
9167 if (list_empty(&vha->qp_list))
9168 vha->flags.qpairs_available = 0;
9169 fail_msix:
9170 ha->queue_pair_map[qpair_id] = NULL;
9171 clear_bit(qpair_id, ha->qpair_qid_map);
9172 ha->num_qpairs--;
9173 mutex_unlock(&ha->mq_lock);
9174 fail_qid_map:
9175 kfree(qpair);
9176 return NULL;
9177 }
9178
qla2xxx_delete_qpair(struct scsi_qla_host * vha,struct qla_qpair * qpair)9179 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair)
9180 {
9181 int ret = QLA_FUNCTION_FAILED;
9182 struct qla_hw_data *ha = qpair->hw;
9183
9184 qpair->delete_in_progress = 1;
9185
9186 ret = qla25xx_delete_req_que(vha, qpair->req);
9187 if (ret != QLA_SUCCESS)
9188 goto fail;
9189
9190 ret = qla25xx_delete_rsp_que(vha, qpair->rsp);
9191 if (ret != QLA_SUCCESS)
9192 goto fail;
9193
9194 mutex_lock(&ha->mq_lock);
9195 ha->queue_pair_map[qpair->id] = NULL;
9196 clear_bit(qpair->id, ha->qpair_qid_map);
9197 ha->num_qpairs--;
9198 list_del(&qpair->qp_list_elem);
9199 if (list_empty(&vha->qp_list)) {
9200 vha->flags.qpairs_available = 0;
9201 vha->flags.qpairs_req_created = 0;
9202 vha->flags.qpairs_rsp_created = 0;
9203 }
9204 mempool_destroy(qpair->srb_mempool);
9205 kfree(qpair);
9206 mutex_unlock(&ha->mq_lock);
9207
9208 return QLA_SUCCESS;
9209 fail:
9210 return ret;
9211 }
9212