1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (C) 2015 Linaro Ltd.
4 * Author: Shannon Zhao <shannon.zhao@linaro.org>
5 */
6
7 #ifndef __ASM_ARM_KVM_PMU_H
8 #define __ASM_ARM_KVM_PMU_H
9
10 #include <linux/perf_event.h>
11 #include <asm/perf_event.h>
12
13 #define ARMV8_PMU_CYCLE_IDX (ARMV8_PMU_MAX_COUNTERS - 1)
14 #define ARMV8_PMU_MAX_COUNTER_PAIRS ((ARMV8_PMU_MAX_COUNTERS + 1) >> 1)
15
16 #ifdef CONFIG_KVM_ARM_PMU
17
18 struct kvm_pmc {
19 u8 idx; /* index into the pmu->pmc array */
20 struct perf_event *perf_event;
21 };
22
23 struct kvm_pmu {
24 int irq_num;
25 struct kvm_pmc pmc[ARMV8_PMU_MAX_COUNTERS];
26 DECLARE_BITMAP(chained, ARMV8_PMU_MAX_COUNTER_PAIRS);
27 bool ready;
28 bool created;
29 bool irq_level;
30 struct irq_work overflow_work;
31 };
32
33 #define kvm_arm_pmu_v3_ready(v) ((v)->arch.pmu.ready)
34 #define kvm_arm_pmu_irq_initialized(v) ((v)->arch.pmu.irq_num >= VGIC_NR_SGIS)
35 u64 kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu, u64 select_idx);
36 void kvm_pmu_set_counter_value(struct kvm_vcpu *vcpu, u64 select_idx, u64 val);
37 u64 kvm_pmu_valid_counter_mask(struct kvm_vcpu *vcpu);
38 u64 kvm_pmu_get_pmceid(struct kvm_vcpu *vcpu, bool pmceid1);
39 void kvm_pmu_vcpu_init(struct kvm_vcpu *vcpu);
40 void kvm_pmu_vcpu_reset(struct kvm_vcpu *vcpu);
41 void kvm_pmu_vcpu_destroy(struct kvm_vcpu *vcpu);
42 void kvm_pmu_disable_counter_mask(struct kvm_vcpu *vcpu, u64 val);
43 void kvm_pmu_enable_counter_mask(struct kvm_vcpu *vcpu, u64 val);
44 void kvm_pmu_flush_hwstate(struct kvm_vcpu *vcpu);
45 void kvm_pmu_sync_hwstate(struct kvm_vcpu *vcpu);
46 bool kvm_pmu_should_notify_user(struct kvm_vcpu *vcpu);
47 void kvm_pmu_update_run(struct kvm_vcpu *vcpu);
48 void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, u64 val);
49 void kvm_pmu_handle_pmcr(struct kvm_vcpu *vcpu, u64 val);
50 void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, u64 data,
51 u64 select_idx);
52 bool kvm_arm_support_pmu_v3(void);
53 int kvm_arm_pmu_v3_set_attr(struct kvm_vcpu *vcpu,
54 struct kvm_device_attr *attr);
55 int kvm_arm_pmu_v3_get_attr(struct kvm_vcpu *vcpu,
56 struct kvm_device_attr *attr);
57 int kvm_arm_pmu_v3_has_attr(struct kvm_vcpu *vcpu,
58 struct kvm_device_attr *attr);
59 int kvm_arm_pmu_v3_enable(struct kvm_vcpu *vcpu);
60 #else
61 struct kvm_pmu {
62 };
63
64 #define kvm_arm_pmu_v3_ready(v) (false)
65 #define kvm_arm_pmu_irq_initialized(v) (false)
kvm_pmu_get_counter_value(struct kvm_vcpu * vcpu,u64 select_idx)66 static inline u64 kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu,
67 u64 select_idx)
68 {
69 return 0;
70 }
kvm_pmu_set_counter_value(struct kvm_vcpu * vcpu,u64 select_idx,u64 val)71 static inline void kvm_pmu_set_counter_value(struct kvm_vcpu *vcpu,
72 u64 select_idx, u64 val) {}
kvm_pmu_valid_counter_mask(struct kvm_vcpu * vcpu)73 static inline u64 kvm_pmu_valid_counter_mask(struct kvm_vcpu *vcpu)
74 {
75 return 0;
76 }
kvm_pmu_vcpu_init(struct kvm_vcpu * vcpu)77 static inline void kvm_pmu_vcpu_init(struct kvm_vcpu *vcpu) {}
kvm_pmu_vcpu_reset(struct kvm_vcpu * vcpu)78 static inline void kvm_pmu_vcpu_reset(struct kvm_vcpu *vcpu) {}
kvm_pmu_vcpu_destroy(struct kvm_vcpu * vcpu)79 static inline void kvm_pmu_vcpu_destroy(struct kvm_vcpu *vcpu) {}
kvm_pmu_disable_counter_mask(struct kvm_vcpu * vcpu,u64 val)80 static inline void kvm_pmu_disable_counter_mask(struct kvm_vcpu *vcpu, u64 val) {}
kvm_pmu_enable_counter_mask(struct kvm_vcpu * vcpu,u64 val)81 static inline void kvm_pmu_enable_counter_mask(struct kvm_vcpu *vcpu, u64 val) {}
kvm_pmu_flush_hwstate(struct kvm_vcpu * vcpu)82 static inline void kvm_pmu_flush_hwstate(struct kvm_vcpu *vcpu) {}
kvm_pmu_sync_hwstate(struct kvm_vcpu * vcpu)83 static inline void kvm_pmu_sync_hwstate(struct kvm_vcpu *vcpu) {}
kvm_pmu_should_notify_user(struct kvm_vcpu * vcpu)84 static inline bool kvm_pmu_should_notify_user(struct kvm_vcpu *vcpu)
85 {
86 return false;
87 }
kvm_pmu_update_run(struct kvm_vcpu * vcpu)88 static inline void kvm_pmu_update_run(struct kvm_vcpu *vcpu) {}
kvm_pmu_software_increment(struct kvm_vcpu * vcpu,u64 val)89 static inline void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, u64 val) {}
kvm_pmu_handle_pmcr(struct kvm_vcpu * vcpu,u64 val)90 static inline void kvm_pmu_handle_pmcr(struct kvm_vcpu *vcpu, u64 val) {}
kvm_pmu_set_counter_event_type(struct kvm_vcpu * vcpu,u64 data,u64 select_idx)91 static inline void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu,
92 u64 data, u64 select_idx) {}
kvm_arm_support_pmu_v3(void)93 static inline bool kvm_arm_support_pmu_v3(void) { return false; }
kvm_arm_pmu_v3_set_attr(struct kvm_vcpu * vcpu,struct kvm_device_attr * attr)94 static inline int kvm_arm_pmu_v3_set_attr(struct kvm_vcpu *vcpu,
95 struct kvm_device_attr *attr)
96 {
97 return -ENXIO;
98 }
kvm_arm_pmu_v3_get_attr(struct kvm_vcpu * vcpu,struct kvm_device_attr * attr)99 static inline int kvm_arm_pmu_v3_get_attr(struct kvm_vcpu *vcpu,
100 struct kvm_device_attr *attr)
101 {
102 return -ENXIO;
103 }
kvm_arm_pmu_v3_has_attr(struct kvm_vcpu * vcpu,struct kvm_device_attr * attr)104 static inline int kvm_arm_pmu_v3_has_attr(struct kvm_vcpu *vcpu,
105 struct kvm_device_attr *attr)
106 {
107 return -ENXIO;
108 }
kvm_arm_pmu_v3_enable(struct kvm_vcpu * vcpu)109 static inline int kvm_arm_pmu_v3_enable(struct kvm_vcpu *vcpu)
110 {
111 return 0;
112 }
kvm_pmu_get_pmceid(struct kvm_vcpu * vcpu,bool pmceid1)113 static inline u64 kvm_pmu_get_pmceid(struct kvm_vcpu *vcpu, bool pmceid1)
114 {
115 return 0;
116 }
117 #endif
118
119 #endif
120