1 /***************************************************************************
2
3 Copyright Echo Digital Audio Corporation (c) 1998 - 2004
4 All rights reserved
5 www.echoaudio.com
6
7 This file is part of Echo Digital Audio's generic driver library.
8
9 Echo Digital Audio's generic driver library is free software;
10 you can redistribute it and/or modify it under the terms of
11 the GNU General Public License as published by the Free Software
12 Foundation.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston,
22 MA 02111-1307, USA.
23
24 *************************************************************************
25
26 Translation from C++ and adaptation for use in ALSA-Driver
27 were made by Giuliano Pochini <pochini@shiny.it>
28
29 ****************************************************************************/
30
31
init_hw(struct echoaudio * chip,u16 device_id,u16 subdevice_id)32 static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
33 {
34 int err;
35
36 if (snd_BUG_ON((subdevice_id & 0xfff0) != DARLA24))
37 return -ENODEV;
38
39 if ((err = init_dsp_comm_page(chip))) {
40 dev_err(chip->card->dev,
41 "init_hw: could not initialize DSP comm page\n");
42 return err;
43 }
44
45 chip->device_id = device_id;
46 chip->subdevice_id = subdevice_id;
47 chip->bad_board = true;
48 chip->dsp_code_to_load = FW_DARLA24_DSP;
49 /* Since this card has no ASIC, mark it as loaded so everything
50 works OK */
51 chip->asic_loaded = true;
52 chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL |
53 ECHO_CLOCK_BIT_ESYNC;
54
55 if ((err = load_firmware(chip)) < 0)
56 return err;
57 chip->bad_board = false;
58
59 return err;
60 }
61
62
63
set_mixer_defaults(struct echoaudio * chip)64 static int set_mixer_defaults(struct echoaudio *chip)
65 {
66 return init_line_levels(chip);
67 }
68
69
70
detect_input_clocks(const struct echoaudio * chip)71 static u32 detect_input_clocks(const struct echoaudio *chip)
72 {
73 u32 clocks_from_dsp, clock_bits;
74
75 /* Map the DSP clock detect bits to the generic driver clock
76 detect bits */
77 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);
78
79 clock_bits = ECHO_CLOCK_BIT_INTERNAL;
80
81 if (clocks_from_dsp & GLDM_CLOCK_DETECT_BIT_ESYNC)
82 clock_bits |= ECHO_CLOCK_BIT_ESYNC;
83
84 return clock_bits;
85 }
86
87
88
89 /* The Darla24 has no ASIC. Just do nothing */
load_asic(struct echoaudio * chip)90 static int load_asic(struct echoaudio *chip)
91 {
92 return 0;
93 }
94
95
96
set_sample_rate(struct echoaudio * chip,u32 rate)97 static int set_sample_rate(struct echoaudio *chip, u32 rate)
98 {
99 u8 clock;
100
101 switch (rate) {
102 case 96000:
103 clock = GD24_96000;
104 break;
105 case 88200:
106 clock = GD24_88200;
107 break;
108 case 48000:
109 clock = GD24_48000;
110 break;
111 case 44100:
112 clock = GD24_44100;
113 break;
114 case 32000:
115 clock = GD24_32000;
116 break;
117 case 22050:
118 clock = GD24_22050;
119 break;
120 case 16000:
121 clock = GD24_16000;
122 break;
123 case 11025:
124 clock = GD24_11025;
125 break;
126 case 8000:
127 clock = GD24_8000;
128 break;
129 default:
130 dev_err(chip->card->dev,
131 "set_sample_rate: Error, invalid sample rate %d\n",
132 rate);
133 return -EINVAL;
134 }
135
136 if (wait_handshake(chip))
137 return -EIO;
138
139 dev_dbg(chip->card->dev,
140 "set_sample_rate: %d clock %d\n", rate, clock);
141 chip->sample_rate = rate;
142
143 /* Override the sample rate if this card is set to Echo sync. */
144 if (chip->input_clock == ECHO_CLOCK_ESYNC)
145 clock = GD24_EXT_SYNC;
146
147 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP ? */
148 chip->comm_page->gd_clock_state = clock;
149 clear_handshake(chip);
150 return send_vector(chip, DSP_VC_SET_GD_AUDIO_STATE);
151 }
152
153
154
set_input_clock(struct echoaudio * chip,u16 clock)155 static int set_input_clock(struct echoaudio *chip, u16 clock)
156 {
157 if (snd_BUG_ON(clock != ECHO_CLOCK_INTERNAL &&
158 clock != ECHO_CLOCK_ESYNC))
159 return -EINVAL;
160 chip->input_clock = clock;
161 return set_sample_rate(chip, chip->sample_rate);
162 }
163
164