1 /* 2 * This header was generated from the Linux kernel headers by update_headers.py, 3 * to provide necessary information from kernel to userspace, such as constants, 4 * structures, and macros, and thus, contains no copyrightable information. 5 */ 6 #ifndef __ASM_ARM_PTRACE_H 7 #define __ASM_ARM_PTRACE_H 8 #include <asm/hwcap.h> 9 #define PTRACE_GETREGS 12 10 #define PTRACE_SETREGS 13 11 #define PTRACE_GETFPREGS 14 12 #define PTRACE_SETFPREGS 15 13 #define PTRACE_GETWMMXREGS 18 14 #define PTRACE_SETWMMXREGS 19 15 #define PTRACE_OLDSETOPTIONS 21 16 #define PTRACE_GET_THREAD_AREA 22 17 #define PTRACE_SET_SYSCALL 23 18 #define PTRACE_GETCRUNCHREGS 25 19 #define PTRACE_SETCRUNCHREGS 26 20 #define PTRACE_GETVFPREGS 27 21 #define PTRACE_SETVFPREGS 28 22 #define PTRACE_GETHBPREGS 29 23 #define PTRACE_SETHBPREGS 30 24 #define PTRACE_GETFDPIC 31 25 #define PTRACE_GETFDPIC_EXEC 0 26 #define PTRACE_GETFDPIC_INTERP 1 27 #define USR26_MODE 0x00000000 28 #define FIQ26_MODE 0x00000001 29 #define IRQ26_MODE 0x00000002 30 #define SVC26_MODE 0x00000003 31 #define USR_MODE 0x00000010 32 #define SVC_MODE 0x00000013 33 #define FIQ_MODE 0x00000011 34 #define IRQ_MODE 0x00000012 35 #define MON_MODE 0x00000016 36 #define ABT_MODE 0x00000017 37 #define HYP_MODE 0x0000001a 38 #define UND_MODE 0x0000001b 39 #define SYSTEM_MODE 0x0000001f 40 #define MODE32_BIT 0x00000010 41 #define MODE_MASK 0x0000001f 42 #define V4_PSR_T_BIT 0x00000020 43 #define V7M_PSR_T_BIT 0x01000000 44 #define PSR_T_BIT V4_PSR_T_BIT 45 #define PSR_F_BIT 0x00000040 46 #define PSR_I_BIT 0x00000080 47 #define PSR_A_BIT 0x00000100 48 #define PSR_E_BIT 0x00000200 49 #define PSR_J_BIT 0x01000000 50 #define PSR_Q_BIT 0x08000000 51 #define PSR_V_BIT 0x10000000 52 #define PSR_C_BIT 0x20000000 53 #define PSR_Z_BIT 0x40000000 54 #define PSR_N_BIT 0x80000000 55 #define PSR_f 0xff000000 56 #define PSR_s 0x00ff0000 57 #define PSR_x 0x0000ff00 58 #define PSR_c 0x000000ff 59 #define APSR_MASK 0xf80f0000 60 #define PSR_ISET_MASK 0x01000010 61 #define PSR_IT_MASK 0x0600fc00 62 #define PSR_ENDIAN_MASK 0x00000200 63 #ifdef CONFIG_CPU_ENDIAN_BE8 64 #define PSR_ENDSTATE PSR_E_BIT 65 #else 66 #define PSR_ENDSTATE 0 67 #endif 68 #define PT_TEXT_ADDR 0x10000 69 #define PT_DATA_ADDR 0x10004 70 #define PT_TEXT_END_ADDR 0x10008 71 #ifndef __ASSEMBLY__ 72 struct pt_regs { 73 long uregs[18]; 74 }; 75 #define ARM_cpsr uregs[16] 76 #define ARM_pc uregs[15] 77 #define ARM_lr uregs[14] 78 #define ARM_sp uregs[13] 79 #define ARM_ip uregs[12] 80 #define ARM_fp uregs[11] 81 #define ARM_r10 uregs[10] 82 #define ARM_r9 uregs[9] 83 #define ARM_r8 uregs[8] 84 #define ARM_r7 uregs[7] 85 #define ARM_r6 uregs[6] 86 #define ARM_r5 uregs[5] 87 #define ARM_r4 uregs[4] 88 #define ARM_r3 uregs[3] 89 #define ARM_r2 uregs[2] 90 #define ARM_r1 uregs[1] 91 #define ARM_r0 uregs[0] 92 #define ARM_ORIG_r0 uregs[17] 93 #define ARM_VFPREGS_SIZE ( 32 * 8 ) 94 #endif 95 #endif 96