1 /* 2 * This header was generated from the Linux kernel headers by update_headers.py, 3 * to provide necessary information from kernel to userspace, such as constants, 4 * structures, and macros, and thus, contains no copyrightable information. 5 */ 6 #ifndef _DRM_MODE_H 7 #define _DRM_MODE_H 8 #include "drm.h" 9 #if defined(__cplusplus) 10 extern "C" { 11 #endif 12 #define DRM_DISPLAY_INFO_LEN 32 13 #define DRM_CONNECTOR_NAME_LEN 32 14 #define DRM_DISPLAY_MODE_LEN 32 15 #define DRM_PROP_NAME_LEN 32 16 #define DRM_MODE_TYPE_BUILTIN (1<<0) 17 #define DRM_MODE_TYPE_CLOCK_C ((1<<1) | DRM_MODE_TYPE_BUILTIN) 18 #define DRM_MODE_TYPE_CRTC_C ((1<<2) | DRM_MODE_TYPE_BUILTIN) 19 #define DRM_MODE_TYPE_PREFERRED (1<<3) 20 #define DRM_MODE_TYPE_DEFAULT (1<<4) 21 #define DRM_MODE_TYPE_USERDEF (1<<5) 22 #define DRM_MODE_TYPE_DRIVER (1<<6) 23 #define DRM_MODE_TYPE_ALL (DRM_MODE_TYPE_PREFERRED | \ 24 DRM_MODE_TYPE_USERDEF | \ 25 DRM_MODE_TYPE_DRIVER) 26 #define DRM_MODE_FLAG_PHSYNC (1<<0) 27 #define DRM_MODE_FLAG_NHSYNC (1<<1) 28 #define DRM_MODE_FLAG_PVSYNC (1<<2) 29 #define DRM_MODE_FLAG_NVSYNC (1<<3) 30 #define DRM_MODE_FLAG_INTERLACE (1<<4) 31 #define DRM_MODE_FLAG_DBLSCAN (1<<5) 32 #define DRM_MODE_FLAG_CSYNC (1<<6) 33 #define DRM_MODE_FLAG_PCSYNC (1<<7) 34 #define DRM_MODE_FLAG_NCSYNC (1<<8) 35 #define DRM_MODE_FLAG_HSKEW (1<<9) 36 #define DRM_MODE_FLAG_BCAST (1<<10) 37 #define DRM_MODE_FLAG_PIXMUX (1<<11) 38 #define DRM_MODE_FLAG_DBLCLK (1<<12) 39 #define DRM_MODE_FLAG_CLKDIV2 (1<<13) 40 41 #define DRM_MODE_FLAG_3D_MASK (0x1f<<14) 42 #define DRM_MODE_FLAG_3D_NONE (0<<14) 43 #define DRM_MODE_FLAG_3D_FRAME_PACKING (1<<14) 44 #define DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE (2<<14) 45 #define DRM_MODE_FLAG_3D_LINE_ALTERNATIVE (3<<14) 46 #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL (4<<14) 47 #define DRM_MODE_FLAG_3D_L_DEPTH (5<<14) 48 #define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH (6<<14) 49 #define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (7<<14) 50 #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF (8<<14) 51 #define DRM_MODE_PICTURE_ASPECT_NONE 0 52 #define DRM_MODE_PICTURE_ASPECT_4_3 1 53 #define DRM_MODE_PICTURE_ASPECT_16_9 2 54 #define DRM_MODE_PICTURE_ASPECT_64_27 3 55 #define DRM_MODE_PICTURE_ASPECT_256_135 4 56 #define DRM_MODE_CONTENT_TYPE_NO_DATA 0 57 #define DRM_MODE_CONTENT_TYPE_GRAPHICS 1 58 #define DRM_MODE_CONTENT_TYPE_PHOTO 2 59 #define DRM_MODE_CONTENT_TYPE_CINEMA 3 60 #define DRM_MODE_CONTENT_TYPE_GAME 4 61 #define DRM_MODE_FLAG_PIC_AR_MASK (0x0F<<19) 62 #define DRM_MODE_FLAG_PIC_AR_NONE \ 63 (DRM_MODE_PICTURE_ASPECT_NONE<<19) 64 #define DRM_MODE_FLAG_PIC_AR_4_3 \ 65 (DRM_MODE_PICTURE_ASPECT_4_3<<19) 66 #define DRM_MODE_FLAG_PIC_AR_16_9 \ 67 (DRM_MODE_PICTURE_ASPECT_16_9<<19) 68 #define DRM_MODE_FLAG_PIC_AR_64_27 \ 69 (DRM_MODE_PICTURE_ASPECT_64_27<<19) 70 #define DRM_MODE_FLAG_PIC_AR_256_135 \ 71 (DRM_MODE_PICTURE_ASPECT_256_135<<19) 72 #define DRM_MODE_FLAG_ALL (DRM_MODE_FLAG_PHSYNC | \ 73 DRM_MODE_FLAG_NHSYNC | \ 74 DRM_MODE_FLAG_PVSYNC | \ 75 DRM_MODE_FLAG_NVSYNC | \ 76 DRM_MODE_FLAG_INTERLACE | \ 77 DRM_MODE_FLAG_DBLSCAN | \ 78 DRM_MODE_FLAG_CSYNC | \ 79 DRM_MODE_FLAG_PCSYNC | \ 80 DRM_MODE_FLAG_NCSYNC | \ 81 DRM_MODE_FLAG_HSKEW | \ 82 DRM_MODE_FLAG_DBLCLK | \ 83 DRM_MODE_FLAG_CLKDIV2 | \ 84 DRM_MODE_FLAG_3D_MASK) 85 #define DRM_MODE_DPMS_ON 0 86 #define DRM_MODE_DPMS_STANDBY 1 87 #define DRM_MODE_DPMS_SUSPEND 2 88 #define DRM_MODE_DPMS_OFF 3 89 #define DRM_MODE_SCALE_NONE 0 90 #define DRM_MODE_SCALE_FULLSCREEN 1 91 #define DRM_MODE_SCALE_CENTER 2 92 #define DRM_MODE_SCALE_ASPECT 3 93 #define DRM_MODE_DITHERING_OFF 0 94 #define DRM_MODE_DITHERING_ON 1 95 #define DRM_MODE_DITHERING_AUTO 2 96 #define DRM_MODE_DIRTY_OFF 0 97 #define DRM_MODE_DIRTY_ON 1 98 #define DRM_MODE_DIRTY_ANNOTATE 2 99 #define DRM_MODE_LINK_STATUS_GOOD 0 100 #define DRM_MODE_LINK_STATUS_BAD 1 101 #define DRM_MODE_ROTATE_0 (1<<0) 102 #define DRM_MODE_ROTATE_90 (1<<1) 103 #define DRM_MODE_ROTATE_180 (1<<2) 104 #define DRM_MODE_ROTATE_270 (1<<3) 105 #define DRM_MODE_ROTATE_MASK (\ 106 DRM_MODE_ROTATE_0 | \ 107 DRM_MODE_ROTATE_90 | \ 108 DRM_MODE_ROTATE_180 | \ 109 DRM_MODE_ROTATE_270) 110 #define DRM_MODE_REFLECT_X (1<<4) 111 #define DRM_MODE_REFLECT_Y (1<<5) 112 #define DRM_MODE_REFLECT_MASK (\ 113 DRM_MODE_REFLECT_X | \ 114 DRM_MODE_REFLECT_Y) 115 #define DRM_MODE_CONTENT_PROTECTION_UNDESIRED 0 116 #define DRM_MODE_CONTENT_PROTECTION_DESIRED 1 117 #define DRM_MODE_CONTENT_PROTECTION_ENABLED 2 118 struct drm_mode_modeinfo { 119 __u32 clock; 120 __u16 hdisplay; 121 __u16 hsync_start; 122 __u16 hsync_end; 123 __u16 htotal; 124 __u16 hskew; 125 __u16 vdisplay; 126 __u16 vsync_start; 127 __u16 vsync_end; 128 __u16 vtotal; 129 __u16 vscan; 130 __u32 vrefresh; 131 __u32 flags; 132 __u32 type; 133 char name[DRM_DISPLAY_MODE_LEN]; 134 }; 135 struct drm_mode_card_res { 136 __u64 fb_id_ptr; 137 __u64 crtc_id_ptr; 138 __u64 connector_id_ptr; 139 __u64 encoder_id_ptr; 140 __u32 count_fbs; 141 __u32 count_crtcs; 142 __u32 count_connectors; 143 __u32 count_encoders; 144 __u32 min_width; 145 __u32 max_width; 146 __u32 min_height; 147 __u32 max_height; 148 }; 149 struct drm_mode_crtc { 150 __u64 set_connectors_ptr; 151 __u32 count_connectors; 152 __u32 crtc_id; 153 __u32 fb_id; 154 __u32 x; 155 __u32 y; 156 __u32 gamma_size; 157 __u32 mode_valid; 158 struct drm_mode_modeinfo mode; 159 }; 160 #define DRM_MODE_PRESENT_TOP_FIELD (1<<0) 161 #define DRM_MODE_PRESENT_BOTTOM_FIELD (1<<1) 162 struct drm_mode_set_plane { 163 __u32 plane_id; 164 __u32 crtc_id; 165 __u32 fb_id; 166 __u32 flags; 167 168 __s32 crtc_x; 169 __s32 crtc_y; 170 __u32 crtc_w; 171 __u32 crtc_h; 172 173 __u32 src_x; 174 __u32 src_y; 175 __u32 src_h; 176 __u32 src_w; 177 }; 178 struct drm_mode_get_plane { 179 __u32 plane_id; 180 __u32 crtc_id; 181 __u32 fb_id; 182 __u32 possible_crtcs; 183 __u32 gamma_size; 184 __u32 count_format_types; 185 __u64 format_type_ptr; 186 }; 187 struct drm_mode_get_plane_res { 188 __u64 plane_id_ptr; 189 __u32 count_planes; 190 }; 191 #define DRM_MODE_ENCODER_NONE 0 192 #define DRM_MODE_ENCODER_DAC 1 193 #define DRM_MODE_ENCODER_TMDS 2 194 #define DRM_MODE_ENCODER_LVDS 3 195 #define DRM_MODE_ENCODER_TVDAC 4 196 #define DRM_MODE_ENCODER_VIRTUAL 5 197 #define DRM_MODE_ENCODER_DSI 6 198 #define DRM_MODE_ENCODER_DPMST 7 199 #define DRM_MODE_ENCODER_DPI 8 200 struct drm_mode_get_encoder { 201 __u32 encoder_id; 202 __u32 encoder_type; 203 __u32 crtc_id; 204 __u32 possible_crtcs; 205 __u32 possible_clones; 206 }; 207 enum drm_mode_subconnector { 208 DRM_MODE_SUBCONNECTOR_Automatic = 0, 209 DRM_MODE_SUBCONNECTOR_Unknown = 0, 210 DRM_MODE_SUBCONNECTOR_DVID = 3, 211 DRM_MODE_SUBCONNECTOR_DVIA = 4, 212 DRM_MODE_SUBCONNECTOR_Composite = 5, 213 DRM_MODE_SUBCONNECTOR_SVIDEO = 6, 214 DRM_MODE_SUBCONNECTOR_Component = 8, 215 DRM_MODE_SUBCONNECTOR_SCART = 9, 216 }; 217 #define DRM_MODE_CONNECTOR_Unknown 0 218 #define DRM_MODE_CONNECTOR_VGA 1 219 #define DRM_MODE_CONNECTOR_DVII 2 220 #define DRM_MODE_CONNECTOR_DVID 3 221 #define DRM_MODE_CONNECTOR_DVIA 4 222 #define DRM_MODE_CONNECTOR_Composite 5 223 #define DRM_MODE_CONNECTOR_SVIDEO 6 224 #define DRM_MODE_CONNECTOR_LVDS 7 225 #define DRM_MODE_CONNECTOR_Component 8 226 #define DRM_MODE_CONNECTOR_9PinDIN 9 227 #define DRM_MODE_CONNECTOR_DisplayPort 10 228 #define DRM_MODE_CONNECTOR_HDMIA 11 229 #define DRM_MODE_CONNECTOR_HDMIB 12 230 #define DRM_MODE_CONNECTOR_TV 13 231 #define DRM_MODE_CONNECTOR_eDP 14 232 #define DRM_MODE_CONNECTOR_VIRTUAL 15 233 #define DRM_MODE_CONNECTOR_DSI 16 234 #define DRM_MODE_CONNECTOR_DPI 17 235 #define DRM_MODE_CONNECTOR_WRITEBACK 18 236 struct drm_mode_get_connector { 237 __u64 encoders_ptr; 238 __u64 modes_ptr; 239 __u64 props_ptr; 240 __u64 prop_values_ptr; 241 __u32 count_modes; 242 __u32 count_props; 243 __u32 count_encoders; 244 __u32 encoder_id; 245 __u32 connector_id; 246 __u32 connector_type; 247 __u32 connector_type_id; 248 __u32 connection; 249 __u32 mm_width; 250 __u32 mm_height; 251 __u32 subpixel; 252 __u32 pad; 253 }; 254 #define DRM_MODE_PROP_PENDING (1<<0) 255 #define DRM_MODE_PROP_RANGE (1<<1) 256 #define DRM_MODE_PROP_IMMUTABLE (1<<2) 257 #define DRM_MODE_PROP_ENUM (1<<3) 258 #define DRM_MODE_PROP_BLOB (1<<4) 259 #define DRM_MODE_PROP_BITMASK (1<<5) 260 #define DRM_MODE_PROP_LEGACY_TYPE ( \ 261 DRM_MODE_PROP_RANGE | \ 262 DRM_MODE_PROP_ENUM | \ 263 DRM_MODE_PROP_BLOB | \ 264 DRM_MODE_PROP_BITMASK) 265 #define DRM_MODE_PROP_EXTENDED_TYPE 0x0000ffc0 266 #define DRM_MODE_PROP_TYPE(n) ((n) << 6) 267 #define DRM_MODE_PROP_OBJECT DRM_MODE_PROP_TYPE(1) 268 #define DRM_MODE_PROP_SIGNED_RANGE DRM_MODE_PROP_TYPE(2) 269 #define DRM_MODE_PROP_ATOMIC 0x80000000 270 struct drm_mode_property_enum { 271 __u64 value; 272 char name[DRM_PROP_NAME_LEN]; 273 }; 274 struct drm_mode_get_property { 275 __u64 values_ptr; 276 __u64 enum_blob_ptr; 277 __u32 prop_id; 278 __u32 flags; 279 char name[DRM_PROP_NAME_LEN]; 280 __u32 count_values; 281 282 __u32 count_enum_blobs; 283 }; 284 struct drm_mode_connector_set_property { 285 __u64 value; 286 __u32 prop_id; 287 __u32 connector_id; 288 }; 289 #define DRM_MODE_OBJECT_CRTC 0xcccccccc 290 #define DRM_MODE_OBJECT_CONNECTOR 0xc0c0c0c0 291 #define DRM_MODE_OBJECT_ENCODER 0xe0e0e0e0 292 #define DRM_MODE_OBJECT_MODE 0xdededede 293 #define DRM_MODE_OBJECT_PROPERTY 0xb0b0b0b0 294 #define DRM_MODE_OBJECT_FB 0xfbfbfbfb 295 #define DRM_MODE_OBJECT_BLOB 0xbbbbbbbb 296 #define DRM_MODE_OBJECT_PLANE 0xeeeeeeee 297 #define DRM_MODE_OBJECT_ANY 0 298 struct drm_mode_obj_get_properties { 299 __u64 props_ptr; 300 __u64 prop_values_ptr; 301 __u32 count_props; 302 __u32 obj_id; 303 __u32 obj_type; 304 }; 305 struct drm_mode_obj_set_property { 306 __u64 value; 307 __u32 prop_id; 308 __u32 obj_id; 309 __u32 obj_type; 310 }; 311 struct drm_mode_get_blob { 312 __u32 blob_id; 313 __u32 length; 314 __u64 data; 315 }; 316 struct drm_mode_fb_cmd { 317 __u32 fb_id; 318 __u32 width; 319 __u32 height; 320 __u32 pitch; 321 __u32 bpp; 322 __u32 depth; 323 324 __u32 handle; 325 }; 326 #define DRM_MODE_FB_INTERLACED (1<<0) 327 #define DRM_MODE_FB_MODIFIERS (1<<1) 328 struct drm_mode_fb_cmd2 { 329 __u32 fb_id; 330 __u32 width; 331 __u32 height; 332 __u32 pixel_format; 333 __u32 flags; 334 335 __u32 handles[4]; 336 __u32 pitches[4]; 337 __u32 offsets[4]; 338 __u64 modifier[4]; 339 }; 340 #define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01 341 #define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02 342 #define DRM_MODE_FB_DIRTY_FLAGS 0x03 343 #define DRM_MODE_FB_DIRTY_MAX_CLIPS 256 344 struct drm_mode_fb_dirty_cmd { 345 __u32 fb_id; 346 __u32 flags; 347 __u32 color; 348 __u32 num_clips; 349 __u64 clips_ptr; 350 }; 351 struct drm_mode_mode_cmd { 352 __u32 connector_id; 353 struct drm_mode_modeinfo mode; 354 }; 355 #define DRM_MODE_CURSOR_BO 0x01 356 #define DRM_MODE_CURSOR_MOVE 0x02 357 #define DRM_MODE_CURSOR_FLAGS 0x03 358 struct drm_mode_cursor { 359 __u32 flags; 360 __u32 crtc_id; 361 __s32 x; 362 __s32 y; 363 __u32 width; 364 __u32 height; 365 366 __u32 handle; 367 }; 368 struct drm_mode_cursor2 { 369 __u32 flags; 370 __u32 crtc_id; 371 __s32 x; 372 __s32 y; 373 __u32 width; 374 __u32 height; 375 376 __u32 handle; 377 __s32 hot_x; 378 __s32 hot_y; 379 }; 380 struct drm_mode_crtc_lut { 381 __u32 crtc_id; 382 __u32 gamma_size; 383 384 __u64 red; 385 __u64 green; 386 __u64 blue; 387 }; 388 struct drm_color_ctm { 389 390 __u64 matrix[9]; 391 }; 392 struct drm_color_lut { 393 394 __u16 red; 395 __u16 green; 396 __u16 blue; 397 __u16 reserved; 398 }; 399 #define DRM_MODE_PAGE_FLIP_EVENT 0x01 400 #define DRM_MODE_PAGE_FLIP_ASYNC 0x02 401 #define DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE 0x4 402 #define DRM_MODE_PAGE_FLIP_TARGET_RELATIVE 0x8 403 #define DRM_MODE_PAGE_FLIP_TARGET (DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE | \ 404 DRM_MODE_PAGE_FLIP_TARGET_RELATIVE) 405 #define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT | \ 406 DRM_MODE_PAGE_FLIP_ASYNC | \ 407 DRM_MODE_PAGE_FLIP_TARGET) 408 struct drm_mode_crtc_page_flip { 409 __u32 crtc_id; 410 __u32 fb_id; 411 __u32 flags; 412 __u32 reserved; 413 __u64 user_data; 414 }; 415 struct drm_mode_crtc_page_flip_target { 416 __u32 crtc_id; 417 __u32 fb_id; 418 __u32 flags; 419 __u32 sequence; 420 __u64 user_data; 421 }; 422 struct drm_mode_create_dumb { 423 __u32 height; 424 __u32 width; 425 __u32 bpp; 426 __u32 flags; 427 428 __u32 handle; 429 __u32 pitch; 430 __u64 size; 431 }; 432 struct drm_mode_map_dumb { 433 434 __u32 handle; 435 __u32 pad; 436 437 __u64 offset; 438 }; 439 struct drm_mode_destroy_dumb { 440 __u32 handle; 441 }; 442 #define DRM_MODE_ATOMIC_TEST_ONLY 0x0100 443 #define DRM_MODE_ATOMIC_NONBLOCK 0x0200 444 #define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400 445 #define DRM_MODE_ATOMIC_FLAGS (\ 446 DRM_MODE_PAGE_FLIP_EVENT |\ 447 DRM_MODE_PAGE_FLIP_ASYNC |\ 448 DRM_MODE_ATOMIC_TEST_ONLY |\ 449 DRM_MODE_ATOMIC_NONBLOCK |\ 450 DRM_MODE_ATOMIC_ALLOW_MODESET) 451 struct drm_mode_atomic { 452 __u32 flags; 453 __u32 count_objs; 454 __u64 objs_ptr; 455 __u64 count_props_ptr; 456 __u64 props_ptr; 457 __u64 prop_values_ptr; 458 __u64 reserved; 459 __u64 user_data; 460 }; 461 struct drm_format_modifier_blob { 462 #define FORMAT_BLOB_CURRENT 1 463 464 __u32 version; 465 466 __u32 flags; 467 468 __u32 count_formats; 469 470 __u32 formats_offset; 471 472 __u32 count_modifiers; 473 474 __u32 modifiers_offset; 475 476 477 }; 478 struct drm_format_modifier { 479 480 __u64 formats; 481 __u32 offset; 482 __u32 pad; 483 484 __u64 modifier; 485 }; 486 struct drm_mode_create_blob { 487 488 __u64 data; 489 490 __u32 length; 491 492 __u32 blob_id; 493 }; 494 struct drm_mode_destroy_blob { 495 __u32 blob_id; 496 }; 497 struct drm_mode_create_lease { 498 499 __u64 object_ids; 500 501 __u32 object_count; 502 503 __u32 flags; 504 505 __u32 lessee_id; 506 507 __u32 fd; 508 }; 509 struct drm_mode_list_lessees { 510 511 __u32 count_lessees; 512 __u32 pad; 513 514 __u64 lessees_ptr; 515 }; 516 struct drm_mode_get_lease { 517 518 __u32 count_objects; 519 __u32 pad; 520 521 __u64 objects_ptr; 522 }; 523 struct drm_mode_revoke_lease { 524 525 __u32 lessee_id; 526 }; 527 #if defined(__cplusplus) 528 } 529 #endif 530 #endif 531