1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "ac_nir.h"
25
26 bool
ac_nir_lower_indirect_derefs(nir_shader * shader,enum chip_class chip_class)27 ac_nir_lower_indirect_derefs(nir_shader *shader,
28 enum chip_class chip_class)
29 {
30 bool progress = false;
31
32 /* Lower large variables to scratch first so that we won't bloat the
33 * shader by generating large if ladders for them. We later lower
34 * scratch to alloca's, assuming LLVM won't generate VGPR indexing.
35 */
36 NIR_PASS(progress, shader, nir_lower_vars_to_scratch, nir_var_function_temp, 256,
37 glsl_get_natural_size_align_bytes);
38
39 /* LLVM doesn't support VGPR indexing on GFX9. */
40 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
41
42 /* TODO: Indirect indexing of GS inputs is unimplemented.
43 *
44 * TCS and TES load inputs directly from LDS or offchip memory, so
45 * indirect indexing is trivial.
46 */
47 nir_variable_mode indirect_mask = 0;
48 if (shader->info.stage == MESA_SHADER_GEOMETRY ||
49 (shader->info.stage != MESA_SHADER_TESS_CTRL && shader->info.stage != MESA_SHADER_TESS_EVAL &&
50 !llvm_has_working_vgpr_indexing)) {
51 indirect_mask |= nir_var_shader_in;
52 }
53 if (!llvm_has_working_vgpr_indexing && shader->info.stage != MESA_SHADER_TESS_CTRL)
54 indirect_mask |= nir_var_shader_out;
55
56 /* TODO: We shouldn't need to do this, however LLVM isn't currently
57 * smart enough to handle indirects without causing excess spilling
58 * causing the gpu to hang.
59 *
60 * See the following thread for more details of the problem:
61 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
62 */
63 indirect_mask |= nir_var_function_temp;
64
65 progress |= nir_lower_indirect_derefs(shader, indirect_mask, UINT32_MAX);
66 return progress;
67 }
68