1 /*
2 * Copyright © 2020 Google, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <err.h>
25 #include <stdio.h>
26
27 #include "ir3.h"
28 #include "ir3_assembler.h"
29 #include "ir3_shader.h"
30
31 /*
32 * A test for delay-slot calculation. Each test specifies ir3 assembly
33 * for one or more instructions and the last instruction that consumes
34 * the previously produced values. And the expected number of delay
35 * slots that would be needed before that last instruction. Any source
36 * registers in the last instruction which are not written in a previous
37 * instruction are not counted.
38 */
39
40 /* clang-format off */
41 #define TEST(n, ...) { # __VA_ARGS__, n }
42 /* clang-format on */
43
44 static const struct test {
45 const char *asmstr;
46 unsigned expected_delay;
47 } tests[] = {
48 /* clang-format off */
49 TEST(6,
50 add.f r0.x, r2.x, r2.y
51 rsq r0.x, r0.x
52 ),
53 TEST(3,
54 mov.f32f32 r0.x, c0.x
55 mov.f32f32 r0.y, c0.y
56 add.f r0.x, r0.x, r0.y
57 ),
58 TEST(2,
59 mov.f32f32 r0.x, c0.x
60 mov.f32f32 r0.y, c0.y
61 mov.f32f32 r0.z, c0.z
62 mad.f32 r0.x, r0.x, r0.y, r0.z
63 ),
64 TEST(2,
65 mov.f32f32 r0.x, c0.x
66 mov.f32f32 r0.y, c0.y
67 (rpt1)add.f r0.x, (r)r0.x, (r)c0.x
68 ),
69 TEST(2,
70 (rpt1)mov.f32f32 r0.x, c0.x
71 (rpt1)add.f r0.x, (r)r0.x, (r)c0.x
72 ),
73 TEST(3,
74 mov.f32f32 r0.y, c0.y
75 mov.f32f32 r0.x, c0.x
76 (rpt1)add.f r0.x, (r)r0.x, (r)c0.x
77 ),
78 TEST(1,
79 (rpt2)mov.f32f32 r0.x, (r)c0.x
80 add.f r0.x, r0.x, c0.x
81 ),
82 TEST(2,
83 (rpt2)mov.f32f32 r0.x, (r)c0.x
84 add.f r0.x, r0.x, r0.y
85 ),
86 TEST(2,
87 (rpt1)mov.f32f32 r0.x, (r)c0.x
88 (rpt1)add.f r0.x, (r)r0.x, c0.x
89 ),
90 TEST(1,
91 (rpt1)mov.f32f32 r0.y, (r)c0.x
92 (rpt1)add.f r0.x, (r)r0.x, c0.x
93 ),
94 TEST(3,
95 (rpt1)mov.f32f32 r0.x, (r)c0.x
96 (rpt1)add.f r0.x, (r)r0.y, c0.x
97 ),
98 /* clang-format on */
99 };
100
101 static struct ir3_shader *
parse_asm(struct ir3_compiler * c,const char * asmstr)102 parse_asm(struct ir3_compiler *c, const char *asmstr)
103 {
104 struct ir3_kernel_info info = {};
105 FILE *in = fmemopen((void *)asmstr, strlen(asmstr), "r");
106 struct ir3_shader *shader = ir3_parse_asm(c, &info, in);
107
108 fclose(in);
109
110 if (!shader)
111 errx(-1, "assembler failed");
112
113 return shader;
114 }
115
116 /**
117 * ir3_delay_calc_* relies on the src/dst wrmask being correct even for ALU
118 * instructions, so this sets it here.
119 *
120 * Note that this is not clever enough to know how many src/dst there are
121 * for various tex/mem instructions. But the rules for tex consuming alu
122 * are the same as sfu consuming alu.
123 */
124 static void
fixup_wrmask(struct ir3 * ir)125 fixup_wrmask(struct ir3 *ir)
126 {
127 struct ir3_block *block = ir3_start_block(ir);
128
129 foreach_instr_safe (instr, &block->instr_list) {
130 instr->dsts[0]->wrmask = MASK(instr->repeat + 1);
131 foreach_src (reg, instr) {
132 if (reg->flags & (IR3_REG_CONST | IR3_REG_IMMED))
133 continue;
134
135 if (reg->flags & IR3_REG_R)
136 reg->wrmask = MASK(instr->repeat + 1);
137 else
138 reg->wrmask = 1;
139 }
140 }
141 }
142
143 int
main(int argc,char ** argv)144 main(int argc, char **argv)
145 {
146 struct ir3_compiler *c;
147 int result = 0;
148
149 struct fd_dev_id dev_id = {
150 .gpu_id = 630,
151 };
152
153 c = ir3_compiler_create(NULL, &dev_id, false);
154
155 for (int i = 0; i < ARRAY_SIZE(tests); i++) {
156 const struct test *test = &tests[i];
157 struct ir3_shader *shader = parse_asm(c, test->asmstr);
158 struct ir3 *ir = shader->variants->ir;
159
160 fixup_wrmask(ir);
161
162 ir3_debug_print(ir, "AFTER fixup_wrmask");
163
164 struct ir3_block *block =
165 list_first_entry(&ir->block_list, struct ir3_block, node);
166 struct ir3_instruction *last = NULL;
167
168 foreach_instr_rev (instr, &block->instr_list) {
169 if (is_meta(instr))
170 continue;
171 last = instr;
172 break;
173 }
174
175 /* The delay calc is expecting the instr to not yet be added to the
176 * block, so remove it from the block so that it doesn't get counted
177 * in the distance from assigner:
178 */
179 list_delinit(&last->node);
180
181 unsigned n = ir3_delay_calc_exact(block, last, true);
182
183 if (n != test->expected_delay) {
184 printf("%d: FAIL: Expected delay %u, but got %u, for:\n%s\n", i,
185 test->expected_delay, n, test->asmstr);
186 result = -1;
187 } else {
188 printf("%d: PASS\n", i);
189 }
190
191 ir3_shader_destroy(shader);
192 }
193
194 ir3_compiler_destroy(c);
195
196 return result;
197 }
198