1<?xml version="1.0" encoding="UTF-8"?> 2<!-- 3Copyright © 2020 Google, Inc. 4 5Permission is hereby granted, free of charge, to any person obtaining a 6copy of this software and associated documentation files (the "Software"), 7to deal in the Software without restriction, including without limitation 8the rights to use, copy, modify, merge, publish, distribute, sublicense, 9and/or sell copies of the Software, and to permit persons to whom the 10Software is furnished to do so, subject to the following conditions: 11 12The above copyright notice and this permission notice (including the next 13paragraph) shall be included in all copies or substantial portions of the 14Software. 15 16THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22SOFTWARE. 23 --> 24 25<isa> 26 27<!-- 28 Cat6 Instructions: load/store/atomic instructions 29 --> 30 31<bitset name="#instruction-cat6" extends="#instruction"> 32 <field pos="59" name="JP" type="bool" display="(jp)"/> 33 <field pos="60" name="SY" type="bool" display="(sy)"/> 34 <pattern low="61" high="63">110</pattern> <!-- cat6 --> 35 <encode> 36 <map name="TYPE">src->cat6.type</map> 37 </encode> 38</bitset> 39 40<bitset name="#instruction-cat6-a3xx" extends="#instruction-cat6"> 41 <field name="TYPE" low="49" high="51" type="#type"/> 42 <!-- TODO pull more fields up to this level, when they are common across sub-encodings --> 43</bitset> 44 45<bitset name="#instruction-cat6-ldg" extends="#instruction-cat6-a3xx"> 46 <pattern pos="0" >1</pattern> 47 <field low="14" high="21" name="SRC1" type="#reg-gpr"/> 48 <pattern pos="23" >1</pattern> 49 <field low="24" high="31" name="SIZE" type="uint"/> 50 <field low="32" high="39" name="DST" type="#reg-gpr"/> 51 <pattern low="40" high="48">xxxxxxxxx</pattern> 52 <pattern low="52" high="53">00</pattern> 53 <pattern low="54" high="58">00000</pattern> <!-- OPC --> 54</bitset> 55 56<bitset name="ldg" extends="#instruction-cat6-ldg"> 57 <doc> 58 LoaD Global 59 </doc> 60 61 <display> 62 {SY}{JP}{NAME}.{TYPE} {DST}, g[{SRC1}{OFF}], {SIZE} 63 </display> 64 65 <field low="1" high="13" name="OFF" type="offset"/> 66 <pattern pos="22" >0</pattern> <!-- Imm offset ldg form --> 67 68 <encode> 69 <map name="OFF">src->srcs[1]->iim_val</map> 70 <map name="SIZE">src->srcs[2]->uim_val</map> 71 </encode> 72</bitset> 73 74<bitset name="ldg.a" extends="#instruction-cat6-ldg"> 75 <doc> 76 LoaD Global 77 </doc> 78 79 <gen min="600"/> 80 81 <display> 82 {SY}{JP}{NAME}.{TYPE} {DST}, g[{SRC1}+({SRC2}{OFF})<<{SRC2_BYTE_SHIFT}], {SIZE} 83 </display> 84 85 <override> 86 <display> 87 {SY}{JP}{NAME}.{TYPE} {DST}, g[{SRC1}+{SRC2}<<{SRC2_BYTE_SHIFT}{OFF}<<2], {SIZE} 88 </display> 89 <expr>{SRC2_ADD_DWORD_SHIFT} > 0</expr> 90 </override> 91 92 <field low="1" high="8" name="SRC2" type="#reg-gpr"/> 93 <field low="9" high="10" name="OFF" type="uoffset"/> 94 <assert pos="11" >0</assert> 95 <field low="12" high="13" name="SRC2_ADD_DWORD_SHIFT" type="uint"/> 96 <pattern pos="22" >1</pattern> <!-- Reg offset ldg form --> 97 98 <derived name="SRC2_BYTE_SHIFT" width="3" type="uint"> 99 <expr>{SRC2_ADD_DWORD_SHIFT} + 2</expr> 100 </derived> 101 102 <encode> 103 <map name="SRC2">src->srcs[1]</map> 104 <map name="SRC2_ADD_DWORD_SHIFT">src->srcs[2]->uim_val</map> 105 <map name="OFF">src->srcs[3]->uim_val</map> 106 <map name="SIZE">src->srcs[4]->uim_val</map> 107 </encode> 108</bitset> 109 110<bitset name="#instruction-cat6-stg" extends="#instruction-cat6-a3xx"> 111 <pattern pos="0" >x</pattern> 112 <field low="1" high="8" name="SRC3" type="#reg-gpr"/> 113 <pattern low="14" high="21">xxxxxxxx</pattern> 114 <pattern low="22" high="23">1x</pattern> 115 <field low="24" high="31" name="SIZE" type="uint"/> 116 <field pos="40" name="DST_OFF" type="bool"/> 117 <field low="41" high="48" name="SRC1" type="#reg-gpr"/> 118 <pattern pos="53" >x</pattern> 119 <pattern low="54" high="58">00011</pattern> <!-- OPC --> 120 121 <encode> 122 <map name="DST_OFF" force="true">1</map> 123 </encode> 124</bitset> 125 126<bitset name="stg" extends="#instruction-cat6-stg"> 127 <doc> 128 STore Global 129 </doc> 130 131 <display> 132 {SY}{JP}{NAME}.{TYPE} g[{SRC1}{OFF}], {SRC3}, {SIZE} 133 </display> 134 135 <derived name="OFF" width="13" type="offset"> 136 <expr>({OFF_HI} << 8) | {OFF_LO}</expr> 137 </derived> 138 139 <field low="9" high="13" name="OFF_HI" type="uint"/> 140 <field low="32" high="39" name="OFF_LO" type="uint"/> 141 <pattern pos="52" >0</pattern> <!-- Imm offset stg form --> 142 143 <encode> 144 <map name="OFF_LO">src->srcs[1]->iim_val</map> 145 <map name="OFF_HI">src->srcs[1]->iim_val >> 8</map> 146 <map name="SRC3">src->srcs[2]</map> 147 <map name="SIZE">src->srcs[3]->uim_val</map> 148 </encode> 149</bitset> 150 151<bitset name="stg.a" extends="#instruction-cat6-stg"> 152 <doc> 153 STore Global 154 </doc> 155 156 <gen min="600"/> 157 158 <display> 159 {SY}{JP}{NAME}.{TYPE} g[{SRC1}+({SRC2}{OFF})<<{DST_BYTE_SHIFT}], {SRC3}, {SIZE} 160 </display> 161 162 <override> 163 <display> 164 {SY}{JP}{NAME}.{TYPE} g[{SRC1}+{SRC2}<<{DST_BYTE_SHIFT}{OFF}<<2], {SRC3}, {SIZE} 165 </display> 166 <expr>{SRC2_ADD_DWORD_SHIFT} > 0</expr> 167 </override> 168 169 <derived name="DST_BYTE_SHIFT" width="3" type="uint"> 170 <expr>{SRC2_ADD_DWORD_SHIFT} + 2</expr> 171 </derived> 172 173 <field low="9" high="10" name="OFF" type="uoffset"/> 174 <assert pos="11" >0</assert> 175 <field low="12" high="13" name="SRC2_ADD_DWORD_SHIFT" type="uint"/> 176 <field low="32" high="39" name="SRC2" type="#reg-gpr"/> 177 <pattern pos="52" >1</pattern> <!-- Reg offset stg form --> 178 179 <encode> 180 <map name="SRC2">src->srcs[1]</map> 181 <map name="SRC2_ADD_DWORD_SHIFT">src->srcs[2]->uim_val</map> 182 <map name="OFF">src->srcs[3]->uim_val</map> 183 <map name="SRC3">src->srcs[4]</map> 184 <map name="SIZE">src->srcs[5]->uim_val</map> 185 </encode> 186</bitset> 187 188<bitset name="#instruction-cat6-a3xx-ld" extends="#instruction-cat6-a3xx"> 189 <pattern pos="0" >1</pattern> 190 <field low="1" high="13" name="OFF" type="offset"/> 191 <field low="14" high="21" name="SRC" type="#reg-gpr"/> 192 <pattern pos="22" >x</pattern> 193 <pattern pos="23" >1</pattern> 194 <field low="24" high="31" name="SIZE" type="uint"/> 195 <field low="32" high="39" name="DST" type="#reg-gpr"/> 196 <pattern low="40" high="48">xxxxxxxxx</pattern> 197 <pattern low="52" high="53">xx</pattern> 198 <encode> 199 <map name="OFF">src->srcs[1]->uim_val</map> 200 <map name="SRC">src->srcs[0]</map> 201 <map name="SIZE">src->srcs[2]->uim_val</map> 202 </encode> 203</bitset> 204 205<bitset name="ldl" extends="#instruction-cat6-a3xx-ld"> 206 <doc> 207 LoaD Local 208 </doc> 209 <display> 210 {SY}{JP}{NAME}.{TYPE} {DST}, l[{SRC}{OFF}], {SIZE} 211 </display> 212 <pattern low="54" high="58">00001</pattern> <!-- OPC --> 213</bitset> 214 215<bitset name="ldp" extends="#instruction-cat6-a3xx-ld"> 216 <doc> 217 LoaD Private 218 </doc> 219 <display> 220 {SY}{JP}{NAME}.{TYPE} {DST}, p[{SRC}{OFF}], {SIZE} 221 </display> 222 <pattern low="54" high="58">00010</pattern> <!-- OPC --> 223</bitset> 224 225<bitset name="ldlw" extends="#instruction-cat6-a3xx-ld"> 226 <doc> 227 LoaD Local (variant used for passing data between geom stages) 228 </doc> 229 <display> 230 {SY}{JP}{NAME}.{TYPE} {DST}, l[{SRC}{OFF}], {SIZE} 231 </display> 232 <pattern low="54" high="58">01010</pattern> <!-- OPC --> 233</bitset> 234 235<bitset name="ldlv" extends="#instruction-cat6-a3xx"> 236 <doc> 237 LoaD Local Varying - read directly from varying storage 238 </doc> 239 <display> 240 {SY}{JP}{NAME}.{TYPE} {DST}, l[{OFF}], {SIZE} 241 </display> 242 <pattern pos="0" >0</pattern> 243 <field low="1" high="13" name="OFF" type="uint"/> 244 <pattern low="14" high="21">xxxxxxxx</pattern> <!-- SRC --> 245 <pattern low="22" high="23">11</pattern> 246 <field low="24" high="31" name="SIZE" type="uint"/> 247 <field low="32" high="39" name="DST" type="#reg-gpr"/> 248 <pattern low="40" high="48">xxxxxxxxx</pattern> 249 <pattern low="52" high="53">xx</pattern> 250 <pattern low="54" high="58">11111</pattern> <!-- OPC --> 251 <encode> 252 <map name="SIZE">src->srcs[1]->uim_val</map> 253 <map name="OFF">src->srcs[0]->uim_val</map> 254 </encode> 255</bitset> 256 257<bitset name="#instruction-cat6-a3xx-st" extends="#instruction-cat6-a3xx"> 258 <derived name="OFF" width="13" type="offset"> 259 <expr>({OFF_HI} << 8) | {OFF_LO}</expr> 260 </derived> 261 262 <field low="1" high="8" name="SRC" type="#reg-gpr"/> 263 <field low="9" high="13" name="OFF_HI" type="uint"/> 264 <pattern low="14" high="22">xxxxxxxxx</pattern> 265 <pattern pos="23" >1</pattern> 266 <field low="24" high="31" name="SIZE" type="uint"/> 267 <field low="32" high="39" name="OFF_LO" type="uint"/> 268 <pattern pos="40" >1</pattern> 269 <field low="41" high="48" name="DST" type="#reg-gpr"/> 270 <pattern low="52" high="53">xx</pattern> 271 <encode> 272 <!-- 273 TODO get rid of dst_offset and use a normal (potentially 274 immed) reg.. for now match the existing ir3 until we can 275 drop the old packed-struct encoding 276 --> 277 <map name="OFF_HI">src->cat6.dst_offset >> 8</map> 278 <map name="OFF_LO">src->cat6.dst_offset & 0xff</map> 279 <map name="SRC">src->srcs[1]</map> 280 <map name="DST">src->srcs[0]</map>" 281 <map name="SIZE">src->srcs[2]->uim_val</map> 282 </encode> 283</bitset> 284 285<bitset name="stl" extends="#instruction-cat6-a3xx-st"> 286 <doc> 287 STore Local 288 </doc> 289 <display> 290 {SY}{JP}{NAME}.{TYPE} l[{DST}{OFF}], {SRC}, {SIZE} 291 </display> 292 <pattern pos="0" >x</pattern> 293 <pattern low="54" high="58">00100</pattern> <!-- OPC --> 294</bitset> 295 296<bitset name="stp" extends="#instruction-cat6-a3xx-st"> 297 <doc> 298 STore Private 299 </doc> 300 <display> 301 {SY}{JP}{NAME}.{TYPE} p[{DST}{OFF}], {SRC}, {SIZE} 302 </display> 303 <pattern pos="0" >0</pattern> <!-- SRC_OFF --> 304 <pattern low="54" high="58">00101</pattern> <!-- OPC --> 305</bitset> 306 307<bitset name="stlw" extends="#instruction-cat6-a3xx-st"> 308 <doc> 309 STore Local (variant used for passing data between geom stages) 310 </doc> 311 <display> 312 {SY}{JP}{NAME}.{TYPE} l[{DST}{OFF}], {SRC}, {SIZE} 313 </display> 314 <pattern pos="0" >x</pattern> 315 <pattern low="54" high="58">01011</pattern> <!-- OPC --> 316</bitset> 317 318<bitset name="stc" extends="#instruction-cat6-a3xx"> 319 <doc> 320 STore Const - used for shader prolog (between shps and shpe) 321 to store "uniform folded" values into CONST file 322 323 NOTE: TYPE field actually seems to be set to different 324 values (ie f32 vs u32), but I *think* it does not matter. 325 (There is SP_MODE_CONTROL.CONSTANT_DEMOTION_ENABLE, but 326 I think float results are already converted to 32b) 327 328 NOTE: this could be the "old" encoding, although it 329 would conflict with stgb from earlier gens 330 </doc> 331 <display> 332 {SY}{JP}{NAME} c[{DST}], {SRC}, {SIZE} 333 </display> 334 <gen min="600"/> 335 <pattern pos="0" >x</pattern> 336 <field low="1" high="8" name="SRC" type="#reg-gpr"/> 337 <pattern low="9" high="22">xxxxxxxxxxxxxx</pattern> 338 <pattern pos="23" >1</pattern> 339 <field low="24" high="26" name="SIZE" type="uint"/> 340 <pattern low="27" high="31">xxxxx</pattern> 341 <field low="32" high="39" name="DST" type="uint"/> 342 <pattern low="40" high="48">xxxxxxxxx</pattern> 343 <pattern low="52" high="53">xx</pattern> 344 <pattern low="54" high="58">11100</pattern> <!-- OPC --> 345 <encode> 346 <map name="DST">src->srcs[0]->uim_val</map> 347 <map name="SRC">src->srcs[1]</map> 348 </encode> 349</bitset> 350 351<bitset name="resinfo" extends="#instruction-cat6-a3xx"> 352 <display> 353 {SY}{JP}{NAME}.{TYPE}.{D}d {DST}, g[{SSBO}] 354 </display> 355 <derived name="D" expr="#cat6-d" type="uint"/> 356 357 <pattern pos="0" >x</pattern> 358 <pattern low="1" high="8" >xxxxxxxx</pattern> <!-- SRC3 --> 359 <field low="9" high="10" name="D_MINUS_ONE" type="uint"/> 360 <pattern pos="11" >x</pattern> <!-- TYPED --> 361 <pattern low="12" high="13">xx</pattern> <!-- TYPE_SIZE --> 362 <pattern low="14" high="21">xxxxxxxx</pattern> <!-- SRC1 --> 363 <pattern pos="22" >x</pattern> <!-- SRC1_IM --> 364 <pattern pos="23" >x</pattern> <!-- SRC2_IM --> 365 <pattern low="24" high="31">xxxxxxxx</pattern> <!-- SRC2 --> 366 <field low="32" high="39" name="DST" type="#reg-gpr"/> 367 <pattern pos="40" >0</pattern> 368 <field low="41" high="48" name="SSBO" type="#cat6-src"> <!-- SSBO/image binding point --> 369 <param name="SSBO_IM" as="SRC_IM"/> 370 </field> 371 <pattern pos="52" >x</pattern> <!-- G --> 372 <field pos="53" name="SSBO_IM" type="bool"/> 373 <pattern low="54" high="58">01111</pattern> <!-- OPC --> 374 <encode> 375 <map name="D_MINUS_ONE">src->cat6.d - 1</map> 376 <map name="SSBO">src->srcs[0]</map> 377 <map name="SSBO_IM">!!(src->srcs[0]->flags & IR3_REG_IMMED)</map> 378 </encode> 379</bitset> 380 381<!-- base pattern for a3xx cat6 ssbo/ibo load/store instructions --> 382<bitset name="#instruction-cat6-a3xx-ibo" extends="#instruction-cat6-a3xx"> 383 <derived name="D" expr="#cat6-d" type="uint"/> 384 <derived name="TYPE_SIZE" expr="#cat6-type-size" type="uint"/> 385 386 <field low="9" high="10" name="D_MINUS_ONE" type="uint"/> 387 <field pos="11" name="TYPED" type="#cat6-typed"/> 388 <field low="12" high="13" name="TYPE_SIZE_MINUS_ONE" type="uint"/> 389 <field low="41" high="48" name="SSBO" type="#cat6-src"> <!-- SSBO/image binding point --> 390 <param name="SSBO_IM" as="SRC_IM"/> 391 </field> 392 <pattern pos="52" >x</pattern> <!-- G --> 393 <field pos="53" name="SSBO_IM" type="bool"/> 394 <encode> 395 <map name="D_MINUS_ONE">src->cat6.d - 1</map> 396 <map name="TYPED">src</map> 397 <map name="TYPE_SIZE_MINUS_ONE">src->cat6.iim_val - 1</map> 398 <map name="SSBO">src->srcs[0]</map> 399 <map name="SSBO_IM">!!(src->srcs[0]->flags & IR3_REG_IMMED)</map> 400 </encode> 401</bitset> 402 403<bitset name="#instruction-cat6-a3xx-ibo-load" extends="#instruction-cat6-a3xx-ibo"> 404 <display> 405 {SY}{JP}{NAME}.{TYPED}.{D}d.{TYPE}.{TYPE_SIZE} {DST}, g[{SSBO}], {SRC1}, {SRC2} 406 </display> 407 <gen max="599"/> 408 409 <pattern low="1" high="8" >xxxxxxxx</pattern> <!-- SRC3 --> 410 <field low="14" high="21" name="SRC1" type="#cat6-src"> 411 <param name="SRC1_IM" as="SRC_IM"/> 412 </field> 413 <field pos="22" name="SRC1_IM" type="bool"/> 414 <field pos="23" name="SRC2_IM" type="bool"/> 415 <field low="24" high="31" name="SRC2" type="#cat6-src"> 416 <param name="SRC2_IM" as="SRC_IM"/> 417 </field> 418 <field low="32" high="39" name="DST" type="#reg-gpr"/> 419 <pattern pos="40" >x</pattern> <!-- .rck --> 420 <encode> 421 <map name="SRC1">src->srcs[1]</map> 422 <map name="SRC1_IM">!!(src->srcs[1]->flags & IR3_REG_IMMED)</map> 423 <map name="SRC2">src->srcs[2]</map> 424 <map name="SRC2_IM">!!(src->srcs[2]->flags & IR3_REG_IMMED)</map> 425 </encode> 426</bitset> 427 428<bitset name="ldgb" extends="#instruction-cat6-a3xx-ibo-load"> 429 <pattern low="54" high="58">11011</pattern> <!-- OPC --> 430 <pattern pos="0" >x</pattern> <!-- .a --> 431</bitset> 432 433<bitset name="ldib" extends="#instruction-cat6-a3xx-ibo-load"> 434 <pattern low="54" high="58">00110</pattern> <!-- OPC --> 435 <pattern pos="0" >1</pattern> <!-- .a --> 436</bitset> 437 438<bitset name="#instruction-cat6-a3xx-ibo-store" extends="#instruction-cat6-a3xx-ibo"> 439 <display> 440 {SY}{JP}{NAME}.{TYPED}.{D}d.{TYPE}.{TYPE_SIZE} g[{SSBO}], {SRC1}, {SRC2}, {SRC3} 441 </display> 442 <gen max="599"/> 443 444 <pattern pos="0" >1</pattern> <!-- .a --> 445 <field low="1" high="8" name="SRC1" type="#reg-gpr"/> 446 <pattern low="14" high="22">xxxxxxxxx</pattern> 447 <field pos="23" name="SRC2_IM" type="bool"/> 448 <field low="24" high="31" name="SRC2" type="#cat6-src"> 449 <param name="SRC2_IM" as="SRC_IM"/> 450 </field> 451 <field low="32" high="39" name="SRC3" type="#cat6-src"> 452 <param name="SRC3_IM" as="SRC_IM"/> 453 </field> 454 <field pos="40" name="SRC3_IM" type="bool"/> 455 <encode> 456 <map name="SRC1">src->srcs[1]</map> 457 <map name="SRC1_IM">!!(src->srcs[1]->flags & IR3_REG_IMMED)</map> 458 <map name="SRC2">src->srcs[2]</map> 459 <map name="SRC2_IM">!!(src->srcs[2]->flags & IR3_REG_IMMED)</map> 460 <map name="SRC3">src->srcs[3]</map> 461 <map name="SRC3_IM">!!(src->srcs[3]->flags & IR3_REG_IMMED)</map> 462 </encode> 463</bitset> 464 465<bitset name="stgb" extends="#instruction-cat6-a3xx-ibo-store"> 466 <pattern low="54" high="58">11100</pattern> <!-- OPC --> 467</bitset> 468 469<bitset name="stib" extends="#instruction-cat6-a3xx-ibo-store"> 470 <pattern low="54" high="58">11101</pattern> <!-- OPC --> 471</bitset> 472 473<bitset name="#instruction-cat6-a3xx-atomic" extends="#instruction-cat6-a3xx"> 474 <doc> 475 Base for atomic instructions (I think mostly a4xx+, as 476 a3xx didn't have real image/ssbo.. it was all just global). 477 Still used as of a6xx for local. 478 479 NOTE that existing disasm and asm parser expect atomic inc/dec 480 to still have an extra src. For now, match that. 481 </doc> 482 483 <override expr="#cat6-global"> 484 <display> 485 {SY}{JP}{NAME}.{TYPED}.{D}d.{TYPE}.{TYPE_SIZE}.g {DST}, g[{SSBO}], {SRC1}, {SRC2}, {SRC3} 486 </display> 487 <field low="1" high="8" name="SRC3" type="#reg-gpr"/> 488 <field low="41" high="48" name="SSBO" type="#cat6-src"> <!-- SSBO/image binding point --> 489 <param name="SSBO_IM" as="SRC_IM"/> 490 </field> 491 <field pos="53" name="SSBO_IM" type="bool"/> 492 </override> 493 <display> 494 {SY}{JP}{NAME}.{TYPED}.{D}d.{TYPE}.{TYPE_SIZE}.l {DST}, l[{SRC1}], {SRC2} 495 </display> 496 497 <derived name="D" expr="#cat6-d" type="uint"/> 498 <derived name="TYPE_SIZE" expr="#cat6-type-size" type="uint"/> 499 500 <pattern pos="0" >1</pattern> 501 <pattern low="1" high="8" >xxxxxxxx</pattern> <!-- SRC3 --> 502 <field low="9" high="10" name="D_MINUS_ONE" type="uint"/> 503 <field pos="11" name="TYPED" type="#cat6-typed"/> 504 <field low="12" high="13" name="TYPE_SIZE_MINUS_ONE" type="uint"/> 505 <field low="14" high="21" name="SRC1" type="#cat6-src"> 506 <param name="SRC1_IM" as="SRC_IM"/> 507 </field> 508 <field pos="22" name="SRC1_IM" type="bool"/> 509 <field pos="23" name="SRC2_IM" type="bool"/> 510 <field low="24" high="31" name="SRC2" type="#cat6-src"> 511 <param name="SRC2_IM" as="SRC_IM"/> 512 </field> 513 <field low="32" high="39" name="DST" type="#reg-gpr"/> 514 <pattern pos="40" >x</pattern> 515 <assert low="41" high="48">00000000</assert> <!-- SSBO/image binding point --> 516 <field pos="52" name="G" type="bool"/> 517 <assert pos="53" >0</assert> <!-- SSBO_IM --> 518 <encode> 519 <map name="G">!!(src->flags & IR3_INSTR_G)</map> 520 <map name="TYPED">src</map> 521 <map name="D_MINUS_ONE">src->cat6.d - 1</map> 522 <map name="TYPE_SIZE_MINUS_ONE">src->cat6.iim_val - 1</map> 523 <map name="SSBO">src->srcs[0]</map> 524 <map name="SSBO_IM">!!(src->srcs[0]->flags & IR3_REG_IMMED)</map> 525 <map name="SRC1">extract_cat6_SRC(src, 0)</map> 526 <map name="SRC1_IM">!!(extract_cat6_SRC(src, 0)->flags & IR3_REG_IMMED)</map> 527 <map name="SRC2">extract_cat6_SRC(src, 1)</map> 528 <map name="SRC2_IM">!!(extract_cat6_SRC(src, 1)->flags & IR3_REG_IMMED)</map> 529 <map name="SRC3">extract_cat6_SRC(src, 2)</map> 530 <map name="SRC3_IM">!!(extract_cat6_SRC(src, 2)->flags & IR3_REG_IMMED)</map> 531 </encode> 532</bitset> 533 534<bitset name="#instruction-cat6-a3xx-atomic-1src" extends="#instruction-cat6-a3xx-atomic"> 535 <!-- TODO when asm parser is updated, shift display templates, etc, here --> 536</bitset> 537 538<bitset name="#instruction-cat6-a3xx-atomic-2src" extends="#instruction-cat6-a3xx-atomic"> 539 <!-- TODO when asm parser is updated, shift display templates, etc, here --> 540</bitset> 541 542<bitset name="atomic.add" extends="#instruction-cat6-a3xx-atomic-2src"> 543 <pattern low="54" high="58">10000</pattern> <!-- OPC --> 544</bitset> 545 546<bitset name="atomic.sub" extends="#instruction-cat6-a3xx-atomic-2src"> 547 <pattern low="54" high="58">10001</pattern> <!-- OPC --> 548</bitset> 549 550<bitset name="atomic.xchg" extends="#instruction-cat6-a3xx-atomic-2src"> 551 <pattern low="54" high="58">10010</pattern> <!-- OPC --> 552</bitset> 553 554<bitset name="atomic.inc" extends="#instruction-cat6-a3xx-atomic-1src"> 555 <pattern low="54" high="58">10011</pattern> <!-- OPC --> 556</bitset> 557 558<bitset name="atomic.dec" extends="#instruction-cat6-a3xx-atomic-1src"> 559 <pattern low="54" high="58">10100</pattern> <!-- OPC --> 560</bitset> 561 562<bitset name="atomic.cmpxchg" extends="#instruction-cat6-a3xx-atomic-2src"> 563 <pattern low="54" high="58">10101</pattern> <!-- OPC --> 564</bitset> 565 566<bitset name="atomic.min" extends="#instruction-cat6-a3xx-atomic-2src"> 567 <pattern low="54" high="58">10110</pattern> <!-- OPC --> 568</bitset> 569 570<bitset name="atomic.max" extends="#instruction-cat6-a3xx-atomic-2src"> 571 <pattern low="54" high="58">10111</pattern> <!-- OPC --> 572</bitset> 573 574<bitset name="atomic.and" extends="#instruction-cat6-a3xx-atomic-2src"> 575 <pattern low="54" high="58">11000</pattern> <!-- OPC --> 576</bitset> 577 578<bitset name="atomic.or" extends="#instruction-cat6-a3xx-atomic-2src"> 579 <pattern low="54" high="58">11001</pattern> <!-- OPC --> 580</bitset> 581 582<bitset name="atomic.xor" extends="#instruction-cat6-a3xx-atomic-2src"> 583 <pattern low="54" high="58">11010</pattern> <!-- OPC --> 584</bitset> 585 586 587<!-- 588 New a6xx+ encodings for potentially bindless image/ssbo: 589 --> 590 591<bitset name="#instruction-cat6-a6xx" extends="#instruction-cat6"> 592 <doc> 593 Base for new instruction encoding that started being used 594 with a6xx for instructions supporting bindless mode. 595 </doc> 596 <gen min="600"/> 597 598 <derived name="TYPE_SIZE" expr="#cat6-type-size" type="uint"/> 599 600 <field low="1" high="3" name="BASE" type="#cat6-base"> 601 <param name="BINDLESS"/> 602 </field> 603 <pattern low="4" high="5" >00</pattern> 604 <field low="6" high="7" name="MODE" type="#cat6-src-mode"/> 605 <field pos="8" name="BINDLESS" type="bool"/> 606 <field low="12" high="13" name="TYPE_SIZE_MINUS_ONE" type="uint"/> 607 <pattern pos="40" >0</pattern> 608 <pattern low="54" high="58">00000</pattern> 609 <encode> 610 <map name="MODE">extract_cat6_DESC_MODE(src)</map> 611 <map name="TYPE_SIZE_MINUS_ONE">src->cat6.iim_val - 1</map> 612 <map name="BINDLESS">!!(src->flags & IR3_INSTR_B)</map> 613 <map name="BASE">src</map> 614 </encode> 615</bitset> 616 617<bitset name="ldc" extends="#instruction-cat6-a6xx"> 618 <doc> 619 LoaD Constant - UBO load 620 </doc> 621 <override> 622 <!-- TODO.. wtf? --> 623 <expr>{K}</expr> 624 <display> 625 {SY}{JP}{NAME}.{TYPE_SIZE}.k.{MODE}{BASE} c[a1.x], {SRC1}, {SRC2} 626 </display> 627 <field low="32" high="39" name="TYPE_SIZE_MINUS_ONE" type="uint"/> 628 </override> 629 <!-- 630 TODO are these *really* all bindless? Or does that bit have a different 631 meaning? Maybe I don't have enough ldc examples from deqp-glesN 632 --> 633 <display> 634 {SY}{JP}{NAME}.offset{OFFSET}.{TYPE_SIZE}.{MODE}{BASE} {DST}, {SRC1}, {SRC2} 635 </display> 636 <pattern pos="0" >x</pattern> 637 <field low="9" high="10" name="OFFSET" type="uint"/> <!-- D_MINUS_ONE --> 638 <pattern pos="11" >x</pattern> <!-- TYPED --> 639 <pattern low="14" high="19">011110</pattern> <!-- OPC --> 640 <pattern low="20" high="22">1xx</pattern> 641 <field pos="23" name="SRC1_IM" type="bool"/> 642 <derived name="SRC2_IM" expr="#cat6-direct" type="bool"/> 643 <field low="41" high="48" name="SRC2" type="#cat6-src"> 644 <param name="SRC2_IM" as="SRC_IM"/> 645 </field> 646 <field low="24" high="31" name="SRC1" type="#cat6-src"> 647 <param name="SRC1_IM" as="SRC_IM"/> 648 </field> 649 <field low="32" high="39" name="DST" type="#reg-gpr"/> 650 <pattern low="49" high="51">x11</pattern> <!-- TYPE --> 651 <field pos="52" name="K" type="bool"/> 652 <pattern pos="53" >1</pattern> 653 <encode> 654 <map name="K">0</map> <!-- TODO.. once we figure out what this is --> 655 <map name="SRC1_IM">!!(src->srcs[1]->flags & IR3_REG_IMMED)</map> 656 <map name="OFFSET">src->cat6.d</map> 657 <map name="SRC1">src->srcs[1]</map> 658 <map name="SRC2">src->srcs[0]</map> 659 </encode> 660</bitset> 661 662<bitset name="getspid" extends="#instruction-cat6-a6xx"> 663 <doc> 664 GET Shader Processor ID? 665 </doc> 666 <display> 667 {SY}{JP}{NAME}.{TYPE} {DST} 668 </display> 669 670 <pattern pos="0" >0</pattern> 671 <pattern low="9" high="10">xx</pattern> <!-- D_MINUS_ONE --> 672 <pattern pos="11" >x</pattern> <!-- TYPED --> 673 <pattern low="14" high="19">100100</pattern> <!-- OPC --> 674 <pattern low="20" high="23">x1xx</pattern> 675 <pattern low="24" high="31">xxxxxxxx</pattern> <!-- SRC2 --> 676 <field low="32" high="39" name="DST" type="#reg-gpr"/> 677 <pattern low="41" high="48">xxxxxxxx</pattern> <!-- SSBO/image binding point --> 678 <field low="49" high="51" name="TYPE" type="#type"/> 679 <pattern low="52" high="53">1x</pattern> 680</bitset> 681 682<bitset name="getwid" extends="#instruction-cat6-a6xx"> 683 <doc> 684 GET Wavefront ID 685 </doc> 686 <display> 687 {SY}{JP}{NAME}.{TYPE} {DST} 688 </display> 689 690 <pattern pos="0" >0</pattern> 691 <pattern low="9" high="10">xx</pattern> <!-- D_MINUS_ONE --> 692 <pattern pos="11" >x</pattern> <!-- TYPED --> 693 <pattern low="14" high="19">100101</pattern> <!-- OPC --> 694 <pattern low="20" high="23">x1xx</pattern> 695 <pattern low="24" high="31">xxxxxxxx</pattern> <!-- SRC2 --> 696 <field low="32" high="39" name="DST" type="#reg-gpr"/> 697 <pattern low="41" high="48">xxxxxxxx</pattern> <!-- SSBO/image binding point --> 698 <field low="49" high="51" name="TYPE" type="#type"/> 699 <pattern low="52" high="53">1x</pattern> 700</bitset> 701 702<bitset name="resinfo.b" extends="#instruction-cat6-a6xx"> 703 <doc> 704 RESourceINFO - returns image/ssbo dimensions (3 components) 705 </doc> 706 <display> 707 {SY}{JP}{NAME}.{TYPED}.{D}d.{TYPE}.{TYPE_SIZE}.{MODE}{BASE} {DST}, {SSBO} 708 </display> 709 710 <derived name="D" expr="#cat6-d" type="uint"/> 711 <derived name="TRUE" expr="#true" type="bool"/> 712 713 <pattern pos="0" >0</pattern> 714 <field low="9" high="10" name="D_MINUS_ONE" type="uint"/> 715 <field pos="11" name="TYPED" type="#cat6-typed"/> 716 <pattern low="14" high="19">001111</pattern> <!-- OPC --> 717 <pattern low="20" high="23">0110</pattern> 718 <pattern low="24" high="31">xxxxxxxx</pattern> <!-- SRC2 --> 719 <field low="32" high="39" name="DST" type="#reg-gpr"/> 720 <field low="41" high="48" name="SSBO" type="#cat6-src"> <!-- SSBO/image binding point --> 721 <param name="SSBO_IM" as="SRC_IM"/> 722 </field> 723 <derived name="SSBO_IM" expr="#cat6-direct" type="bool"/> 724 <field low="49" high="51" name="TYPE" type="#type"/> 725 <pattern low="52" high="53">1x</pattern> 726 <encode> 727 <map name="D_MINUS_ONE">src->cat6.d - 1</map> 728 <map name="TYPED">src</map> 729 <map name="SSBO">src->srcs[0]</map> 730 <map name="SRC1">src->srcs[1]</map> 731 </encode> 732</bitset> 733 734<bitset name="#instruction-cat6-a6xx-ibo" extends="#instruction-cat6-a6xx"> 735 <doc> 736 IBO (ie. Image/SSBO) instructions 737 </doc> 738 <display> 739 {SY}{JP}{NAME}.{TYPED}.{D}d.{TYPE}.{TYPE_SIZE}.{MODE}{BASE} {SRC1}, {SRC2}, {SSBO} 740 </display> 741 742 <derived name="D" expr="#cat6-d" type="uint"/> 743 <derived name="TRUE" expr="#true" type="bool"/> 744 745 <field low="9" high="10" name="D_MINUS_ONE" type="uint"/> 746 <field pos="11" name="TYPED" type="#cat6-typed"/> 747 <pattern low="20" high="23">0110</pattern> 748 <field low="24" high="31" name="SRC2" type="#reg-gpr"/> 749 <field low="32" high="39" name="SRC1" type="#reg-gpr"/> 750 <field low="41" high="48" name="SSBO" type="#cat6-src"> <!-- SSBO/image binding point --> 751 <param name="SSBO_IM" as="SRC_IM"/> 752 </field> 753 <derived name="SSBO_IM" expr="#cat6-direct" type="bool"/> 754 <field low="49" high="51" name="TYPE" type="#type"/> 755 <encode> 756 <map name="TYPED">src</map> 757 <map name="D_MINUS_ONE">src->cat6.d - 1</map> 758 <map name="SSBO">src->srcs[0]</map> 759 <map name="SRC1">src->srcs[2]</map> 760 <map name="SRC2">src->srcs[1]</map> 761 </encode> 762</bitset> 763 764<bitset name="stib.b" extends="#instruction-cat6-a6xx-ibo"> 765 <doc> 766 STore IBo 767 </doc> 768 <pattern pos="0" >0</pattern> 769 <pattern low="14" high="19">011101</pattern> <!-- OPC --> 770 <pattern low="52" high="53">10</pattern> 771</bitset> 772 773<bitset name="ldib.b" extends="#instruction-cat6-a6xx-ibo"> 774 <doc> 775 LoaD IBo 776 </doc> 777 <pattern pos="0" >x</pattern> <!-- blob seems to set randomly? --> 778 <pattern low="14" high="19">000110</pattern> <!-- OPC --> 779 <pattern low="52" high="53">10</pattern> 780 <encode> 781 <map name="SRC1">src->dsts[0]</map> 782 </encode> 783</bitset> 784 785<bitset name="atomic.b.add" extends="#instruction-cat6-a6xx-ibo"> 786 <pattern pos="0" >x</pattern> 787 <pattern low="14" high="19">010000</pattern> <!-- OPC --> 788 <pattern low="52" high="53">11</pattern> 789</bitset> 790 791<bitset name="atomic.b.sub" extends="#instruction-cat6-a6xx-ibo"> 792 <pattern pos="0" >x</pattern> 793 <pattern low="14" high="19">010001</pattern> <!-- OPC --> 794 <pattern low="52" high="53">11</pattern> 795</bitset> 796 797<bitset name="atomic.b.xchg" extends="#instruction-cat6-a6xx-ibo"> 798 <pattern pos="0" >x</pattern> 799 <pattern low="14" high="19">010010</pattern> <!-- OPC --> 800 <pattern low="52" high="53">11</pattern> 801</bitset> 802 803<!-- inc/dec? --> 804 805<bitset name="atomic.b.cmpxchg" extends="#instruction-cat6-a6xx-ibo"> 806 <pattern pos="0" >x</pattern> 807 <pattern low="14" high="19">010101</pattern> <!-- OPC --> 808 <pattern low="52" high="53">11</pattern> 809</bitset> 810 811<bitset name="atomic.b.min" extends="#instruction-cat6-a6xx-ibo"> 812 <pattern pos="0" >x</pattern> 813 <pattern low="14" high="19">010110</pattern> <!-- OPC --> 814 <pattern low="52" high="53">11</pattern> 815</bitset> 816 817<bitset name="atomic.b.max" extends="#instruction-cat6-a6xx-ibo"> 818 <pattern pos="0" >x</pattern> 819 <pattern low="14" high="19">010111</pattern> <!-- OPC --> 820 <pattern low="52" high="53">11</pattern> 821</bitset> 822 823<bitset name="atomic.b.and" extends="#instruction-cat6-a6xx-ibo"> 824 <pattern pos="0" >x</pattern> 825 <pattern low="14" high="19">011000</pattern> <!-- OPC --> 826 <pattern low="52" high="53">11</pattern> 827</bitset> 828 829<bitset name="atomic.b.or" extends="#instruction-cat6-a6xx-ibo"> 830 <pattern pos="0" >x</pattern> 831 <pattern low="14" high="19">011001</pattern> <!-- OPC --> 832 <pattern low="52" high="53">11</pattern> 833</bitset> 834 835<bitset name="atomic.b.xor" extends="#instruction-cat6-a6xx-ibo"> 836 <pattern pos="0" >x</pattern> 837 <pattern low="14" high="19">011010</pattern> <!-- OPC --> 838 <pattern low="52" high="53">11</pattern> 839</bitset> 840 841 842 843<expr name="#cat6-d"> 844 {D_MINUS_ONE} + 1 845</expr> 846 847<expr name="#cat6-type-size"> 848 {TYPE_SIZE_MINUS_ONE} + 1 849</expr> 850 851<!-- Image/SSBO (ie. not local) --> 852<expr name="#cat6-global"> 853 {G} 854</expr> 855 856<bitset name="#cat6-typed" size="1"> 857 <override> 858 <expr>{TYPED}</expr> 859 <display> 860 typed 861 </display> 862 </override> 863 <display> 864 untyped 865 </display> 866 <field name="TYPED" pos="0" type="bool"/> 867 <encode type="struct ir3_instruction *"> 868 <map name="TYPED" force="true">src->cat6.typed</map> 869 </encode> 870</bitset> 871 872<bitset name="#cat6-base" size="3"> 873 <override> 874 <expr>{BINDLESS}</expr> 875 <display> 876 .base{BASE} 877 </display> 878 </override> 879 <display/> 880 <field name="BASE" low="0" high="2" type="uint"/> 881 <encode type="struct ir3_instruction *"> 882 <map name="BASE">src->cat6.base</map> 883 </encode> 884</bitset> 885 886<bitset name="#cat6-src" size="8"> 887 <doc> 888 Source value that can be either immed or gpr 889 </doc> 890 <override> 891 <expr>{SRC_IM}</expr> 892 <display> 893 {IMMED} 894 </display> 895 <field name="IMMED" low="0" high="7" type="uint"/> 896 </override> 897 <display> 898 r{GPR}.{SWIZ} 899 </display> 900 <field name="SWIZ" low="0" high="1" type="#swiz"/> 901 <field name="GPR" low="2" high="7" type="uint"/> 902 <encode type="struct ir3_register *"> 903 <map name="GPR">src->num >> 2</map> 904 <map name="SWIZ">src->num & 0x3</map> 905 <map name="IMMED">src->iim_val</map> 906 </encode> 907</bitset> 908 909<expr name="#cat6-direct"> 910 {MODE} == 0 911</expr> 912 913<enum name="#cat6-src-mode"> 914 <doc> 915 Source mode for "new" a6xx+ instruction encodings 916 </doc> 917 <value val="0" display="imm"> 918 <doc> 919 Immediate index. 920 </doc> 921 </value> 922 <value val="1" display="uniform"> 923 <doc> 924 Index from a uniform register (ie. does not depend on flow control) 925 </doc> 926 </value> 927 <value val="2" display="nonuniform"> 928 <doc> 929 Index from a non-uniform register (ie. potentially depends on flow control) 930 </doc> 931 </value> 932</enum> 933 934</isa> 935