1 /*
2 * Copyright (C) 2016 Rob Clark <robclark@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Rob Clark <robclark@freedesktop.org>
25 */
26
27 #ifndef FD5_DRAW_H_
28 #define FD5_DRAW_H_
29
30 #include "pipe/p_context.h"
31
32 #include "freedreno_draw.h"
33
34 #include "fd5_context.h"
35 #include "fd5_screen.h"
36
37 /* some bits in common w/ a4xx: */
38 #include "a4xx/fd4_draw.h"
39
40 void fd5_draw_init(struct pipe_context *pctx);
41
42 static inline void
fd5_draw(struct fd_batch * batch,struct fd_ringbuffer * ring,enum pc_di_primtype primtype,enum pc_di_vis_cull_mode vismode,enum pc_di_src_sel src_sel,uint32_t count,uint32_t instances,enum a4xx_index_size idx_type,uint32_t max_indices,uint32_t idx_offset,struct pipe_resource * idx_buffer)43 fd5_draw(struct fd_batch *batch, struct fd_ringbuffer *ring,
44 enum pc_di_primtype primtype, enum pc_di_vis_cull_mode vismode,
45 enum pc_di_src_sel src_sel, uint32_t count, uint32_t instances,
46 enum a4xx_index_size idx_type, uint32_t max_indices,
47 uint32_t idx_offset, struct pipe_resource *idx_buffer)
48 {
49 /* for debug after a lock up, write a unique counter value
50 * to scratch7 for each draw, to make it easier to match up
51 * register dumps to cmdstream. The combination of IB
52 * (scratch6) and DRAW is enough to "triangulate" the
53 * particular draw that caused lockup.
54 */
55 emit_marker5(ring, 7);
56
57 OUT_PKT7(ring, CP_DRAW_INDX_OFFSET, idx_buffer ? 7 : 3);
58 if (vismode == USE_VISIBILITY) {
59 /* leave vis mode blank for now, it will be patched up when
60 * we know if we are binning or not
61 */
62 OUT_RINGP(ring, DRAW4(primtype, src_sel, idx_type, 0),
63 &batch->draw_patches);
64 } else {
65 OUT_RING(ring, DRAW4(primtype, src_sel, idx_type, vismode));
66 }
67 OUT_RING(ring, instances); /* NumInstances */
68 OUT_RING(ring, count); /* NumIndices */
69 if (idx_buffer) {
70 OUT_RING(ring, 0x0); /* XXX */
71 OUT_RELOC(ring, fd_resource(idx_buffer)->bo, idx_offset, 0, 0);
72 OUT_RING(ring, max_indices);
73 }
74
75 emit_marker5(ring, 7);
76
77 fd_reset_wfi(batch);
78 }
79
80 static inline void
fd5_draw_emit(struct fd_batch * batch,struct fd_ringbuffer * ring,enum pc_di_primtype primtype,enum pc_di_vis_cull_mode vismode,const struct pipe_draw_info * info,const struct pipe_draw_indirect_info * indirect,const struct pipe_draw_start_count_bias * draw,unsigned index_offset)81 fd5_draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring,
82 enum pc_di_primtype primtype, enum pc_di_vis_cull_mode vismode,
83 const struct pipe_draw_info *info,
84 const struct pipe_draw_indirect_info *indirect,
85 const struct pipe_draw_start_count_bias *draw, unsigned index_offset)
86 {
87 struct pipe_resource *idx_buffer = NULL;
88 enum a4xx_index_size idx_type;
89 enum pc_di_src_sel src_sel;
90 uint32_t max_indices, idx_offset;
91
92 if (indirect && indirect->buffer) {
93 struct fd_resource *ind = fd_resource(indirect->buffer);
94
95 emit_marker5(ring, 7);
96
97 if (info->index_size) {
98 struct pipe_resource *idx = info->index.resource;
99 max_indices = idx->width0 / info->index_size;
100
101 OUT_PKT7(ring, CP_DRAW_INDX_INDIRECT, 6);
102 OUT_RINGP(ring,
103 DRAW4(primtype, DI_SRC_SEL_DMA,
104 fd4_size2indextype(info->index_size), 0),
105 &batch->draw_patches);
106 OUT_RELOC(ring, fd_resource(idx)->bo, index_offset, 0, 0);
107 OUT_RING(ring, A5XX_CP_DRAW_INDX_INDIRECT_3_MAX_INDICES(max_indices));
108 OUT_RELOC(ring, ind->bo, indirect->offset, 0, 0);
109 } else {
110 OUT_PKT7(ring, CP_DRAW_INDIRECT, 3);
111 OUT_RINGP(ring, DRAW4(primtype, DI_SRC_SEL_AUTO_INDEX, 0, 0),
112 &batch->draw_patches);
113 OUT_RELOC(ring, ind->bo, indirect->offset, 0, 0);
114 }
115
116 emit_marker5(ring, 7);
117 fd_reset_wfi(batch);
118
119 return;
120 }
121
122 if (info->index_size) {
123 assert(!info->has_user_indices);
124
125 idx_buffer = info->index.resource;
126 idx_type = fd4_size2indextype(info->index_size);
127 max_indices = idx_buffer->width0 / info->index_size;
128 idx_offset = index_offset + draw->start * info->index_size;
129 src_sel = DI_SRC_SEL_DMA;
130 } else {
131 idx_buffer = NULL;
132 idx_type = INDEX4_SIZE_32_BIT;
133 max_indices = 0;
134 idx_offset = 0;
135 src_sel = DI_SRC_SEL_AUTO_INDEX;
136 }
137
138 fd5_draw(batch, ring, primtype, vismode, src_sel, draw->count,
139 info->instance_count, idx_type, max_indices, idx_offset,
140 idx_buffer);
141 }
142
143 #endif /* FD5_DRAW_H_ */
144