1root { 2 platform { 3 template codec_controller { 4 match_attr = ""; 5 serviceName = ""; 6 codecDaiName = ""; 7 } 8 controller_0x120c1030 :: codec_controller { 9 match_attr = "hdf_codec_driver_0"; 10 serviceName = "codec_service_0"; 11 codecDaiName = "codec_dai"; 12 regConfig { 13 /* reg: register address 14 rreg: register address 15 shift: shift bits 16 rshift: rshift bits 17 min: min value 18 max: max value 19 mask: mask of value 20 invert: enum InvertVal 0-uninvert 1-invert 21 value: value 22 */ 23 24 /* reg, value */ 25 initSeqConfig = [ 26 0x13, 0xf4, 27 0x15, 0xff, 28 0x17, 0x40, 29 0x18, 0xc8, 30 0x1e, 0x00, 31 0x27, 0x3f, 32 0x29, 0x99, 33 0x2f, 0x03, 34 0x30, 0x06, 35 0x35, 0x02, 36 0x38, 0x10, 37 0x3c, 0x0F, 38 0x3d, 0x80, 39 0x3e, 0x0f, 40 0x3f, 0x11, 41 0x40, 0xa5, 42 0x41, 0x77, 43 0x42, 0x04, 44 0x43, 0x58, 45 0x44, 0x2d, 46 0x45, 0x0c, 47 0x46, 0xa5, 48 0x47, 0x00, 49 0x48, 0x00, 50 0x4b, 0x0f, 51 0x4c, 0x20, 52 0x4e, 0x0f, 53 0x4f, 0x00, 54 ]; 55 56 controlsConfig = [ 57 58 /*array index, iface, mixer/mux, enable,*/ 59 0, 2, 0, 1, 60 1, 2, 0, 1, 61 2, 2, 0, 1, 62 3, 2, 0, 1, 63 4, 2, 0, 1, 64 5, 2, 0, 1, 65 8, 2, 0, 1, 66 9, 2, 0, 1, 67 ]; 68 69 /* reg, rreg, shift, rshift, min, max, mask, invert, value */ 70 ctrlParamsSeqConfig = [ 71 0x31, 0x32, 0, 0, 0x00, 0xFF, 0xFF, 1, 0x00, // DACL/R Playback Volume 72 0x1a, 0x1b, 0, 0, 0x00, 0xFF, 0xFF, 1, 0x00, // ADCL/R Capture Volume 73 0x38, 0x38, 0, 0, 0x0, 0x1, 0x1, 0, 0x0, // DAC Playback Mute 74 0x27, 0x27, 6, 6, 0x0, 0x1, 0x1, 0, 0x0, // ADCL/R Capture Mute 75 0x29, 0x29, 4, 4, 0x0, 0xF, 0xF, 0, 0x9, // Mic Left Gain 76 0x29, 0x29, 0, 0, 0x0, 0xF, 0xF, 0, 0x9, // Mic Right Gain 77 0x4a, 0x4a, 2, 2, 0x0, 0x2, 0x3, 0, 0x0, // Render Channel Mode 78 0x4d, 0x4d, 2, 2, 0x0, 0x2, 0x3, 0, 0x0, // Captrue Channel Mode 79 ]; 80 81 /* reg, rreg, shift, rshift, min, max, mask, invert, value */ 82 daiParamsSeqConfig = [ 83 0x45, 0x45, 0, 0, 0x0, 0xFF, 0xFF, 0, 0x0C, // PLL_PREDIV_BIT 84 0x35, 0x35, 0, 0, 0x0, 0x7, 0x7, 0, 0x2, // DAC_Sample_rate 85 0x1e, 0x1e, 0, 0, 0x0, 0x7, 0x7, 0, 0x2, // ADC_Sample_rate 86 0x4e, 0x4e, 0, 0, 0x0, 0x17, 0x1F, 0, 0x0F, // TX_datawidth 87 0x4b, 0x4b, 0, 0, 0x0, 0x17, 0x1F, 0, 0x0F, // RX_datawidth 88 0x15, 0x15, 0x0, 0x0, 0x0, 0xf, 0xf, 0, 0x0, // rx clk enable 89 0x15, 0x15, 0x4, 0x4, 0x0, 0xf, 0xf, 0, 0x0, // tx clk enable 90 ]; 91 92 ctrlSapmParamsSeqConfig = [ 93 0x27, 0x27, 5, 5, 0x00, 0x1, 0x1, 1, 0x00, //LPGA MIC -- connect MIC1 94 0x27, 0x27, 4, 4, 0x00, 0x1, 0x1, 1, 0x00, //RPGA MIC -- connect MIC2 95 0x2F, 0x2F, 2, 2, 0x00, 0x1, 0x1, 1, 0x00, //Speaker1 Switch -- connect speaker 96 0x2F, 0x2F, 1, 1, 0x00, 0x1, 0x1, 1, 0x00, //Headphone1 Switch -- connect hpl 97 0x2F, 0x2F, 0, 0, 0x00, 0x1, 0x1, 1, 0x00, //Headphone2 Switch -- connect hpr 98 ]; 99 /* 100 电源管理组件配置 101 reg is 0xFFFF: component has no sapm register bit 102 sapmType, compNameIndex, reg, mask, shift, invert, kcontrolNews, kcontrolsNum 103 */ 104 sapmComponent = [ 105 10, 0, 0x18, 0x1, 7, 1, 0, 0, //ADCL 106 10, 1, 0x18, 0x1, 6, 1, 0, 0, //ADCR 107 11, 32, 0xFFFF, 0xFFFF, 0, 0, 0, 0, //DAC1 108 11, 33, 0xFFFF, 0xFFFF, 0, 0, 0, 0, //DAC2 109 11, 34, 0xFFFF, 0xFFFF, 0, 0, 0, 0, //DAC3 110 6, 52, 0xFFFF, 0xFFFF, 0, 0, 3, 1, //SPKL PGA 111 6, 54, 0xFFFF, 0xFFFF, 0, 0, 4, 1, //HPL PGA 112 6, 55, 0xFFFF, 0xFFFF, 0, 0, 5, 1, //HPR PGA 113 15, 6, 0xFFFF, 0xFFFF, 0, 0, 0, 0, //SPK 114 14, 10, 0xFFFF, 0xFFFF, 0, 0, 0, 0, //HPL 115 14, 11, 0xFFFF, 0xFFFF, 0, 0, 0, 0, //HPR 116 6, 4, 0xFFFF, 0xFFFF, 6, 0, 1, 1, //LPGA 117 6, 5, 0xFFFF, 0xFFFF, 6, 0, 2, 1, //RPGA 118 13, 40, 0xFFFF, 0xFFFF, 6, 0, 0, 0, //MIC1 119 13, 41, 0x4d, 0x1, 1, 0, 0, 0 //MIC2 120 ]; 121 122 /*array index, iface, mixer/mux, enable*/ 123 sapmConfig = [ 124 0, 2, 0, 1, 125 1, 2, 0, 1, 126 24, 2, 0, 1, 127 28, 2, 0, 1, 128 29, 2, 0, 1 129 ]; 130 131 } 132 } 133 controller_0x120c1031 :: codec_controller { 134 match_attr = "hdf_codec_driver_1"; 135 serviceName = "codec_service_1"; 136 codecDaiName = "rk817_dai"; 137 138 } 139 } 140} 141