Home
last modified time | relevance | path

Searched refs:APB_CLK (Results 1 – 3 of 3) sorted by relevance

/device/soc/winnermicro/wm800/board/platform/arch/xt804/bsp/
Dboard_init.c43 bd = (APB_CLK/(16*bandrate) - 1)|(((APB_CLK%(bandrate*16))*16/(bandrate*16))<<16); in uart0Init()
/device/soc/winnermicro/wm800/board/include/driver/
Dwm_hostspi.h66 #define TLS_SPI_FCLK_MAX (APB_CLK/2) /** maximum work clock rate(Hz). */
/device/soc/winnermicro/wm800/board/include/
Dwm_regs.h90 #define APB_CLK (40000000) /* 40MHz */ macro
421 #define SPI_GET_SCLK_DIVIDER(clk) ((APB_CLK)/((clk) * 2) - 1) /* In HZ */
451 #define SPI_TIME_OUT(n) (((((n) * (APB_CLK)) / 1000) & ~(0x01U << 31)) << 0)