1 /*
2 * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved.
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 /******************************************************************************
18 * @file board_init.c
19 * @brief CSI Source File for board init
20 * @version V1.0
21 * @date 02. June 2017
22 ******************************************************************************/
23 #include <stdio.h>
24 #include <stdint.h>
25 #include <csi_config.h>
26 #include <csi_core.h>
27 #include "wm_regs.h"
28
29 #define UART_TXEN_BIT (0x40)
30 #define UART_RXEN_BIT (0x80)
31 #define UART_PARITYEN_BIT (0x08)
32 #define UART_PARITYODD_BIT (0x10)
33 #define UART_BITSTOP_VAL (0x03) // /1 stop-bit; no crc; 8 data-bits
34
35 extern void set_printf_port(unsigned char port);
uart0Init(int bandrate)36 static void uart0Init (int bandrate)
37 {
38 unsigned int bd;
39
40 NVIC_DisableIRQ(UART0_IRQn);
41 NVIC_ClearPendingIRQ(UART0_IRQn);
42
43 bd = (APB_CLK/(16*bandrate) - 1)|(((APB_CLK%(bandrate*16))*16/(bandrate*16))<<16);
44 tls_reg_write32(HR_UART0_BAUD_RATE_CTRL, bd);
45
46 tls_reg_write32(HR_UART0_LINE_CTRL, UART_BITSTOP_VAL | UART_TXEN_BIT | UART_RXEN_BIT);
47 tls_reg_write32(HR_UART0_FLOW_CTRL, 0x00); /* Disable afc */
48 tls_reg_write32(HR_UART0_DMA_CTRL, 0x00); /* Disable DMA */
49 tls_reg_write32(HR_UART0_FIFO_CTRL, 0x00); /* one byte TX/RX */
50 // tls_reg_write32(HR_UART0_INT_MASK, 0x00); /* Disable INT */
51 }
52
board_init(void)53 void board_init(void)
54 {
55 #if USE_UART0_PRINT
56 /* use uart0 as log output io */
57 uart0Init(115200);
58 set_printf_port(0);
59 #else
60 uart1_io_init();
61 /* use uart1 as log output io */
62 uart1Init(115200);
63 set_printf_port(1);
64 #endif
65 }
66