Searched refs:__DMB (Results 1 – 19 of 19) sorted by relevance
132 __DMB(); in ARM_MPU_Enable()145 __DMB(); in ARM_MPU_Disable()160 __DMB(); in ARM_MPU_Enable_NS()173 __DMB(); in ARM_MPU_Disable_NS()
193 __DMB(); in ARM_MPU_Enable()206 __DMB(); in ARM_MPU_Disable()
462 #define __DMB() __dmb(0xF) macro
956 __STATIC_FORCEINLINE void __DMB(void) in __DMB() function
153 __STATIC_FORCEINLINE void __DMB(void) in __DMB() function656 __DMB(); in __L1C_MaintainDCacheSetWay()
898 __DMB(); //ensure the ordering of data cache maintenance operations and their effects in L1C_CleanDCacheMVA()906 __DMB(); //ensure the ordering of data cache maintenance operations and their effects in L1C_InvalidateDCacheMVA()914 __DMB(); //ensure the ordering of data cache maintenance operations and their effects in L1C_CleanInvalidateDCacheMVA()
153 __DMB(); in set_msp()
261 __DMB(); in HAL_MPU_Disable()
509 __DMB(); in LL_MPU_Disable()
151 #define __DMB() do {\ macro
975 __DMB(); //ensure the ordering of data cache maintenance operations and their effects in L1C_CleanDCacheMVA()983 __DMB(); //ensure the ordering of data cache maintenance operations and their effects in L1C_InvalidateDCacheMVA()991 __DMB(); //ensure the ordering of data cache maintenance operations and their effects in L1C_CleanInvalidateDCacheMVA()1064 __DMB(); in __L1C_MaintainDCacheSetWay()1110 __DMB(); in L1C_CleanInvalidateCacheRange()
135 #define __DMB() do {\ macro
274 __STATIC_FORCEINLINE void __DMB(void) in __DMB() function
445 #define __DMB() do {\ macro
891 __STATIC_FORCEINLINE void __DMB(void) in __DMB() function
3510 __DMB(); in hal_cmu_dsp_init_boot_reg()3525 __DMB(); in hal_cmu_dsp_init_boot_reg()3527 __DMB(); in hal_cmu_dsp_init_boot_reg()
888 __STATIC_FORCEINLINE void __DMB(void) in __DMB() function
1056 __ALWAYS_STATIC_INLINE void __DMB(void) in __DMB() function
1081 __ALWAYS_STATIC_INLINE void __DMB(void) in __DMB() function