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Searched refs:bEnable (Results 1 – 25 of 64) sorted by relevance

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/device/soc/hisilicon/hi3516dv300/sdk_liteos/include/
Dhi_comm_sns.h39 HI_BOOL bEnable; member
49 HI_BOOL bEnable; member
146 HI_BOOL bEnable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable Edge Mark */ member
152 HI_BOOL bEnable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable HLC module */ member
158 HI_BOOL bEnable; member
228 HI_BOOL bEnable; /* RW;Range:[0,1];Format:1.0; */ member
236 HI_BOOL bEnable; member
309 HI_BOOL bEnable; member
315 HI_BOOL bEnable; member
329 HI_BOOL bEnable; member
[all …]
Dhi_comm_isp.h430 HI_BOOL bEnable; member
592 HI_BOOL bEnable; member
691 HI_BOOL bEnable; /* RW;Range:[0x0,0x1];Format:1.0; */ member
727 HI_BOOL bEnable; /* RW;Range:[0x0,0x1];Format:1.0 */ member
740 HI_BOOL bEnable; /* RW; Range:[0, 1];Format:1.0; Enable/Disable CSC Function */ member
755 HI_BOOL bEnable; /* RW; Range:[0, 1];Format:1.0; Enable/Disable CLUT Function, member
822 …HI_BOOL bEnable; /* RW; Range: [0, 1];Format 1.0;Enable/disable the static defect-pixel mod… member
866 …HI_BOOL bEnable; /* RW; Range: [0, 1];Format 1.0;Enable/disable the dynamic defect-pixe… member
877 HI_BOOL bEnable; /* RW; Range: [0, 1];Format 1.0;Enable/disable dis module, member
882 …HI_BOOL bEnable; /* RW; Range:[0, 1];Format:1.0; HI_TRUE: enable lsc; HI_FALSE: disable lsc … member
[all …]
Dhi_comm_vi.h46 HI_BOOL bEnable; /* RW; Low delay enable. */ member
499 HI_BOOL bEnable; member
723 HI_BOOL bEnable; /* RO;Whether this pipe is enabled */ member
750 HI_BOOL bEnable; member
781 HI_BOOL bEnable; /* RW;CROP enable */ member
788 HI_BOOL bEnable; /* RW;Range [0,1];Whether LDC is enbale */ member
794 HI_BOOL bEnable; /* RW;Whether LDC is enbale */ member
800 HI_BOOL bEnable; /* RW;Whether LDC is enbale */ member
805 HI_BOOL bEnable; /* RW;Range [0,1];Whether ROTATE_EX_S is enbale */ member
811 HI_BOOL bEnable; /* RO;Whether this channel is enabled */ member
[all …]
Dhi_comm_gdc.h100 HI_BOOL bEnable; /* RW; Range: [0, 1];whether enable fisheye correction or not */ member
121 HI_BOOL bEnable; /* RW; Range: [0, 1];whether enable fisheye correction or not */ member
145 HI_BOOL bEnable; member
Dhi_comm_vpss.h125 HI_BOOL bEnable; /* RW; Range: [0, 1]; CROP enable. */ member
132 HI_BOOL bEnable; /* RW; Range: [0, 1]; Whether LDC is enbale */ member
138 HI_BOOL bEnable; /* RW;Whether LDC is enbale */ member
143 HI_BOOL bEnable; /* Whether ROTATE_EX_S is enbale */ member
148 HI_BOOL bEnable; /* RW; Low delay enable. */ member
232 HI_BOOL bEnable; member
676 HI_BOOL bEnable; member
Dhi_comm_snap.h87 HI_BOOL bEnable; member
93 HI_BOOL bEnable; member
Dhi_comm_venc.h641 HI_BOOL bEnable; /* RW; Range:[0, 1]; Whether to enable this ROI */ member
660 HI_BOOL bEnable[HI_VENC_ROI_FOR_BUTT]; /* RW; Range:[0, 1]; Subscript of array member
936 HI_BOOL bEnable; /* RW; Range:[0, 1]; Whether to enable SSE */ member
942 HI_BOOL bEnable; /* RW; Range:[0, 1]; Crop region enable */ member
986 HI_BOOL bEnable; /* RW; Range:[0, 1]; default: 0, DeBreathEffect enable */ member
Dhi_comm_dis.h68 HI_BOOL bEnable; /* RW; DIS enable */ member
Dmpi_audio.h114 HI_S32 HI_MPI_AO_SetMute(AUDIO_DEV AoDevId, HI_BOOL bEnable, const AUDIO_FADE_S *pstFade);
146 HI_S32 HI_MPI_AENC_SetMute(AENC_CHN AeChn, HI_BOOL bEnable);
/device/soc/hisilicon/hi3516dv300/sdk_linux/usr/sensor/include/
Dhi_comm_sns.h39 HI_BOOL bEnable; member
49 HI_BOOL bEnable; member
146 HI_BOOL bEnable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable Edge Mark */ member
152 HI_BOOL bEnable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable HLC module */ member
158 HI_BOOL bEnable; member
228 HI_BOOL bEnable; /* RW;Range:[0,1];Format:1.0; */ member
236 HI_BOOL bEnable; member
309 HI_BOOL bEnable; member
315 HI_BOOL bEnable; member
329 HI_BOOL bEnable; member
[all …]
Dhi_comm_isp.h429 HI_BOOL bEnable; member
591 HI_BOOL bEnable; member
690 HI_BOOL bEnable; /* RW;Range:[0x0,0x1];Format:1.0; */ member
726 HI_BOOL bEnable; /* RW;Range:[0x0,0x1];Format:1.0 */ member
739 HI_BOOL bEnable; /* RW; Range:[0, 1];Format:1.0; Enable/Disable CSC Function */ member
754 HI_BOOL bEnable; /* RW; Range:[0, 1];Format:1.0; Enable/Disable CLUT Function, member
821 …HI_BOOL bEnable; /* RW; Range: [0, 1];Format 1.0;Enable/disable the static defect-pixel mod… member
865 …HI_BOOL bEnable; /* RW; Range: [0, 1];Format 1.0;Enable/disable the dynamic defect-pixe… member
876 HI_BOOL bEnable; /* RW; Range: [0, 1];Format 1.0;Enable/disable dis module, member
881 …HI_BOOL bEnable; /* RW; Range:[0, 1];Format:1.0; HI_TRUE: enable lsc; HI_FALSE: disable lsc … member
[all …]
/device/soc/hisilicon/hi3516dv300/sdk_linux/include/
Dhi_comm_sns.h39 HI_BOOL bEnable; member
49 HI_BOOL bEnable; member
146 HI_BOOL bEnable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable Edge Mark */ member
152 HI_BOOL bEnable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable HLC module */ member
158 HI_BOOL bEnable; member
228 HI_BOOL bEnable; /* RW;Range:[0,1];Format:1.0; */ member
236 HI_BOOL bEnable; member
309 HI_BOOL bEnable; member
315 HI_BOOL bEnable; member
329 HI_BOOL bEnable; member
[all …]
Dhi_comm_isp.h429 HI_BOOL bEnable; member
591 HI_BOOL bEnable; member
690 HI_BOOL bEnable; /* RW;Range:[0x0,0x1];Format:1.0; */ member
726 HI_BOOL bEnable; /* RW;Range:[0x0,0x1];Format:1.0 */ member
739 HI_BOOL bEnable; /* RW; Range:[0, 1];Format:1.0; Enable/Disable CSC Function */ member
754 HI_BOOL bEnable; /* RW; Range:[0, 1];Format:1.0; Enable/Disable CLUT Function, member
821 …HI_BOOL bEnable; /* RW; Range: [0, 1];Format 1.0;Enable/disable the static defect-pixel mod… member
865 …HI_BOOL bEnable; /* RW; Range: [0, 1];Format 1.0;Enable/disable the dynamic defect-pixe… member
876 HI_BOOL bEnable; /* RW; Range: [0, 1];Format 1.0;Enable/disable dis module, member
881 …HI_BOOL bEnable; /* RW; Range:[0, 1];Format:1.0; HI_TRUE: enable lsc; HI_FALSE: disable lsc … member
[all …]
Dhi_comm_vi.h46 HI_BOOL bEnable; /* RW; Low delay enable. */ member
499 HI_BOOL bEnable; member
723 HI_BOOL bEnable; /* RO;Whether this pipe is enabled */ member
750 HI_BOOL bEnable; member
781 HI_BOOL bEnable; /* RW;CROP enable */ member
788 HI_BOOL bEnable; /* RW;Range [0,1];Whether LDC is enbale */ member
794 HI_BOOL bEnable; /* RW;Whether LDC is enbale */ member
800 HI_BOOL bEnable; /* RW;Whether LDC is enbale */ member
805 HI_BOOL bEnable; /* RW;Range [0,1];Whether ROTATE_EX_S is enbale */ member
811 HI_BOOL bEnable; /* RO;Whether this channel is enabled */ member
[all …]
Dhi_comm_gdc.h100 HI_BOOL bEnable; /* RW; Range: [0, 1];whether enable fisheye correction or not */ member
121 HI_BOOL bEnable; /* RW; Range: [0, 1];whether enable fisheye correction or not */ member
145 HI_BOOL bEnable; member
Dhi_comm_vpss.h125 HI_BOOL bEnable; /* RW; Range: [0, 1]; CROP enable. */ member
132 HI_BOOL bEnable; /* RW; Range: [0, 1]; Whether LDC is enbale */ member
138 HI_BOOL bEnable; /* RW;Whether LDC is enbale */ member
143 HI_BOOL bEnable; /* Whether ROTATE_EX_S is enbale */ member
148 HI_BOOL bEnable; /* RW; Low delay enable. */ member
232 HI_BOOL bEnable; member
676 HI_BOOL bEnable; member
Dhi_comm_snap.h87 HI_BOOL bEnable; member
93 HI_BOOL bEnable; member
Dhi_comm_venc.h642 HI_BOOL bEnable; /* RW; Range:[0, 1]; Whether to enable this ROI */ member
661 HI_BOOL bEnable[HI_VENC_ROI_FOR_BUTT]; /* RW; Range:[0, 1]; Subscript of array member
937 HI_BOOL bEnable; /* RW; Range:[0, 1]; Whether to enable SSE */ member
943 HI_BOOL bEnable; /* RW; Range:[0, 1]; Crop region enable */ member
987 HI_BOOL bEnable; /* RW; Range:[0, 1]; default: 0, DeBreathEffect enable */ member
Dhi_comm_dis.h68 HI_BOOL bEnable; /* RW; DIS enable */ member
Dmpi_audio.h114 HI_S32 HI_MPI_AO_SetMute(AUDIO_DEV AoDevId, HI_BOOL bEnable, const AUDIO_FADE_S *pstFade);
146 HI_S32 HI_MPI_AENC_SetMute(AENC_CHN AeChn, HI_BOOL bEnable);
/device/soc/rockchip/rk3568/hardware/omx_il/include/rockchip/
DRockchip_OMX_Def.h79 OMX_BOOL bEnable; member
157 OMX_BOOL bEnable; member
194 OMX_BOOL bEnable; member
214 OMX_BOOL bEnable; member
/device/board/unionman/unionpi_tiger/kernel/drivers/rtl88x2cs/hal/btc/
Dmp_precomp.h35 #ifdef bEnable
36 #undef bEnable
/device/soc/hisilicon/hi3516dv300/sdk_linux/sample/platform/higv/include/
Dhi_go_comm.h187 HI_S32 HI_GO_EnableMemMng(HI_BOOL bEnable);
/device/board/unionman/unionpi_tiger/kernel/drivers/rtl88x2cs/include/
Drtl8822b_hal.h196 #define bEnable 0x1 /* hal_mp.c, rtw_mp.c */ macro
Drtl8822c_hal.h205 #define bEnable 0x1 /* hal_mp.c, rtw_mp.c */ macro

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