1 /* 2 * Copyright (c) 2022 HiSilicon (Shanghai) Technologies CO., LIMITED. 3 * Licensed under the Apache License, Version 2.0 (the "License"); 4 * you may not use this file except in compliance with the License. 5 * You may obtain a copy of the License at 6 * 7 * http://www.apache.org/licenses/LICENSE-2.0 8 * 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 */ 15 16 #ifndef __HI_COMM_SNS_H__ 17 #define __HI_COMM_SNS_H__ 18 19 #include "hi_type.h" 20 #include "hi_common.h" 21 #include "hi_comm_isp.h" 22 23 #ifdef __cplusplus 24 #if __cplusplus 25 extern "C" { 26 #endif 27 #endif /* End of #ifdef __cplusplus */ 28 29 typedef struct hiISP_CMOS_BLACK_LEVEL_S { 30 HI_BOOL bUpdate; 31 HI_U16 au16BlackLevel[ISP_BAYER_CHN_NUM]; 32 } ISP_CMOS_BLACK_LEVEL_S; 33 34 typedef struct hiISP_SNS_ATTR_INFO_S { 35 SENSOR_ID eSensorId; 36 } ISP_SNS_ATTR_INFO_S; 37 38 typedef struct hiISP_CMOS_DEMOSAIC_S { 39 HI_BOOL bEnable; 40 HI_U8 au8NonDirStr[ISP_AUTO_ISO_STRENGTH_NUM]; 41 HI_U8 au8NonDirMFDetailEhcStr[ISP_AUTO_ISO_STRENGTH_NUM]; 42 HI_U8 au8NonDirHFDetailEhcStr[ISP_AUTO_ISO_STRENGTH_NUM]; 43 HI_U8 au8DetailSmoothRange[ISP_AUTO_ISO_STRENGTH_NUM]; 44 } ISP_CMOS_DEMOSAIC_S; 45 46 #define WDR_MAX_FRAME 2 47 #define BAYER_CALIBRATION_PARA_NUM 3 48 typedef struct hiISP_CMOS_BAYERNR_S { 49 HI_BOOL bEnable; 50 HI_BOOL bBnrMonoSensorEn; 51 HI_BOOL bNrLscEnable; 52 HI_U8 u8BnrLscMaxGain; 53 HI_U16 u16BnrLscCmpStrength; 54 55 HI_U8 au8LutFineStr[ISP_AUTO_ISO_STRENGTH_NUM]; 56 HI_U8 au8ChromaStr[ISP_BAYER_CHN_NUM][ISP_AUTO_ISO_STRENGTH_NUM]; 57 HI_U8 au8WDRFrameStr[WDR_MAX_FRAME_NUM]; 58 HI_U8 au8FusionFrameStr[WDR_MAX_FRAME_NUM]; 59 HI_U16 au16CoarseStr[ISP_BAYER_CHN_NUM][ISP_AUTO_ISO_STRENGTH_NUM]; 60 HI_U16 au16LutCoringWgt[ISP_AUTO_ISO_STRENGTH_NUM]; 61 HI_U16 au16LutCoringRatio[HI_ISP_BAYERNR_LUT_LENGTH]; 62 } ISP_CMOS_BAYERNR_S; 63 64 typedef struct hiISP_CMOS_NOISE_CALIBRATION_S { 65 HI_U16 u16CalibrationLutNum; 66 HI_FLOAT afCalibrationCoef[BAYER_CALIBTAION_MAX_NUM][BAYER_CALIBRATION_PARA_NUM]; 67 } ISP_CMOS_NOISE_CALIBRATION_S; 68 69 typedef struct hiISP_CMOS_DETAIL_S { 70 ISP_DE_ATTR_S stAttr; 71 } ISP_CMOS_DETAIL_S; 72 73 typedef struct HiISP_CMOS_SHARPEN_MANUAL_S { 74 HI_U8 au8LumaWgt[ISP_SHARPEN_LUMA_NUM]; /* Range:[0, 127]; Adjust the sharpen strength according to luma. 75 Sharpen strength will be weaker when it decrease. */ 76 HI_U16 au16TextureStr[ISP_SHARPEN_GAIN_NUM]; /* Range:[0, 4095]; Format:7.5;Undirectional sharpen strength 77 for texture and detail enhancement */ 78 HI_U16 au16EdgeStr[ISP_SHARPEN_GAIN_NUM]; /* Range:[0, 4095]; Format:7.5;Directional sharpen strength for 79 edge enhancement */ 80 HI_U16 u16TextureFreq; /* Range:[0, 4095];Format:6.6; Texture frequency adjustment. Texture and detail will be 81 finer when it increase */ 82 HI_U16 u16EdgeFreq; /* Range:[0, 4095];Format:6.6; Edge frequency adjustment. 83 Edge will be narrower and thiner when it increase */ 84 HI_U8 u8OverShoot; /* Range:[0, 127]; u8OvershootAmt */ 85 HI_U8 u8UnderShoot; /* Range:[0, 127]; u8UndershootAmt */ 86 HI_U8 u8ShootSupStr; /* Range:[0, 255]; overshoot and undershoot suppression strength, the amplitude and width 87 of shoot will be decrease when shootSupSt increase */ 88 HI_U8 u8ShootSupAdj; /* Range:[0, 15]; overshoot and undershoot suppression adjusting, adjust the edge shoot 89 suppression strength */ 90 HI_U8 u8DetailCtrl; /* Range:[0, 255]; Different sharpen strength for detail and edge. When it is bigger than 91 128, detail sharpen strength will be stronger than edge. */ 92 HI_U8 u8DetailCtrlThr; /* Range:[0, 255];The threshold of DetailCtrl,it is used to distinguish detail and edge */ 93 HI_U8 u8EdgeFiltStr; /* Range:[0, 63]; The strength of edge filtering. */ 94 HI_U8 u8EdgeFiltMaxCap; /* Range:[0, 47]; The max capacity of edge filtering. */ 95 HI_U8 u8RGain; /* Range:[0, 31];Sharpen Gain for Red Area */ 96 HI_U8 u8GGain; /* Range:[0, 255]; Sharpen Gain for Green Area */ 97 HI_U8 u8BGain; /* Range:[0, 31]; Sharpen Gain for Blue Area */ 98 HI_U8 u8SkinGain; /* Range:[0, 31]; Sharpen Gain for Skin Area */ 99 HI_U16 u16MaxSharpGain; /* Range:[0, 0x7FF]; Format:8.3; Maximum sharpen gain */ 100 } ISP_CMOS_SHARPEN_MANUAL_S; 101 102 typedef struct HiISP_CMOS_SHARPEN_AUTO_S { 103 HI_U8 au8LumaWgt[ISP_SHARPEN_LUMA_NUM][ISP_AUTO_ISO_STRENGTH_NUM]; /* Range:[0, 127]; Adjust the sharpen 104 strength according to luma. Sharpen 105 strength will be weaker when it decrease */ 106 HI_U16 au16TextureStr[ISP_SHARPEN_GAIN_NUM][ISP_AUTO_ISO_STRENGTH_NUM]; /* Range:[0, 4095]; Format:7.5;Undirectional 107 sharpen strength for texture and detail 108 enhancement */ 109 HI_U16 au16EdgeStr[ISP_SHARPEN_GAIN_NUM][ISP_AUTO_ISO_STRENGTH_NUM]; /* Range:[0, 4095]; Format:7.5;Directional 110 sharpen strength for edge enhancement */ 111 HI_U16 au16TextureFreq[ISP_AUTO_ISO_STRENGTH_NUM]; /* Range:[0, 4095]; Format:6.6;Texture frequency adjustment. 112 Texture and detail will be finer when it increase */ 113 HI_U16 au16EdgeFreq[ISP_AUTO_ISO_STRENGTH_NUM]; /* Range:[0, 4095]; Format:6.6;Edge frequency adjustment. 114 Edge will be narrower and thiner when it increase */ 115 HI_U8 au8OverShoot[ISP_AUTO_ISO_STRENGTH_NUM]; /* Range:[0, 127] */ 116 HI_U8 au8UnderShoot[ISP_AUTO_ISO_STRENGTH_NUM]; /* Range:[0, 127] */ 117 HI_U8 au8ShootSupStr[ISP_AUTO_ISO_STRENGTH_NUM]; /* Range:[0, 255]; overshoot and undershoot suppression 118 strength, the amplitude and width of shoot will be decrease 119 when shootSupSt increase */ 120 HI_U8 au8ShootSupAdj[ISP_AUTO_ISO_STRENGTH_NUM]; /* Range:[0, 15]; overshoot and undershoot suppression 121 adjusting, adjust the edge shoot suppression strength */ 122 HI_U8 au8DetailCtrl[ISP_AUTO_ISO_STRENGTH_NUM]; /* Range:[0, 255];Different sharpen strength for detail and 123 edge. When it is bigger than 128, detail sharpen strength 124 will be stronger than edge. */ 125 HI_U8 au8DetailCtrlThr[ISP_AUTO_ISO_STRENGTH_NUM]; /* Range:[0, 255]; The threshold of DetailCtrl, it is used to 126 distinguish detail and edge. */ 127 HI_U8 au8EdgeFiltStr[ISP_AUTO_ISO_STRENGTH_NUM]; /* Range:[0, 63]; The strength of edge filtering. */ 128 HI_U8 au8EdgeFiltMaxCap[ISP_AUTO_ISO_STRENGTH_NUM]; /* Range:[0, 47]; The max capacity of edge filtering. */ 129 HI_U8 au8RGain[ISP_AUTO_ISO_STRENGTH_NUM]; /* Range:[0, 31]; Sharpen Gain for Red Area */ 130 HI_U8 au8GGain[ISP_AUTO_ISO_STRENGTH_NUM]; /* Range:[0, 255]; Sharpen Gain for Green Area */ 131 HI_U8 au8BGain[ISP_AUTO_ISO_STRENGTH_NUM]; /* Range:[0, 31]; Sharpen Gain for Blue Area */ 132 HI_U8 au8SkinGain[ISP_AUTO_ISO_STRENGTH_NUM]; /* Range:[0, 31]; */ 133 HI_U16 au16MaxSharpGain[ISP_AUTO_ISO_STRENGTH_NUM]; /* Range:[0, 0x7FF]; Format:8.3; */ 134 } ISP_CMOS_SHARPEN_AUTO_S; 135 136 typedef struct hiISP_CMOS_SHARPEN_S { 137 HI_U8 u8SkinUmin; 138 HI_U8 u8SkinVmin; 139 HI_U8 u8SkinUmax; 140 HI_U8 u8SkinVmax; 141 ISP_CMOS_SHARPEN_MANUAL_S stManual; 142 ISP_CMOS_SHARPEN_AUTO_S stAuto; 143 } ISP_CMOS_SHARPEN_S; 144 145 typedef struct hiISP_CMOS_EDGEMARK_S { 146 HI_BOOL bEnable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable Edge Mark */ 147 HI_U8 u8Threshold; /* RW; range: [0, 255]; Format:8.0; */ 148 HI_U32 u32Color; /* RW; range: [0, 0xFFFFFF]; Format:32.0; */ 149 } ISP_CMOS_EDGEMARK_S; 150 151 typedef struct hiISP_CMOS_HLC_S { 152 HI_BOOL bEnable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable HLC module */ 153 HI_U8 u8LumaThr; /* RW; range: [0, 255]; Format:8.0; */ 154 HI_U8 u8LumaTarget; /* RW; range: [0, 255]; Format:8.0; */ 155 } ISP_CMOS_HLC_S; 156 157 typedef struct hiISP_CMOS_DRC_S { 158 HI_BOOL bEnable; 159 ISP_OP_TYPE_E enOpType; 160 161 HI_U16 u16ManualStrength; 162 HI_U16 u16AutoStrength; 163 164 HI_U8 u8SpatialFltCoef; 165 HI_U8 u8RangeFltCoef; 166 HI_U8 u8ContrastControl; 167 HI_S8 s8DetailAdjustFactor; 168 HI_U8 u8RangeAdaMax; 169 170 HI_U8 u8FltScaleFine; 171 HI_U8 u8FltScaleCoarse; 172 HI_U8 u8GradRevMax; 173 HI_U8 u8GradRevThr; 174 175 HI_U8 u8BrightGainLmt; 176 HI_U8 u8BrightGainLmtStep; 177 HI_U8 u8DarkGainLmtY; 178 HI_U8 u8DarkGainLmtC; 179 HI_U8 u8PDStrength; 180 HI_U8 u8LocalMixingBrightMax; 181 HI_U8 u8LocalMixingBrightMin; 182 HI_U8 u8LocalMixingBrightThr; 183 HI_S8 s8LocalMixingBrightSlo; 184 HI_U8 u8LocalMixingDarkMax; 185 HI_U8 u8LocalMixingDarkMin; 186 HI_U8 u8LocalMixingDarkThr; 187 HI_S8 s8LocalMixingDarkSlo; 188 HI_U16 u16ColorCorrectionLut[HI_ISP_DRC_CC_NODE_NUM]; 189 HI_U16 u16ToneMappingValue[HI_ISP_DRC_TM_NODE_NUM]; 190 191 HI_U8 u8Asymmetry; 192 HI_U8 u8SecondPole; 193 HI_U8 u8Stretch; 194 HI_U8 u8Compress; 195 196 HI_U8 u8CurveSel; 197 198 HI_U16 au16Xpoint[HI_ISP_DRC_CUBIC_POINT_NUM]; 199 HI_U16 au16Ypoint[HI_ISP_DRC_CUBIC_POINT_NUM]; 200 HI_U16 au16Slope[HI_ISP_DRC_CUBIC_POINT_NUM]; 201 } ISP_CMOS_DRC_S; 202 203 typedef struct hiISP_CMOS_WDR_S { 204 HI_BOOL bFusionMode; 205 HI_BOOL bMotionComp; 206 207 HI_U16 u16ShortThr; 208 HI_U16 u16LongThr; 209 210 HI_BOOL bForceLong; 211 HI_U16 u16ForceLongLowThr; 212 HI_U16 u16ForceLongHigThr; 213 214 HI_BOOL bShortExpoChk; 215 HI_U16 u16ShortCheckThd; 216 HI_BOOL bMDRefFlicker; 217 218 HI_U8 au8MdThrLowGain[ISP_AUTO_ISO_STRENGTH_NUM]; 219 HI_U8 au8MdThrHigGain[ISP_AUTO_ISO_STRENGTH_NUM]; 220 221 ISP_BNR_MODE_E enBnrMode; 222 HI_U16 au16FusionThr[WDR_MAX_FRAME]; 223 HI_U8 u8MdtStillThd; 224 HI_U8 u8MdtLongBlend; 225 } ISP_CMOS_WDR_S; 226 227 typedef struct HiISP_CMOS_DEHAZE_S { 228 HI_BOOL bEnable; /* RW;Range:[0,1];Format:1.0; */ 229 HI_BOOL bUserLutEnable; /* RW;Range:[0,1];0:Auto Lut 1:User Lut */ 230 ISP_OP_TYPE_E enOpType; 231 HI_U8 u8AutoStrength; 232 HI_U8 u8ManualStrength; 233 } ISP_CMOS_DEHAZE_S; 234 235 typedef struct hiISP_CMOS_PREGAMMA_S { 236 HI_BOOL bEnable; 237 HI_U32 au32PreGamma[PREGAMMA_NODE_NUM]; 238 } ISP_CMOS_PREGAMMA_S; 239 240 #define GAMMA_NODE_NUMBER 257 /* Update NODE NUMBER */ 241 #define GAMMA_EXT_NODE_NUMBER 1025 /* Update NODE NUMBER */ 242 #define GAMMA_OUTSEG_NUMBER 8 /* Update NODE NUMBER */ 243 typedef struct hiISP_CMOS_GAMMA_S { 244 HI_U16 au16Gamma[GAMMA_EXT_NODE_NUMBER]; 245 } ISP_CMOS_GAMMA_S; 246 247 typedef struct hiISP_CMOS_SENSOR_MAX_RESOLUTION_S { 248 HI_U32 u32MaxWidth; 249 HI_U32 u32MaxHeight; 250 } ISP_CMOS_SENSOR_MAX_RESOLUTION_S; 251 252 typedef struct hiISP_CMOS_DPC_S { 253 HI_U16 au16Strength[ISP_AUTO_ISO_STRENGTH_NUM]; 254 HI_U16 au16BlendRatio[ISP_AUTO_ISO_STRENGTH_NUM]; 255 } ISP_CMOS_DPC_S; 256 257 typedef struct hiISP_LSC_CABLI_TABLE_S { 258 HI_U16 au16R_Gain[HI_ISP_LSC_GRID_POINTS]; 259 HI_U16 au16Gr_Gain[HI_ISP_LSC_GRID_POINTS]; 260 HI_U16 au16Gb_Gain[HI_ISP_LSC_GRID_POINTS]; 261 HI_U16 au16B_Gain[HI_ISP_LSC_GRID_POINTS]; 262 } ISP_LSC_CABLI_TABLE_S; 263 264 typedef struct hiISP_BNR_LSC_CALIB_TABLE_S { 265 HI_U16 au16R_Gain[HI_ISP_RLSC_POINTS]; 266 HI_U16 au16Gr_Gain[HI_ISP_RLSC_POINTS]; 267 HI_U16 au16Gb_Gain[HI_ISP_RLSC_POINTS]; 268 HI_U16 au16B_Gain[HI_ISP_RLSC_POINTS]; 269 } ISP_BNR_LSC_CALIB_TABLE_S; 270 271 typedef struct hiISP_CMOS_LSC_S { 272 HI_U16 u16MeshStrength; 273 HI_U8 u8MeshScale; 274 ISP_LSC_CABLI_TABLE_S astLscCalibTable[HI_ISP_MLSC_GAIN_LUT_NUM]; 275 ISP_BNR_LSC_CALIB_TABLE_S stBNRLscCalibTable; 276 } ISP_CMOS_LSC_S; 277 278 typedef struct hiISP_ACS_Y_SHADING_LUT_S { 279 HI_U16 u16GParamHighCT[HI_ISP_LSC_GRID_POINTS]; 280 HI_U16 u16GParamLowCT[HI_ISP_LSC_GRID_POINTS]; 281 } ISP_ACS_Y_SHADING_LUT_S; 282 283 typedef struct hiISP_ACS_COLOR_SHADING_LUT_S { 284 HI_FLOAT f32AvgRgMap[HI_ISP_LSC_GRID_POINTS]; 285 HI_FLOAT f32AvgBgMap[HI_ISP_LSC_GRID_POINTS]; 286 HI_FLOAT f32ProfRgMap[HI_ISP_LSC_GRID_POINTS]; 287 HI_FLOAT f32ProfBgMap[HI_ISP_LSC_GRID_POINTS]; 288 } ISP_ACS_COLOR_SHADING_LUT_S; 289 290 typedef struct hiISP_ACS_CALIB_PARAM_S { 291 HI_S16 u16LightIndex[HI_ISP_ACS_LIGHT_NUM * HI_ISP_ACS_CHN_NUM]; 292 HI_FLOAT f32ModelARMin; 293 HI_FLOAT f32ModelARStep; 294 HI_FLOAT f32ModelABMin; 295 HI_FLOAT f32ModelABStep; 296 HI_S16 u16LightTypeGHigh; 297 HI_S16 u16LightTypeGLow; 298 } ISP_ACS_CALIB_PARAM_S; 299 300 typedef struct hiISP_CMOS_ACS_S { 301 HI_BOOL bAcsEn; 302 HI_U16 u16AcsShadingStr; 303 ISP_ACS_CALIB_PARAM_S stAcsCalibParam; 304 ISP_ACS_Y_SHADING_LUT_S stAcsYShadingLut; 305 ISP_ACS_COLOR_SHADING_LUT_S stAcsColorShadingLut; 306 } ISP_CMOS_ACS_S; 307 308 typedef struct hiISP_CMOS_CA_S { 309 HI_BOOL bEnable; 310 HI_U16 au16YRatioLut[HI_ISP_CA_YRATIO_LUT_LENGTH]; /* 1.10bit Y Ratio For UV; Max = 2047 FW Limit */ 311 HI_S16 as16ISORatio[ISP_AUTO_ISO_STRENGTH_NUM]; /* 1.10bit ISO Ratio For UV,Max = 2047 FW Limi */ 312 } ISP_CMOS_CA_S; 313 314 typedef struct hiISP_CMOS_CLUT_S { 315 HI_BOOL bEnable; 316 HI_U32 u32GainR; 317 HI_U32 u32GainG; 318 HI_U32 u32GainB; 319 ISP_CLUT_LUT_S stClutLut; 320 } ISP_CMOS_CLUT_S; 321 322 typedef struct hiISP_CMOS_EXPANDER_POINT_S { 323 HI_U16 u16X; /* RW;Range:[0x0,0x100];Format:8.0;The X point of the knee */ 324 HI_U32 u32Y; /* RW;Range:[0x0,0x100000];Format:21.0;The Y point of the knee */ 325 } ISP_CMOS_EXPANDER_POINT_S; 326 327 #define ISP_EXPANDER_POINT_NUM_MAX (EXPANDER_NODE_NUM - 1) 328 typedef struct hiISP_CMOS_EXPANDER_S { 329 HI_BOOL bEnable; 330 HI_U8 u8BitDepthIn; /* RW;Range:[0xC,0x14];Format:5.0;The Bit depth of input */ 331 HI_U8 u8BitDepthOut; /* RW;Range:[0xC,0x14];Format:5.0;The Bit depth of output */ 332 HI_U16 u16ExpanderPointNum; /* Range:[1, 256] */ 333 ISP_CMOS_EXPANDER_POINT_S astExpanderPoint[ISP_EXPANDER_POINT_NUM_MAX]; 334 } ISP_CMOS_EXPANDER_S; 335 336 typedef struct hiISP_CMOS_GE_S { 337 HI_BOOL bEnable; /* RW,Range: [ 0, 1] */ 338 HI_U8 u8Slope; /* RW,Range: [ 0, 0xE] */ 339 HI_U8 u8SensiSlope; /* RW,Range: [ 0, 0xE] */ 340 HI_U16 u16SensiThr; /* RW,Range: [ 0, 0x3FFF] */ 341 HI_U16 au16Threshold[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW,Range: [ 0, 0x3FFF] */ 342 HI_U16 au16Strength[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW,Range: [ 0, 0x100] */ 343 HI_U16 au16NpOffset[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW,Range: [0x200, 0x3FFF] */ 344 } ISP_CMOS_GE_S; 345 346 typedef struct hiISP_CMOS_ANTIFALSECOLOR_S { 347 HI_BOOL bEnable; /* RW;Range:[0x0,0x1];Format:1.0; */ 348 HI_U8 au8AntiFalseColorThreshold[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW;Range:[0x0,0x20];Format:6.0; */ 349 HI_U8 au8AntiFalseColorStrength[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW;Range:[0x0,0x1F];Format:5.0; */ 350 } ISP_CMOS_ANTIFALSECOLOR_S; 351 352 typedef struct hiISP_CMOS_LDCI_S { 353 HI_BOOL bEnable; 354 HI_U8 u8GaussLPFSigma; 355 HI_U8 au8HePosWgt[ISP_AUTO_ISO_STRENGTH_NUM]; 356 HI_U8 au8HePosSigma[ISP_AUTO_ISO_STRENGTH_NUM]; 357 HI_U8 au8HePosMean[ISP_AUTO_ISO_STRENGTH_NUM]; 358 HI_U8 au8HeNegWgt[ISP_AUTO_ISO_STRENGTH_NUM]; 359 HI_U8 au8HeNegSigma[ISP_AUTO_ISO_STRENGTH_NUM]; 360 HI_U8 au8HeNegMean[ISP_AUTO_ISO_STRENGTH_NUM]; 361 HI_U16 au16BlcCtrl[ISP_AUTO_ISO_STRENGTH_NUM]; 362 } ISP_CMOS_LDCI_S; 363 364 typedef struct hiISP_CMOS_LCAC_MANUAL_S { 365 HI_U8 u8DePurpleCrStr; 366 HI_U8 u8DePurpleCbStr; 367 } ISP_CMOS_LCAC_MANUAL_S; 368 369 typedef struct hiISP_CMOS_LCAC_AUTO_S { 370 HI_U8 au8DePurpleCrStr[ISP_EXP_RATIO_STRENGTH_NUM]; 371 HI_U8 au8DePurpleCbStr[ISP_EXP_RATIO_STRENGTH_NUM]; 372 } ISP_CMOS_LCAC_AUTO_S; 373 374 typedef struct hiISP_CMOS_LCAC_S { 375 HI_BOOL bEnable; 376 ISP_OP_TYPE_E OpMode; 377 HI_U16 u16VarThr; 378 HI_U16 au16RLumaThd[ISP_LCAC_DET_NUM]; 379 HI_U16 au16GLumaThd[ISP_LCAC_DET_NUM]; 380 HI_U16 au16BLumaThd[ISP_LCAC_DET_NUM]; 381 HI_U16 au16YLumaThd[ISP_LCAC_DET_NUM]; 382 HI_S16 as16CbCrRatio[ISP_LCAC_DET_NUM]; 383 HI_U16 u16PurpleDetRange; 384 ISP_CMOS_LCAC_MANUAL_S stManual; 385 ISP_CMOS_LCAC_AUTO_S stAuto; 386 } ISP_CMOS_LCAC_S; 387 388 typedef struct hiISP_CMOS_SENSOR_MODE_S { 389 HI_U32 u32SensorID; 390 HI_U8 u8SensorMode; 391 HI_BOOL bValidDngRawFormat; 392 DNG_RAW_FORMAT_S stDngRawFormat; 393 } ISP_CMOS_SENSOR_MODE_S; 394 395 typedef struct hiISP_CMOS_DNG_COLORPARAM_S { 396 ISP_DNG_WBGAIN_S stWbGain1; /* the calibration White balance gain of colorcheker in A Light */ 397 ISP_DNG_WBGAIN_S stWbGain2; /* the calibration White balance gain of colorcheker in D50 Light */ 398 } ISP_CMOS_DNG_COLORPARAM_S; 399 400 typedef struct hiISP_CMOS_WDR_SWITCH_ATTR_S { 401 HI_U32 au32ExpRatio[EXP_RATIO_NUM]; 402 } ISP_CMOS_WDR_SWITCH_ATTR_S; 403 404 typedef union hiISP_CMOS_ALG_KEY_U { 405 HI_U64 u64Key; 406 struct { 407 HI_U64 bit1Drc : 1; /* [0] */ 408 HI_U64 bit1Demosaic : 1; /* [1] */ 409 HI_U64 bit1PreGamma : 1; /* [2] */ 410 HI_U64 bit1Gamma : 1; /* [3] */ 411 HI_U64 bit1Sharpen : 1; /* [4] */ 412 HI_U64 bit1EdgeMark : 1; /* [5] */ 413 HI_U64 bit1Hlc : 1; /* [6] */ 414 HI_U64 bit1Ldci : 1; /* [7] */ 415 HI_U64 bit1Dpc : 1; /* [8] */ 416 HI_U64 bit1Lsc : 1; /* [9] */ 417 HI_U64 bit1Ge : 1; /* [10] */ 418 HI_U64 bit1AntiFalseColor : 1; /* [11] */ 419 HI_U64 bit1BayerNr : 1; /* [12] */ 420 HI_U64 bit1Detail : 1; /* [13] */ 421 HI_U64 bit1Ca : 1; /* [14] */ 422 HI_U64 bit1Expander : 1; /* [15] */ 423 HI_U64 bit1Clut : 1; /* [16] */ 424 HI_U64 bit1Wdr : 1; /* [17] */ 425 HI_U64 bit1Dehaze : 1; /* [18] */ 426 HI_U64 bit1Lcac : 1; /* [19] */ 427 HI_U64 bit1Acs : 1; /* [20] */ 428 HI_U64 bit43Rsv : 43; /* [21:63] */ 429 }; 430 } ISP_CMOS_ALG_KEY_U; 431 432 typedef struct hiISP_CMOS_DEFAULT_S { 433 ISP_CMOS_ALG_KEY_U unKey; 434 const ISP_CMOS_DRC_S *pstDrc; 435 const ISP_CMOS_DEMOSAIC_S *pstDemosaic; 436 const ISP_CMOS_PREGAMMA_S *pstPreGamma; 437 const ISP_CMOS_GAMMA_S *pstGamma; 438 const ISP_CMOS_SHARPEN_S *pstSharpen; 439 const ISP_CMOS_EDGEMARK_S *pstEdgeMark; 440 const ISP_CMOS_HLC_S *pstHlc; 441 const ISP_CMOS_LDCI_S *pstLdci; 442 const ISP_CMOS_DPC_S *pstDpc; 443 const ISP_CMOS_LSC_S *pstLsc; 444 const ISP_CMOS_GE_S *pstGe; 445 const ISP_CMOS_ANTIFALSECOLOR_S *pstAntiFalseColor; 446 const ISP_CMOS_BAYERNR_S *pstBayerNr; 447 const ISP_CMOS_DETAIL_S *pstDetail; 448 const ISP_CMOS_CA_S *pstCa; 449 const ISP_CMOS_EXPANDER_S *pstExpander; 450 const ISP_CMOS_CLUT_S *pstClut; 451 const ISP_CMOS_WDR_S *pstWdr; 452 const ISP_CMOS_DEHAZE_S *pstDehaze; 453 const ISP_CMOS_LCAC_S *pstLcac; 454 const ISP_CMOS_ACS_S *pstAcs; 455 ISP_CMOS_NOISE_CALIBRATION_S stNoiseCalibration; 456 ISP_CMOS_SENSOR_MAX_RESOLUTION_S stSensorMaxResolution; 457 ISP_CMOS_SENSOR_MODE_S stSensorMode; 458 ISP_CMOS_DNG_COLORPARAM_S stDngColorParam; 459 ISP_CMOS_WDR_SWITCH_ATTR_S stWdrSwitchAttr; 460 } ISP_CMOS_DEFAULT_S; 461 462 typedef struct hiISP_CMOS_SENSOR_IMAGE_MODE_S { 463 HI_U16 u16Width; 464 HI_U16 u16Height; 465 HI_FLOAT f32Fps; 466 HI_U8 u8SnsMode; 467 } ISP_CMOS_SENSOR_IMAGE_MODE_S; 468 469 typedef struct hiISP_SENSOR_EXP_FUNC_S { 470 HI_VOID (*pfn_cmos_sensor_init)(VI_PIPE ViPipe); 471 HI_VOID (*pfn_cmos_sensor_exit)(VI_PIPE ViPipe); 472 HI_VOID (*pfn_cmos_sensor_global_init)(VI_PIPE ViPipe); 473 HI_S32 (*pfn_cmos_set_image_mode)(VI_PIPE ViPipe, ISP_CMOS_SENSOR_IMAGE_MODE_S *pstSensorImageMode); 474 HI_S32 (*pfn_cmos_set_wdr_mode)(VI_PIPE ViPipe, HI_U8 u8Mode); 475 476 /* the algs get data which is associated with sensor, except 3a */ 477 HI_S32 (*pfn_cmos_get_isp_default)(VI_PIPE ViPipe, ISP_CMOS_DEFAULT_S *pstDef); 478 HI_S32 (*pfn_cmos_get_isp_black_level)(VI_PIPE ViPipe, ISP_CMOS_BLACK_LEVEL_S *pstBlackLevel); 479 HI_S32 (*pfn_cmos_get_sns_reg_info)(VI_PIPE ViPipe, ISP_SNS_REGS_INFO_S *pstSnsRegsInfo); 480 481 /* the function of sensor set pixel detect */ 482 HI_VOID (*pfn_cmos_set_pixel_detect)(VI_PIPE ViPipe, HI_BOOL bEnable); 483 HI_S32 (*pfn_cmos_get_awb_gains)(VI_PIPE ViPipe, HI_U32 *pu32SensorAwbGain); 484 } ISP_SENSOR_EXP_FUNC_S; 485 486 typedef struct hiISP_SENSOR_REGISTER_S { 487 ISP_SENSOR_EXP_FUNC_S stSnsExp; 488 } ISP_SENSOR_REGISTER_S; 489 490 #ifdef __cplusplus 491 #if __cplusplus 492 } 493 #endif 494 #endif /* End of #ifdef __cplusplus */ 495 496 #endif /* __HI_COMM_SNS_H__ */ 497