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Searched refs:op1 (Results 1 – 10 of 10) sorted by relevance

/device/soc/bestechnic/bes2600/liteos_m/sdk/bsp/platform/cmsis/inc/
Dcmsis_gcc.h1022 __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) in __ROR() argument
1027 return op1; in __ROR()
1029 return (op1 >> op2) | (op1 << (32U - op2)); in __ROR()
1622 __STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2) in __SADD8() argument
1626 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __SADD8()
1630 __STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2) in __QADD8() argument
1634 __ASM ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __QADD8()
1638 __STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2) in __SHADD8() argument
1642 __ASM ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __SHADD8()
1646 __STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2) in __UADD8() argument
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/device/soc/st/stm32f4xx/sdk/Drivers/CMSIS/Include/
Dcmsis_gcc.h954 __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) in __ROR() argument
959 return op1; in __ROR()
961 return (op1 >> op2) | (op1 << (32U - op2)); in __ROR()
1538 __STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2) in __SADD8() argument
1542 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __SADD8()
1546 __STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2) in __QADD8() argument
1550 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __QADD8()
1554 __STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2) in __SHADD8() argument
1558 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __SHADD8()
1562 __STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2) in __UADD8() argument
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/device/soc/chipsea/cst85/liteos_m/sdk/bsp/arch/cmsis/
Dcmsis_gcc.h957 __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) in __ROR() argument
962 return op1; in __ROR()
964 return (op1 >> op2) | (op1 << (32U - op2)); in __ROR()
1541 __STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2) in __SADD8() argument
1545 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __SADD8()
1549 __STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2) in __QADD8() argument
1553 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __QADD8()
1557 __STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2) in __SHADD8() argument
1561 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __SHADD8()
1565 __STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2) in __UADD8() argument
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/device/soc/bestechnic/bes2600/liteos_m/sdk/bsp/platform/cmsis/inc/ca/
Dcmsis_gcc_ca.h113 __STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2) in __QSUB16() argument
117 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __QSUB16()
122 __STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2) in __QADD16() argument
126 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __QADD16()
130 __STATIC_FORCEINLINE int32_t __QADD( int32_t op1, int32_t op2) in __QADD() argument
134 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __QADD()
138 __STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc) in __SMLALD() argument
147 …__ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op… in __SMLALD()
149 …__ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op… in __SMLALD()
155 __STATIC_FORCEINLINE int32_t __QSUB( int32_t op1, int32_t op2) in __QSUB() argument
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Dcmsis_armclang_ca.h190 __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) in __ROR() argument
195 return op1; in __ROR()
197 return (op1 >> op2) | (op1 << (32U - op2)); in __ROR()
348 __STATIC_FORCEINLINE int32_t __QADD( int32_t op1, int32_t op2) in __QADD() argument
352 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __QADD()
356 __STATIC_FORCEINLINE int32_t __QSUB( int32_t op1, int32_t op2) in __QSUB() argument
360 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); in __QSUB()
370 __STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3) in __SMMLA() argument
374 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) ); in __SMMLA()
508 #define __get_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MRC p" # cp ", " # op1 ", %0, c" # CRn… argument
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Dcmsis_armcc_ca.h457 #define __get_CP(cp, op1, Rt, CRn, CRm, op2) do { register volatile uint32_t tmp __ASM("cp" # cp ":… argument
458 #define __set_CP(cp, op1, Rt, CRn, CRm, op2) do { register volatile uint32_t tmp __ASM("cp" # cp ":… argument
459 #define __get_CP64(cp, op1, Rt, CRm) \ argument
462 __ASM volatile("MRRC p" # cp ", " # op1 ", ltmp, htmp, c" # CRm); \
466 #define __set_CP64(cp, op1, Rt, CRm) \ argument
471 __ASM volatile("MCRR p" # cp ", " # op1 ", ltmp, htmp, c" # CRm); \
/device/soc/st/common/platform/stm32mp1xx_hal/STM32MP1xx_HAL_Driver/Inc/
Dcmsis_gcc.h216 __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) in __ROR() argument
220 return op1; in __ROR()
222 return (op1 >> op2) | (op1 << (32U - op2)); in __ROR()
594 #define __get_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MRC p" # cp ", " # op1 ", %0, c" # CRn… argument
595 #define __set_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MCR p" # cp ", " # op1 ", %0, c" # CRn… argument
596 #define __get_CP64(cp, op1, Rt, CRm) __ASM volatile("MRRC p" # cp ", " # op1 ", %Q0, %R0, c" # CRm … argument
597 #define __set_CP64(cp, op1, Rt, CRm) __ASM volatile("MCRR p" # cp ", " # op1 ", %Q0, %R0, c" # CRm … argument
/device/soc/hpmicro/sdk/hpm_sdk/drivers/inc/
Dhpm_romapi_xpi_def.h211 …_INSTR_SEQ(phase0, pad0, op0, phase1, pad1, op1) (SUB_INSTR(phase0, pad0, op0) | (SUB_INSTR(phase1… argument
/device/soc/winnermicro/wm800/board/include/arch/xt804/csi_core/
Dcsi_gcc.h1143 __ALWAYS_STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2) in __ROR() argument
1145 return (op1 >> op2) | (op1 << (32U - op2)); in __ROR()
1279 __ALWAYS_STATIC_INLINE uint32_t __RRX(uint32_t op1) in __RRX() argument
1287 : "=r"(op1), "=r"(res): "0"(op1), "1"(res): "t0"); in __RRX()
1298 : "=r"(op1), "=r"(res): "0"(op1), "1"(res): "r7"); in __RRX()
/device/qemu/SmartL_E802/liteos_m/board/hals/csky_driver/include/
Dcsi_gcc.h1170 __ALWAYS_STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2) in __ROR() argument
1172 return (op1 >> op2) | (op1 << (32U - op2)); in __ROR()
1310 __ALWAYS_STATIC_INLINE uint32_t __RRX(uint32_t op1) in __RRX() argument
1318 : "=r"(op1), "=r"(res): "0"(op1), "1"(res): "t0"); in __RRX()
1329 : "=r"(op1), "=r"(res): "0"(op1), "1"(res): "r7"); in __RRX()