Searched refs:GICD_ICFGR (Results 1 – 7 of 7) sorted by relevance
72 #define GICD_ICFGR(n) (GICD_OFFSET + 0xc00 + (n) * 4) /* Interrupt Configuration … macro
124 GIC_REG_32(GICD_ICFGR(i / 16)) = 0; /* 16: Register bit offset */ in HalIrqInit()
367 GIC_REG_32(GICD_ICFGR(i / 16)) = 0; in HalIrqInit()
30 #define GICD_ICFGR 0x0C00 macro236 #define GICR_ICFGR0 GICD_ICFGR
320 case GICD_ICFGR: in convert_offset_index()596 offset = convert_offset_index(d, GICD_ICFGR, &index); in gic_set_type()
588 REGISTER_DESC_WITH_BITS_PER_IRQ_SHARED(GICD_ICFGR,
88 offset = convert_offset_index(d, GICD_ICFGR, &index);