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Searched refs:qm (Results 1 – 25 of 31) sorted by relevance

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/kernel/linux/linux-5.10/drivers/crypto/hisilicon/
Dqm.c318 struct hisi_qm *qm; member
324 int (*get_vft)(struct hisi_qm *qm, u32 *base, u32 *number);
325 void (*qm_db)(struct hisi_qm *qm, u16 qn,
327 u32 (*get_irq_num)(struct hisi_qm *qm);
328 int (*debug_init)(struct hisi_qm *qm);
329 void (*hw_error_init)(struct hisi_qm *qm, u32 ce, u32 nfe, u32 fe);
330 void (*hw_error_uninit)(struct hisi_qm *qm);
331 enum acc_err_result (*hw_error_handle)(struct hisi_qm *qm);
390 static bool qm_avail_state(struct hisi_qm *qm, enum qm_state new) in qm_avail_state() argument
392 enum qm_state curr = atomic_read(&qm->status.flags); in qm_avail_state()
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Dqm.h182 int (*hw_init)(struct hisi_qm *qm);
183 void (*hw_err_enable)(struct hisi_qm *qm);
184 void (*hw_err_disable)(struct hisi_qm *qm);
185 u32 (*get_dev_hw_err_status)(struct hisi_qm *qm);
186 void (*clear_dev_hw_err_status)(struct hisi_qm *qm, u32 err_sts);
187 void (*open_axi_master_ooo)(struct hisi_qm *qm);
188 void (*close_axi_master_ooo)(struct hisi_qm *qm);
189 void (*log_dev_hw_err)(struct hisi_qm *qm, u32 err_sts);
283 struct hisi_qm *qm; member
344 int hisi_qm_init(struct hisi_qm *qm);
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DMakefile6 hisi_qm-objs = qm.o sgl.o
/kernel/linux/linux-5.10/drivers/crypto/hisilicon/sec2/
Dsec_main.c87 #define SEC_ADDR(qm, offset) ((qm)->io_base + (offset) + \ argument
244 static u8 sec_get_endian(struct hisi_qm *qm) in sec_get_endian() argument
252 if (qm->pdev->is_virtfn) { in sec_get_endian()
253 dev_err_ratelimited(&qm->pdev->dev, in sec_get_endian()
257 reg = readl_relaxed(qm->io_base + SEC_ENGINE_PF_CFG_OFF + in sec_get_endian()
273 static int sec_engine_init(struct hisi_qm *qm) in sec_engine_init() argument
279 reg = readl_relaxed(SEC_ADDR(qm, SEC_CONTROL_REG)); in sec_engine_init()
281 writel_relaxed(reg, SEC_ADDR(qm, SEC_CONTROL_REG)); in sec_engine_init()
283 writel_relaxed(0x1, SEC_ADDR(qm, SEC_MEM_START_INIT_REG)); in sec_engine_init()
285 ret = readl_relaxed_poll_timeout(SEC_ADDR(qm, SEC_MEM_INIT_DONE_REG), in sec_engine_init()
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Dsec.h159 struct hisi_qm *qm; member
178 struct hisi_qm qm; member
Dsec_crypto.c369 static int sec_create_qp_ctx(struct hisi_qm *qm, struct sec_ctx *ctx, in sec_create_qp_ctx() argument
450 sec = container_of(ctx->qps[0]->qm, struct sec_dev, qm); in sec_ctx_base_init()
452 ctx->dev = &sec->qm.pdev->dev; in sec_ctx_base_init()
467 ret = sec_create_qp_ctx(&sec->qm, ctx, i, 0); in sec_ctx_base_init()
/kernel/linux/linux-5.10/drivers/crypto/hisilicon/zip/
Dzip_main.c252 static int hisi_zip_set_user_domain_and_cache(struct hisi_qm *qm) in hisi_zip_set_user_domain_and_cache() argument
254 void __iomem *base = qm->io_base; in hisi_zip_set_user_domain_and_cache()
282 if (qm->use_sva) { in hisi_zip_set_user_domain_and_cache()
302 static void hisi_zip_hw_error_enable(struct hisi_qm *qm) in hisi_zip_hw_error_enable() argument
306 if (qm->ver == QM_HW_V1) { in hisi_zip_hw_error_enable()
308 qm->io_base + HZIP_CORE_INT_MASK_REG); in hisi_zip_hw_error_enable()
309 dev_info(&qm->pdev->dev, "Does not support hw error handle\n"); in hisi_zip_hw_error_enable()
314 writel(HZIP_CORE_INT_MASK_ALL, qm->io_base + HZIP_CORE_INT_SOURCE); in hisi_zip_hw_error_enable()
317 writel(0x1, qm->io_base + HZIP_CORE_INT_RAS_CE_ENB); in hisi_zip_hw_error_enable()
318 writel(0x0, qm->io_base + HZIP_CORE_INT_RAS_FE_ENB); in hisi_zip_hw_error_enable()
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Dzip_crypto.c156 struct device *dev = &qp->qm->pdev->dev; in hisi_zip_start_qp()
192 hisi_zip = container_of(qps[0]->qm, struct hisi_zip, qm); in hisi_zip_ctx_init()
312 dev = &tmp->qp->qm->pdev->dev; in hisi_zip_create_sgl_pool()
325 hisi_acc_free_sgl_pool(&ctx->qp_ctx[HZIP_QPC_COMP].qp->qm->pdev->dev, in hisi_zip_create_sgl_pool()
335 hisi_acc_free_sgl_pool(&ctx->qp_ctx[i].qp->qm->pdev->dev, in hisi_zip_release_sgl_pool()
358 struct device *dev = &qp->qm->pdev->dev; in hisi_zip_acomp_cb()
407 dev = &ctx->qp_ctx[0].qp->qm->pdev->dev; in hisi_zip_acomp_init()
500 dev_dbg(&qp_ctx->qp->qm->pdev->dev, "req cache is full!\n"); in hisi_zip_create_req()
527 struct device *dev = &qp->qm->pdev->dev; in hisi_zip_do_work()
585 struct device *dev = &qp_ctx->qp->qm->pdev->dev; in hisi_zip_acompress()
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Dzip.h27 struct hisi_qm qm; member
/kernel/linux/linux-5.10/drivers/crypto/hisilicon/hpre/
Dhpre_main.c71 #define HPRE_ADDR(qm, offset) ((qm)->io_base + (offset)) argument
217 static int hpre_cfg_by_dsm(struct hisi_qm *qm) in hpre_cfg_by_dsm() argument
219 struct device *dev = &qm->pdev->dev; in hpre_cfg_by_dsm()
246 static void disable_flr_of_bme(struct hisi_qm *qm) in disable_flr_of_bme() argument
250 val = readl(HPRE_ADDR(qm, QM_PEH_AXUSER_CFG)); in disable_flr_of_bme()
253 writel(val, HPRE_ADDR(qm, QM_PEH_AXUSER_CFG)); in disable_flr_of_bme()
254 writel(PEH_AXUSER_CFG_ENABLE, HPRE_ADDR(qm, QM_PEH_AXUSER_CFG_ENABLE)); in disable_flr_of_bme()
257 static int hpre_set_user_domain_and_cache(struct hisi_qm *qm) in hpre_set_user_domain_and_cache() argument
259 struct device *dev = &qm->pdev->dev; in hpre_set_user_domain_and_cache()
264 writel(HPRE_QM_USR_CFG_MASK, HPRE_ADDR(qm, QM_ARUSER_M_CFG_ENABLE)); in hpre_set_user_domain_and_cache()
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Dhpre.h64 struct hisi_qm qm; member
Dhpre_crypto.c30 #define HPRE_DEV(ctx) (&((ctx)->qp->qm->pdev->dev))
169 pci_err(qp->qm->pdev, "Can not start qp!\n"); in hpre_get_qp_and_start()
325 hpre = container_of(ctx->qp->qm, struct hpre, qm); in hpre_ctx_set()
/kernel/linux/linux-5.10/Documentation/ABI/testing/
Ddebugfs-hisi-zip26 has a QM. Select the QM which below qm refers to.
29 What: /sys/kernel/debug/hisi_zip/<bdf>/qm/regs
36 What: /sys/kernel/debug/hisi_zip/<bdf>/qm/current_q
43 What: /sys/kernel/debug/hisi_zip/<bdf>/qm/clear_enable
52 What: /sys/kernel/debug/hisi_zip/<bdf>/qm/err_irq
59 What: /sys/kernel/debug/hisi_zip/<bdf>/qm/aeq_irq
65 What: /sys/kernel/debug/hisi_zip/<bdf>/qm/abnormal_irq
71 What: /sys/kernel/debug/hisi_zip/<bdf>/qm/create_qp_err
77 What: /sys/kernel/debug/hisi_zip/<bdf>/qm/mb_err
83 What: /sys/kernel/debug/hisi_zip/<bdf>/qm/status
Ddebugfs-hisi-sec14 qm refers to.
17 What: /sys/kernel/debug/hisi_sec2/<bdf>/qm/qm_regs
24 What: /sys/kernel/debug/hisi_sec2/<bdf>/qm/current_q
31 What: /sys/kernel/debug/hisi_sec2/<bdf>/qm/clear_enable
39 What: /sys/kernel/debug/hisi_sec2/<bdf>/qm/err_irq
46 What: /sys/kernel/debug/hisi_sec2/<bdf>/qm/aeq_irq
52 What: /sys/kernel/debug/hisi_sec2/<bdf>/qm/abnormal_irq
58 What: /sys/kernel/debug/hisi_sec2/<bdf>/qm/create_qp_err
64 What: /sys/kernel/debug/hisi_sec2/<bdf>/qm/mb_err
70 What: /sys/kernel/debug/hisi_sec2/<bdf>/qm/status
Ddebugfs-hisi-hpre27 has a QM. Select the QM which below qm refers to.
36 What: /sys/kernel/debug/hisi_hpre/<bdf>/qm/regs
43 What: /sys/kernel/debug/hisi_hpre/<bdf>/qm/current_q
50 What: /sys/kernel/debug/hisi_hpre/<bdf>/qm/clear_enable
59 What: /sys/kernel/debug/hisi_hpre/<bdf>/qm/err_irq
66 What: /sys/kernel/debug/hisi_hpre/<bdf>/qm/aeq_irq
72 What: /sys/kernel/debug/hisi_hpre/<bdf>/qm/abnormal_irq
78 What: /sys/kernel/debug/hisi_hpre/<bdf>/qm/create_qp_err
84 What: /sys/kernel/debug/hisi_hpre/<bdf>/qm/mb_err
90 What: /sys/kernel/debug/hisi_hpre/<bdf>/qm/status
/kernel/linux/linux-5.10/drivers/soc/fsl/qbman/
Dqman.c1375 static void qman_destroy_portal(struct qman_portal *qm) in qman_destroy_portal() argument
1380 qm_dqrr_sdqcr_set(&qm->p, 0); in qman_destroy_portal()
1391 qm_eqcr_cce_update(&qm->p); in qman_destroy_portal()
1392 qm_eqcr_cce_update(&qm->p); in qman_destroy_portal()
1393 pcfg = qm->config; in qman_destroy_portal()
1395 free_irq(pcfg->irq, qm); in qman_destroy_portal()
1397 kfree(qm->cgrs); in qman_destroy_portal()
1398 qm_mc_finish(&qm->p); in qman_destroy_portal()
1399 qm_mr_finish(&qm->p); in qman_destroy_portal()
1400 qm_dqrr_finish(&qm->p); in qman_destroy_portal()
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/kernel/linux/linux-5.10/include/soc/fsl/
Dqman.h690 typedef enum qman_cb_dqrr_result (*qman_cb_dqrr)(struct qman_portal *qm,
698 typedef void (*qman_cb_mr)(struct qman_portal *qm, struct qman_fq *fq,
778 typedef void (*qman_cb_cgr)(struct qman_portal *qm,
/kernel/linux/linux-5.10/drivers/media/i2c/
Dst-mipid02.c350 struct v4l2_querymenu qm = {.id = V4L2_CID_LINK_FREQ, }; in mipid02_get_link_freq_from_cid_link_freq() local
357 qm.index = v4l2_ctrl_g_ctrl(ctrl); in mipid02_get_link_freq_from_cid_link_freq()
359 ret = v4l2_querymenu(subdev->ctrl_handler, &qm); in mipid02_get_link_freq_from_cid_link_freq()
363 return qm.value; in mipid02_get_link_freq_from_cid_link_freq()
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dkeystone-k2g-netcp.dtsi9 compatible = "ti,66ak2g-navss-qm";
/kernel/linux/linux-5.10/drivers/crypto/caam/
Dqi.c135 static void caam_fq_ern_cb(struct qman_portal *qm, struct qman_fq *fq, in caam_fq_ern_cb() argument
534 static void cgr_cb(struct qman_portal *qm, struct qman_cgr *cgr, int congested) in cgr_cb() argument
/kernel/linux/linux-5.10/fs/quota/
Ddquot.c199 int qm; in find_quota_format() local
203 for (qm = 0; module_names[qm].qm_fmt_id && in find_quota_format()
204 module_names[qm].qm_fmt_id != id; qm++) in find_quota_format()
206 if (!module_names[qm].qm_fmt_id || in find_quota_format()
207 request_module(module_names[qm].qm_mod_name)) in find_quota_format()
/kernel/linux/linux-5.10/drivers/media/pci/intel/ipu3/
Dipu3-cio2.c294 struct v4l2_querymenu qm = { .id = V4L2_CID_LINK_FREQ }; in cio2_csi2_calc_timing() local
308 qm.index = v4l2_ctrl_g_ctrl(link_freq); in cio2_csi2_calc_timing()
309 r = v4l2_querymenu(q->sensor->ctrl_handler, &qm); in cio2_csi2_calc_timing()
315 if (!qm.value) { in cio2_csi2_calc_timing()
319 freq = qm.value; in cio2_csi2_calc_timing()
/kernel/linux/linux-5.10/include/media/
Dv4l2-ctrls.h1342 int v4l2_querymenu(struct v4l2_ctrl_handler *hdl, struct v4l2_querymenu *qm);
/kernel/linux/linux-5.10/drivers/media/v4l2-core/
Dv4l2-ctrls.c3320 int v4l2_querymenu(struct v4l2_ctrl_handler *hdl, struct v4l2_querymenu *qm) in v4l2_querymenu() argument
3323 u32 i = qm->index; in v4l2_querymenu()
3325 ctrl = v4l2_ctrl_find(hdl, qm->id); in v4l2_querymenu()
3329 qm->reserved = 0; in v4l2_querymenu()
3354 strscpy(qm->name, ctrl->qmenu[i], sizeof(qm->name)); in v4l2_querymenu()
3356 qm->value = ctrl->qmenu_int[i]; in v4l2_querymenu()
/kernel/linux/patches/linux-5.10/imx8mm_patch/patches/drivers/
D0036_linux_drivers_staging.patch22734 +#define qm_err_isr_status_read(qm) \
22735 + __qm_err_isr_read(qm, qm_isr_status)
22736 +#define qm_err_isr_status_clear(qm, m) \
22737 + __qm_err_isr_write(qm, qm_isr_status, m)
22738 +#define qm_err_isr_enable_read(qm) \
22739 + __qm_err_isr_read(qm, qm_isr_enable)
22740 +#define qm_err_isr_enable_write(qm, v) \
22741 + __qm_err_isr_write(qm, qm_isr_enable, v)
22742 +#define qm_err_isr_disable_read(qm) \
22743 + __qm_err_isr_read(qm, qm_isr_disable)
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