Searched refs:SI_NUM_SHADER_BUFFERS (Results 1 – 6 of 6) sorted by relevance
| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_state.h | 44 #define SI_NUM_SHADER_BUFFERS 32 macro
631 return SI_NUM_SHADER_BUFFERS + slot; in si_get_constbuf_slot()
637 return SI_NUM_SHADER_BUFFERS - 1 - slot; in si_get_shaderbuf_slot()
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| D | si_shader_llvm_resources.c | 105 LLVMBuildAdd(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, SI_NUM_SHADER_BUFFERS, 0), ""); in load_ubo()
122 index = LLVMBuildSub(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, SI_NUM_SHADER_BUFFERS - 1, 0), in load_ssbo()
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| D | si_debug.c | 764 sctx->const_and_shader_buffers[processor].enabled_mask >> SI_NUM_SHADER_BUFFERS; in si_dump_descriptors()
766 for (int i = 0; i < SI_NUM_SHADER_BUFFERS; i++) { in si_dump_descriptors()
769 1llu << (SI_NUM_SHADER_BUFFERS - i - 1)) << i; in si_dump_descriptors()
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| D | si_descriptors.c | 1123 (i < SI_NUM_SHADER_BUFFERS ? buffers->priority : buffers->priority_constbuf)); in si_buffer_resources_begin_new_cs()
1423 assert(start_slot + count <= SI_NUM_SHADER_BUFFERS); in si_set_shader_buffers()
1752 u_bit_consecutive64(SI_NUM_SHADER_BUFFERS, SI_NUM_CONST_BUFFERS), in si_rebind_buffer()
1763 u_bit_consecutive64(0, SI_NUM_SHADER_BUFFERS), buf, in si_rebind_buffer()
2718 unsigned num_buffer_slots = SI_NUM_SHADER_BUFFERS + SI_NUM_CONST_BUFFERS; in si_init_all_descriptors()
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| D | si_get.c | 463 return SI_NUM_SHADER_BUFFERS; in si_get_shader_param()
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| /third_party/mesa3d/docs/relnotes/ |
| D | 20.2.0.rst | 3729 - radeonsi: bump SI_NUM_SHADER_BUFFERS to 32
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