1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Rockchip CIF Driver
4 *
5 * Copyright (C) 2018 Rockchip Electronics Co., Ltd.
6 */
7
8 #ifndef _RKCIF_DEV_H
9 #define _RKCIF_DEV_H
10
11 #include <linux/mutex.h>
12 #include <media/media-device.h>
13 #include <media/media-entity.h>
14 #include <media/v4l2-ctrls.h>
15 #include <media/v4l2-device.h>
16 #include <media/videobuf2-v4l2.h>
17 #include <media/v4l2-mc.h>
18 #include <linux/workqueue.h>
19 #include <linux/rk-camera-module.h>
20 #include <linux/rkcif-config.h>
21
22 #include "regs.h"
23 #include "version.h"
24 #include "cif-luma.h"
25 #include "mipi-csi2.h"
26 #include "hw.h"
27 #include "subdev-itf.h"
28
29 #define CIF_DRIVER_NAME "rkcif"
30 #define CIF_VIDEODEVICE_NAME "stream_cif"
31
32 #define OF_CIF_MONITOR_PARA "rockchip,cif-monitor"
33 #define OF_CIF_WAIT_LINE "wait-line"
34
35 #define CIF_MONITOR_PARA_NUM (5)
36
37 #define RKCIF_SINGLE_STREAM 1
38 #define RKCIF_STREAM_CIF 0
39 #define CIF_DVP_VDEV_NAME CIF_VIDEODEVICE_NAME "_dvp"
40 #define CIF_MIPI_ID0_VDEV_NAME CIF_VIDEODEVICE_NAME "_mipi_id0"
41 #define CIF_MIPI_ID1_VDEV_NAME CIF_VIDEODEVICE_NAME "_mipi_id1"
42 #define CIF_MIPI_ID2_VDEV_NAME CIF_VIDEODEVICE_NAME "_mipi_id2"
43 #define CIF_MIPI_ID3_VDEV_NAME CIF_VIDEODEVICE_NAME "_mipi_id3"
44
45 #define CIF_DVP_ID0_VDEV_NAME CIF_VIDEODEVICE_NAME "_dvp_id0"
46 #define CIF_DVP_ID1_VDEV_NAME CIF_VIDEODEVICE_NAME "_dvp_id1"
47 #define CIF_DVP_ID2_VDEV_NAME CIF_VIDEODEVICE_NAME "_dvp_id2"
48 #define CIF_DVP_ID3_VDEV_NAME CIF_VIDEODEVICE_NAME "_dvp_id3"
49
50 #define RKCIF_PLANE_Y 0
51 #define RKCIF_PLANE_CBCR 1
52
53 /*
54 * RK1808 support 5 channel inputs simultaneously:
55 * dvp + 4 mipi virtual channels;
56 * RV1126/RK356X support 4 channels of BT.656/BT.1120/MIPI
57 */
58 #define RKCIF_MULTI_STREAMS_NUM 5
59 #define RKCIF_STREAM_MIPI_ID0 0
60 #define RKCIF_STREAM_MIPI_ID1 1
61 #define RKCIF_STREAM_MIPI_ID2 2
62 #define RKCIF_STREAM_MIPI_ID3 3
63 #define RKCIF_MAX_STREAM_MIPI 4
64 #define RKCIF_MAX_STREAM_LVDS 4
65 #define RKCIF_MAX_STREAM_DVP 4
66 #define RKCIF_STREAM_DVP 4
67
68 #define RKCIF_MAX_SENSOR 2
69 #define RKCIF_MAX_CSI_CHANNEL 4
70 #define RKCIF_MAX_PIPELINE 4
71
72 #define RKCIF_DEFAULT_WIDTH 640
73 #define RKCIF_DEFAULT_HEIGHT 480
74 #define RKCIF_FS_DETECTED_NUM 2
75
76 #define RKCIF_RX_BUF_MAX 8
77
78 /*
79 * for HDR mode sync buf
80 */
81 #define RDBK_MAX 3
82 #define RDBK_TOISP_MAX 2
83 #define RDBK_L 0
84 #define RDBK_M 1
85 #define RDBK_S 2
86
87 /*
88 * for distinguishing cropping from senosr or usr
89 */
90 #define CROP_SRC_SENSOR_MASK (0x1 << 0)
91 #define CROP_SRC_USR_MASK (0x1 << 1)
92
93 enum rkcif_workmode {
94 RKCIF_WORKMODE_ONEFRAME = 0x00,
95 RKCIF_WORKMODE_PINGPONG = 0x01,
96 RKCIF_WORKMODE_LINELOOP = 0x02
97 };
98
99 enum rkcif_stream_mode {
100 RKCIF_STREAM_MODE_NONE = 0x0,
101 RKCIF_STREAM_MODE_CAPTURE = 0x01,
102 RKCIF_STREAM_MODE_TOISP = 0x02,
103 RKCIF_STREAM_MODE_TOSCALE = 0x04
104 };
105
106 enum rkcif_yuvaddr_state {
107 RKCIF_YUV_ADDR_STATE_UPDATE = 0x0,
108 RKCIF_YUV_ADDR_STATE_INIT = 0x1
109 };
110
111 enum rkcif_state {
112 RKCIF_STATE_DISABLED,
113 RKCIF_STATE_READY,
114 RKCIF_STATE_STREAMING,
115 RKCIF_STATE_RESET_IN_STREAMING,
116 };
117
118 enum rkcif_lvds_pad {
119 RKCIF_LVDS_PAD_SINK = 0x0,
120 RKCIF_LVDS_PAD_SRC_ID0,
121 RKCIF_LVDS_PAD_SRC_ID1,
122 RKCIF_LVDS_PAD_SRC_ID2,
123 RKCIF_LVDS_PAD_SRC_ID3,
124 RKCIF_LVDS_PAD_MAX
125 };
126
127 enum rkcif_lvds_state {
128 RKCIF_LVDS_STOP = 0,
129 RKCIF_LVDS_START,
130 };
131
132 enum rkcif_inf_id {
133 RKCIF_DVP,
134 RKCIF_MIPI_LVDS,
135 };
136
137 enum rkcif_clk_edge {
138 RKCIF_CLK_RISING = 0x0,
139 RKCIF_CLK_FALLING,
140 };
141
142 /*
143 * for distinguishing cropping from senosr or usr
144 */
145 enum rkcif_crop_src {
146 CROP_SRC_ACT = 0x0,
147 CROP_SRC_SENSOR,
148 CROP_SRC_USR,
149 CROP_SRC_MAX
150 };
151
152 /*
153 * struct rkcif_pipeline - An CIF hardware pipeline
154 *
155 * Capture device call other devices via pipeline
156 *
157 * @num_subdevs: number of linked subdevs
158 * @power_cnt: pipeline power count
159 * @stream_cnt: stream power count
160 */
161 struct rkcif_pipeline {
162 struct media_pipeline pipe;
163 int num_subdevs;
164 atomic_t power_cnt;
165 atomic_t stream_cnt;
166 struct v4l2_subdev *subdevs[RKCIF_MAX_PIPELINE];
167 int (*open)(struct rkcif_pipeline *p,
168 struct media_entity *me, bool prepare);
169 int (*close)(struct rkcif_pipeline *p);
170 int (*set_stream)(struct rkcif_pipeline *p, bool on);
171 };
172
173 struct rkcif_buffer {
174 struct vb2_v4l2_buffer vb;
175 struct list_head queue;
176 union {
177 u32 buff_addr[VIDEO_MAX_PLANES];
178 void *vaddr[VIDEO_MAX_PLANES];
179 };
180 };
181
182 struct rkcif_dummy_buffer {
183 struct list_head list;
184 struct dma_buf *dbuf;
185 dma_addr_t dma_addr;
186 struct page **pages;
187 void *mem_priv;
188 void *vaddr;
189 u32 size;
190 int dma_fd;
191 bool is_need_vaddr;
192 bool is_need_dbuf;
193 bool is_need_dmafd;
194 };
195
196 extern int rkcif_debug;
197
198 /*
199 * struct rkcif_sensor_info - Sensor infomations
200 * @sd: v4l2 subdev of sensor
201 * @mbus: media bus configuration
202 * @fi: v4l2 subdev frame interval
203 * @lanes: lane num of sensor
204 * @raw_rect: raw output rectangle of sensor, not crop or selection
205 * @selection: selection info of sensor
206 */
207 struct rkcif_sensor_info {
208 struct v4l2_subdev *sd;
209 struct v4l2_mbus_config mbus;
210 struct v4l2_subdev_frame_interval fi;
211 int lanes;
212 struct v4l2_rect raw_rect;
213 struct v4l2_subdev_selection selection;
214 };
215
216 enum cif_fmt_type {
217 CIF_FMT_TYPE_YUV = 0,
218 CIF_FMT_TYPE_RAW,
219 };
220
221 /*
222 * struct cif_output_fmt - The output format
223 *
224 * @bpp: bits per pixel for each cplanes
225 * @fourcc: pixel format in fourcc
226 * @fmt_val: the fmt val corresponding to CIF_FOR register
227 * @csi_fmt_val: the fmt val corresponding to CIF_CSI_ID_CTRL
228 * @cplanes: number of colour planes
229 * @mplanes: number of planes for format
230 * @raw_bpp: bits per pixel for raw format
231 * @fmt_type: image format, raw or yuv
232 */
233 struct cif_output_fmt {
234 u8 bpp[VIDEO_MAX_PLANES];
235 u32 fourcc;
236 u32 fmt_val;
237 u32 csi_fmt_val;
238 u8 cplanes;
239 u8 mplanes;
240 u8 raw_bpp;
241 enum cif_fmt_type fmt_type;
242 };
243
244 /*
245 * struct cif_input_fmt - The input mbus format from sensor
246 *
247 * @mbus_code: mbus format
248 * @dvp_fmt_val: the fmt val corresponding to CIF_FOR register
249 * @csi_fmt_val: the fmt val corresponding to CIF_CSI_ID_CTRL
250 * @fmt_type: image format, raw or yuv
251 * @field: the field type of the input from sensor
252 */
253 struct cif_input_fmt {
254 u32 mbus_code;
255 u32 dvp_fmt_val;
256 u32 csi_fmt_val;
257 u32 csi_yuv_order;
258 enum cif_fmt_type fmt_type;
259 enum v4l2_field field;
260 };
261
262 struct csi_channel_info {
263 unsigned char id;
264 unsigned char enable; /* capture enable */
265 unsigned char vc;
266 unsigned char data_type;
267 unsigned char data_bit;
268 unsigned char crop_en;
269 unsigned char cmd_mode_en;
270 unsigned char fmt_val;
271 unsigned char csi_fmt_val;
272 unsigned int width;
273 unsigned int height;
274 unsigned int virtual_width;
275 unsigned int crop_st_x;
276 unsigned int crop_st_y;
277 struct rkmodule_lvds_cfg lvds_cfg;
278 };
279
280 struct rkcif_vdev_node {
281 struct vb2_queue buf_queue;
282 /* vfd lock */
283 struct mutex vlock;
284 struct video_device vdev;
285 struct media_pad pad;
286 };
287
288 /*
289 * the mark that csi frame0/1 interrupts enabled
290 * in CIF_MIPI_INTEN
291 */
292 enum cif_frame_ready {
293 CIF_CSI_FRAME0_READY = 0x1,
294 CIF_CSI_FRAME1_READY
295 };
296
297 /* struct rkcif_hdr - hdr configured
298 * @op_mode: hdr optional mode
299 */
300 struct rkcif_hdr {
301 u8 mode;
302 };
303
304 /* struct rkcif_fps_stats - take notes on timestamp of buf
305 * @frm0_timestamp: timesstamp of buf in frm0
306 * @frm1_timestamp: timesstamp of buf in frm1
307 */
308 struct rkcif_fps_stats {
309 u64 frm0_timestamp;
310 u64 frm1_timestamp;
311 };
312
313 /* struct rkcif_fps_stats - take notes on timestamp of buf
314 * @fs_timestamp: timesstamp of frame start
315 * @fe_timestamp: timesstamp of frame end
316 * @wk_timestamp: timesstamp of buf send to user in wake up mode
317 * @readout_time: one frame of readout time
318 * @early_time: early time of buf send to user
319 * @total_time: totaltime of readout time in hdr
320 */
321 struct rkcif_readout_stats {
322 u64 fs_timestamp;
323 u64 fe_timestamp;
324 u64 wk_timestamp;
325 u64 readout_time;
326 u64 early_time;
327 u64 total_time;
328 };
329
330 /* struct rkcif_irq_stats - take notes on irq number
331 * @csi_overflow_cnt: count of csi overflow irq
332 * @csi_bwidth_lack_cnt: count of csi bandwidth lack irq
333 * @dvp_bus_err_cnt: count of dvp bus err irq
334 * @dvp_overflow_cnt: count dvp overflow irq
335 * @dvp_line_err_cnt: count dvp line err irq
336 * @dvp_pix_err_cnt: count dvp pix err irq
337 * @all_frm_end_cnt: raw frame end count
338 * @all_err_cnt: all err count
339 * @
340 */
341 struct rkcif_irq_stats {
342 u64 csi_overflow_cnt;
343 u64 csi_bwidth_lack_cnt;
344 u64 csi_size_err_cnt;
345 u64 dvp_bus_err_cnt;
346 u64 dvp_overflow_cnt;
347 u64 dvp_line_err_cnt;
348 u64 dvp_pix_err_cnt;
349 u64 dvp_size_err_cnt;
350 u64 dvp_bwidth_lack_cnt;
351 u64 all_frm_end_cnt;
352 u64 all_err_cnt;
353 };
354
355 /*
356 * the detecting mode of cif reset timer
357 * related with dts property:rockchip,cif-monitor
358 */
359 enum rkcif_monitor_mode {
360 RKCIF_MONITOR_MODE_IDLE = 0x0,
361 RKCIF_MONITOR_MODE_CONTINUE,
362 RKCIF_MONITOR_MODE_TRIGGER,
363 RKCIF_MONITOR_MODE_HOTPLUG,
364 };
365
366 /*
367 * the parameters to resume when reset cif in running
368 */
369 struct rkcif_resume_info {
370 u32 frm_sync_seq;
371 };
372
373 struct rkcif_work_struct {
374 struct work_struct work;
375 enum rkmodule_reset_src reset_src;
376 struct rkcif_resume_info resume_info;
377 };
378
379 struct rkcif_timer {
380 struct timer_list timer;
381 spinlock_t timer_lock;
382 spinlock_t csi2_err_lock;
383 unsigned long cycle;
384 /* unit: us */
385 unsigned long line_end_cycle;
386 unsigned int run_cnt;
387 unsigned int max_run_cnt;
388 unsigned int stop_index_of_run_cnt;
389 unsigned int last_buf_wakeup_cnt;
390 unsigned long csi2_err_cnt_even;
391 unsigned long csi2_err_cnt_odd;
392 unsigned int csi2_err_ref_cnt;
393 unsigned int csi2_err_fs_fe_cnt;
394 unsigned int csi2_err_fs_fe_detect_cnt;
395 unsigned int frm_num_of_monitor_cycle;
396 unsigned int triggered_frame_num;
397 unsigned int vts;
398 unsigned int raw_height;
399 /* unit: ms */
400 unsigned int err_time_interval;
401 unsigned int csi2_err_triggered_cnt;
402 unsigned int notifer_called_cnt;
403 unsigned long frame_end_cycle_us;
404 u64 csi2_first_err_timestamp;
405 bool is_triggered;
406 bool is_buf_stop_update;
407 bool is_running;
408 bool is_csi2_err_occurred;
409 bool has_been_init;
410 enum rkcif_monitor_mode monitor_mode;
411 enum rkmodule_reset_src reset_src;
412 };
413
414 struct rkcif_extend_info {
415 struct v4l2_pix_format_mplane pixm;
416 bool is_extended;
417 };
418
419 enum rkcif_capture_mode {
420 RKCIF_TO_DDR = 0,
421 RKCIF_TO_ISP_DDR,
422 RKCIF_TO_ISP_DMA,
423 };
424
425 struct rkcif_rx_buffer {
426 struct rkisp_rx_buf dbufs;
427 struct rkcif_dummy_buffer dummy;
428 };
429
430 enum rkcif_dma_en_mode {
431 RKCIF_DMAEN_BY_VICAP = 0x1,
432 RKCIF_DMAEN_BY_ISP = 0x2,
433 };
434
435 /*
436 * struct rkcif_stream - Stream states TODO
437 *
438 * @vbq_lock: lock to protect buf_queue
439 * @buf_queue: queued buffer list
440 * @dummy_buf: dummy space to store dropped data
441 * @crop_enable: crop status when stream off
442 * @crop_dyn_en: crop status when streaming
443 * rkcif use shadowsock registers, so it need two buffer at a time
444 * @curr_buf: the buffer used for current frame
445 * @next_buf: the buffer used for next frame
446 * @fps_lock: to protect parameters about calculating fps
447 */
448 struct rkcif_stream {
449 unsigned id:3;
450 struct rkcif_device *cifdev;
451 struct rkcif_vdev_node vnode;
452 enum rkcif_state state;
453 wait_queue_head_t wq_stopped;
454 unsigned int frame_idx;
455 int frame_phase;
456 int frame_phase_cache;
457 unsigned int crop_mask;
458 /* lock between irq and buf_queue */
459 struct list_head buf_head;
460 struct rkcif_buffer *curr_buf;
461 struct rkcif_buffer *next_buf;
462 struct rkcif_rx_buffer *curr_buf_toisp;
463 struct rkcif_rx_buffer *next_buf_toisp;
464
465 spinlock_t vbq_lock; /* vfd lock */
466 spinlock_t fps_lock;
467 /* TODO: pad for dvp and mipi separately? */
468 struct media_pad pad;
469
470 const struct cif_output_fmt *cif_fmt_out;
471 const struct cif_input_fmt *cif_fmt_in;
472 struct v4l2_pix_format_mplane pixm;
473 struct v4l2_rect crop[CROP_SRC_MAX];
474 struct rkcif_fps_stats fps_stats;
475 struct rkcif_extend_info extend_line;
476 struct rkcif_readout_stats readout;
477 unsigned int fs_cnt_in_single_frame;
478 unsigned int capture_mode;
479 struct rkcif_scale_vdev *scale_vdev;
480 int dma_en;
481 int to_en_dma;
482 int to_stop_dma;
483 unsigned int cur_stream_mode;
484 struct rkcif_rx_buffer rx_buf[RKCIF_RX_BUF_MAX];
485 struct list_head rx_buf_head;
486 int buf_num_toisp;
487 u64 line_int_cnt;
488 bool stopping;
489 bool crop_enable;
490 bool crop_dyn_en;
491 bool is_compact;
492 bool is_dvp_yuv_addr_init;
493 bool is_fs_fe_not_paired;
494 bool is_line_wake_up;
495 bool is_line_inten;
496 bool is_can_stop;
497 bool is_buf_active;
498 bool is_high_align;
499 bool to_en_scale;
500 };
501
502 struct rkcif_lvds_subdev {
503 struct rkcif_device *cifdev;
504 struct v4l2_subdev sd;
505 struct v4l2_subdev *remote_sd;
506 struct media_pad pads[RKCIF_LVDS_PAD_MAX];
507 struct v4l2_mbus_framefmt in_fmt;
508 struct v4l2_rect crop;
509 const struct cif_output_fmt *cif_fmt_out;
510 const struct cif_input_fmt *cif_fmt_in;
511 enum rkcif_lvds_state state;
512 struct rkcif_sensor_info sensor_self;
513 atomic_t frm_sync_seq;
514 };
515
516 struct rkcif_dvp_sof_subdev {
517 struct rkcif_device *cifdev;
518 struct v4l2_subdev sd;
519 atomic_t frm_sync_seq;
520 };
521
to_rkcif_buffer(struct vb2_v4l2_buffer * vb)522 static inline struct rkcif_buffer *to_rkcif_buffer(struct vb2_v4l2_buffer *vb)
523 {
524 return container_of(vb, struct rkcif_buffer, vb);
525 }
526
527 static inline
vdev_to_node(struct video_device * vdev)528 struct rkcif_vdev_node *vdev_to_node(struct video_device *vdev)
529 {
530 return container_of(vdev, struct rkcif_vdev_node, vdev);
531 }
532
533 static inline
to_rkcif_stream(struct rkcif_vdev_node * vnode)534 struct rkcif_stream *to_rkcif_stream(struct rkcif_vdev_node *vnode)
535 {
536 return container_of(vnode, struct rkcif_stream, vnode);
537 }
538
queue_to_node(struct vb2_queue * q)539 static inline struct rkcif_vdev_node *queue_to_node(struct vb2_queue *q)
540 {
541 return container_of(q, struct rkcif_vdev_node, buf_queue);
542 }
543
to_vb2_queue(struct file * file)544 static inline struct vb2_queue *to_vb2_queue(struct file *file)
545 {
546 struct rkcif_vdev_node *vnode = video_drvdata(file);
547
548 return &vnode->buf_queue;
549 }
550
551 #define SCALE_DRIVER_NAME "rkcif_scale"
552
553 #define RKCIF_SCALE_CH0 0
554 #define RKCIF_SCALE_CH1 1
555 #define RKCIF_SCALE_CH2 2
556 #define RKCIF_SCALE_CH3 3
557 #define RKCIF_MAX_SCALE_CH 4
558
559 #define CIF_SCALE_CH0_VDEV_NAME CIF_DRIVER_NAME "_scale_ch0"
560 #define CIF_SCALE_CH1_VDEV_NAME CIF_DRIVER_NAME "_scale_ch1"
561 #define CIF_SCALE_CH2_VDEV_NAME CIF_DRIVER_NAME "_scale_ch2"
562 #define CIF_SCALE_CH3_VDEV_NAME CIF_DRIVER_NAME "_scale_ch3"
563
564 #define RKCIF_SCALE_ENUM_SIZE_MAX 3
565
566 enum scale_ch_sw {
567 SCALE_MIPI0_ID0,
568 SCALE_MIPI0_ID1,
569 SCALE_MIPI0_ID2,
570 SCALE_MIPI0_ID3,
571 SCALE_MIPI1_ID0,
572 SCALE_MIPI1_ID1,
573 SCALE_MIPI1_ID2,
574 SCALE_MIPI1_ID3,
575 SCALE_MIPI2_ID0,
576 SCALE_MIPI2_ID1,
577 SCALE_MIPI2_ID2,
578 SCALE_MIPI2_ID3,
579 SCALE_MIPI3_ID0,
580 SCALE_MIPI3_ID1,
581 SCALE_MIPI3_ID2,
582 SCALE_MIPI3_ID3,
583 SCALE_MIPI4_ID0,
584 SCALE_MIPI4_ID1,
585 SCALE_MIPI4_ID2,
586 SCALE_MIPI4_ID3,
587 SCALE_MIPI5_ID0,
588 SCALE_MIPI5_ID1,
589 SCALE_MIPI5_ID2,
590 SCALE_MIPI5_ID3,
591 SCALE_DVP,
592 SCALE_CH_MAX,
593 };
594
595 enum scale_mode {
596 SCALE_8TIMES,
597 SCALE_16TIMES,
598 SCALE_32TIMES,
599 };
600
601 struct rkcif_scale_ch_info {
602 u32 width;
603 u32 height;
604 u32 vir_width;
605 };
606
607 struct rkcif_scale_src_res {
608 u32 width;
609 u32 height;
610 };
611
612 /*
613 * struct rkcif_scale_vdev - CIF Capture device
614 *
615 * @irq_lock: buffer queue lock
616 * @stat: stats buffer list
617 * @readout_wq: workqueue for statistics information read
618 */
619 struct rkcif_scale_vdev {
620 unsigned int ch:3;
621 struct rkcif_device *cifdev;
622 struct rkcif_vdev_node vnode;
623 struct rkcif_stream *stream;
624 struct list_head buf_head;
625 spinlock_t vbq_lock; /* vfd lock */
626 wait_queue_head_t wq_stopped;
627 struct v4l2_pix_format_mplane pixm;
628 const struct cif_output_fmt *scale_out_fmt;
629 struct rkcif_scale_ch_info ch_info;
630 struct rkcif_scale_src_res src_res;
631 struct rkcif_buffer *curr_buf;
632 struct rkcif_buffer *next_buf;
633 struct bayer_blc blc;
634 enum rkcif_state state;
635 unsigned int ch_src;
636 unsigned int scale_mode;
637 int frame_phase;
638 unsigned int frame_idx;
639 bool stopping;
640 };
641
642 static inline
to_rkcif_scale_vdev(struct rkcif_vdev_node * vnode)643 struct rkcif_scale_vdev *to_rkcif_scale_vdev(struct rkcif_vdev_node *vnode)
644 {
645 return container_of(vnode, struct rkcif_scale_vdev, vnode);
646 }
647
648 void rkcif_init_scale_vdev(struct rkcif_device *cif_dev, u32 ch);
649 int rkcif_register_scale_vdevs(struct rkcif_device *cif_dev,
650 int stream_num,
651 bool is_multi_input);
652 void rkcif_unregister_scale_vdevs(struct rkcif_device *cif_dev,
653 int stream_num);
654
655 /*
656 * struct rkcif_device - ISP platform device
657 * @base_addr: base register address
658 * @active_sensor: sensor in-use, set when streaming on
659 * @stream: capture video device
660 */
661 struct rkcif_device {
662 struct list_head list;
663 struct device *dev;
664 struct v4l2_device v4l2_dev;
665 struct media_device media_dev;
666 struct v4l2_async_notifier notifier;
667
668 struct rkcif_sensor_info sensors[RKCIF_MAX_SENSOR];
669 u32 num_sensors;
670 struct rkcif_sensor_info *active_sensor;
671 struct rkcif_sensor_info terminal_sensor;
672
673 struct rkcif_stream stream[RKCIF_MULTI_STREAMS_NUM];
674 struct rkcif_scale_vdev scale_vdev[RKCIF_MULTI_STREAMS_NUM];
675 struct rkcif_pipeline pipe;
676
677 struct csi_channel_info channels[RKCIF_MAX_CSI_CHANNEL];
678 int num_channels;
679 int chip_id;
680 atomic_t stream_cnt;
681 atomic_t fh_cnt;
682 struct mutex stream_lock; /* lock between streams */
683 struct mutex scale_lock; /* lock between scale dev */
684 enum rkcif_workmode workmode;
685 bool can_be_reset;
686 struct rkmodule_hdr_cfg hdr;
687 struct rkcif_buffer *rdbk_buf[RDBK_MAX];
688 struct rkcif_luma_vdev luma_vdev;
689 struct rkcif_lvds_subdev lvds_subdev;
690 struct rkcif_dvp_sof_subdev dvp_sof_subdev;
691 struct rkcif_hw *hw_dev;
692 irqreturn_t (*isr_hdl)(int irq, struct rkcif_device *cif_dev);
693 int inf_id;
694
695 struct sditf_priv *sditf;
696 struct proc_dir_entry *proc_dir;
697 struct rkcif_irq_stats irq_stats;
698 spinlock_t hdr_lock; /* lock for hdr buf sync */
699 struct rkcif_timer reset_watchdog_timer;
700 unsigned int buf_wake_up_cnt;
701 struct notifier_block reset_notifier; /* reset for mipi csi crc err */
702 struct rkcif_work_struct reset_work;
703 int id_use_cnt;
704 unsigned int csi_host_idx;
705 unsigned int dvp_sof_in_oneframe;
706 unsigned int wait_line;
707 unsigned int wait_line_bak;
708 unsigned int wait_line_cache;
709 struct rkcif_dummy_buffer dummy_buf;
710 bool is_start_hdr;
711 bool reset_work_cancel;
712 bool iommu_en;
713 bool is_use_dummybuf;
714 int sync_type;
715 };
716
717 extern struct platform_driver rkcif_plat_drv;
718 int rkcif_do_start_stream(struct rkcif_stream *stream,
719 enum rkcif_stream_mode mode);
720 void rkcif_do_stop_stream(struct rkcif_stream *stream,
721 enum rkcif_stream_mode mode);
722 void rkcif_irq_handle_scale(struct rkcif_device *cif_dev,
723 unsigned int intstat_glb);
724
725 int rkcif_scale_start(struct rkcif_scale_vdev *scale_vdev);
726
727 const struct
728 cif_input_fmt *get_input_fmt(struct v4l2_subdev *sd,
729 struct v4l2_rect *rect,
730 u32 pad_id, struct csi_channel_info *csi_info);
731
732 void rkcif_write_register(struct rkcif_device *dev,
733 enum cif_reg_index index, u32 val);
734 void rkcif_write_register_or(struct rkcif_device *dev,
735 enum cif_reg_index index, u32 val);
736 void rkcif_write_register_and(struct rkcif_device *dev,
737 enum cif_reg_index index, u32 val);
738 unsigned int rkcif_read_register(struct rkcif_device *dev,
739 enum cif_reg_index index);
740 void rkcif_write_grf_reg(struct rkcif_device *dev,
741 enum cif_reg_index index, u32 val);
742 u32 rkcif_read_grf_reg(struct rkcif_device *dev,
743 enum cif_reg_index index);
744 void rkcif_unregister_stream_vdevs(struct rkcif_device *dev,
745 int stream_num);
746 int rkcif_register_stream_vdevs(struct rkcif_device *dev,
747 int stream_num,
748 bool is_multi_input);
749 void rkcif_stream_init(struct rkcif_device *dev, u32 id);
750 void rkcif_set_default_fmt(struct rkcif_device *cif_dev);
751 void rkcif_irq_oneframe(struct rkcif_device *cif_dev);
752 void rkcif_irq_pingpong(struct rkcif_device *cif_dev);
753 void rkcif_irq_pingpong_v1(struct rkcif_device *cif_dev);
754 unsigned int rkcif_irq_global(struct rkcif_device *cif_dev);
755 void rkcif_irq_handle_toisp(struct rkcif_device *cif_dev, unsigned int intstat_glb);
756 void rkcif_soft_reset(struct rkcif_device *cif_dev,
757 bool is_rst_iommu);
758 int rkcif_register_lvds_subdev(struct rkcif_device *dev);
759 void rkcif_unregister_lvds_subdev(struct rkcif_device *dev);
760 int rkcif_register_dvp_sof_subdev(struct rkcif_device *dev);
761 void rkcif_unregister_dvp_sof_subdev(struct rkcif_device *dev);
762 void rkcif_irq_lite_lvds(struct rkcif_device *cif_dev);
763 int rkcif_plat_init(struct rkcif_device *cif_dev, struct device_node *node, int inf_id);
764 int rkcif_plat_uninit(struct rkcif_device *cif_dev);
765 int rkcif_attach_hw(struct rkcif_device *cif_dev);
766 int rkcif_update_sensor_info(struct rkcif_stream *stream);
767 int rkcif_reset_notifier(struct notifier_block *nb, unsigned long action, void *data);
768 void rkcif_reset_watchdog_timer_handler(struct timer_list *t);
769 void rkcif_config_dvp_clk_sampling_edge(struct rkcif_device *dev,
770 enum rkcif_clk_edge edge);
771 void rkcif_enable_dvp_clk_dual_edge(struct rkcif_device *dev, bool on);
772 void rkcif_reset_work(struct work_struct *work);
773
774 int rkcif_init_rx_buf(struct rkcif_stream *stream, int buf_num);
775 void rkcif_free_rx_buf(struct rkcif_stream *stream, int buf_num);
776
777 int rkcif_set_fmt(struct rkcif_stream *stream,
778 struct v4l2_pix_format_mplane *pixm,
779 bool try);
780 void rkcif_enable_dma_capture(struct rkcif_stream *stream);
781
782 u32 rkcif_mbus_pixelcode_to_v4l2(u32 pixelcode);
783
784 extern const struct vb2_mem_ops vb2_rdma_sg_memops;
785
786 #endif
787