1 /* 2 * Rockchip isp1 driver 3 * 4 * Copyright (C) 2017 Rockchip Electronics Co., Ltd. 5 * 6 * This software is available to you under a choice of one of two 7 * licenses. You may choose to be licensed under the terms of the GNU 8 * General Public License (GPL) Version 2, available from the file 9 * COPYING in the main directory of this source tree, or the 10 * OpenIB.org BSD license below: 11 * 12 * Redistribution and use in source and binary forms, with or 13 * without modification, are permitted provided that the following 14 * conditions are met: 15 * 16 * - Redistributions of source code must retain the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer. 19 * 20 * - Redistributions in binary form must reproduce the above 21 * copyright notice, this list of conditions and the following 22 * disclaimer in the documentation and/or other materials 23 * provided with the distribution. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32 * SOFTWARE. 33 */ 34 35 #ifndef _RKISP_PATH_VIDEO_H 36 #define _RKISP_PATH_VIDEO_H 37 38 #include "common.h" 39 #include "capture_v1x.h" 40 #include "capture_v2x.h" 41 #include "capture_v3x.h" 42 #include "isp_ispp.h" 43 44 #define SP_VDEV_NAME DRIVER_NAME "_selfpath" 45 #define MP_VDEV_NAME DRIVER_NAME "_mainpath" 46 #define FBC_VDEV_NAME DRIVER_NAME "_fbcpath" 47 #define BP_VDEV_NAME DRIVER_NAME "_fullpath" 48 #define VIR_VDEV_NAME DRIVER_NAME "_iqtool" 49 50 #define DMATX0_VDEV_NAME DRIVER_NAME "_rawwr0" 51 #define DMATX1_VDEV_NAME DRIVER_NAME "_rawwr1" 52 #define DMATX2_VDEV_NAME DRIVER_NAME "_rawwr2" 53 #define DMATX3_VDEV_NAME DRIVER_NAME "_rawwr3" 54 55 struct rkisp_stream; 56 57 enum { 58 RDBK_L, 59 RDBK_M, 60 RDBK_S, 61 RDBK_MAX, 62 }; 63 64 enum { 65 RKISP_STREAM_MP, 66 RKISP_STREAM_SP, 67 RKISP_STREAM_DMATX0, 68 RKISP_STREAM_DMATX1, 69 RKISP_STREAM_DMATX2, 70 RKISP_STREAM_DMATX3, 71 RKISP_STREAM_FBC, 72 RKISP_STREAM_BP, 73 RKISP_STREAM_VIR, 74 RKISP_MAX_STREAM, 75 }; 76 77 /* 78 * @fourcc: pixel format 79 * @mbus_code: pixel format over bus 80 * @fmt_type: helper filed for pixel format 81 * @bpp: bits per pixel 82 * @bayer_pat: bayer patten type 83 * @cplanes: number of colour planes 84 * @mplanes: number of stored memory planes 85 * @uv_swap: if cb cr swaped, for yuv 86 * @write_format: defines how YCbCr self picture data is written to memory 87 * @input_format: defines sp input format 88 * @output_format: defines sp output format 89 */ 90 struct capture_fmt { 91 u32 fourcc; 92 u32 mbus_code; 93 u8 fmt_type; 94 u8 cplanes; 95 u8 mplanes; 96 u8 uv_swap; 97 u32 write_format; 98 u32 output_format; 99 u8 bpp[VIDEO_MAX_PLANES]; 100 }; 101 102 enum rkisp_sp_inp { 103 RKISP_SP_INP_ISP, 104 RKISP_SP_INP_DMA_SP, 105 RKISP_SP_INP_MAX 106 }; 107 108 enum rkisp_field { 109 RKISP_FIELD_ODD, 110 RKISP_FIELD_EVEN, 111 RKISP_FIELD_INVAL, 112 }; 113 114 struct rkisp_stream_sp { 115 int y_stride; 116 int vir_offs; 117 enum rkisp_sp_inp input_sel; 118 enum rkisp_field field; 119 enum rkisp_field field_rec; 120 }; 121 122 struct rkisp_stream_mp { 123 bool raw_enable; 124 }; 125 126 struct rkisp_stream_dmatx { 127 u8 pre_stop; 128 u8 is_config; 129 }; 130 131 struct rkisp_stream_dmarx { 132 int y_stride; 133 }; 134 135 /* Different config between selfpath and mainpath */ 136 struct stream_config { 137 const struct capture_fmt *fmts; 138 int fmt_size; 139 int max_rsz_width; 140 int max_rsz_height; 141 int min_rsz_width; 142 int min_rsz_height; 143 const int frame_end_id; 144 /* registers */ 145 struct { 146 u32 ctrl; 147 u32 ctrl_shd; 148 u32 scale_hy; 149 u32 scale_hcr; 150 u32 scale_hcb; 151 u32 scale_vy; 152 u32 scale_vc; 153 u32 scale_lut; 154 u32 scale_lut_addr; 155 u32 scale_hy_shd; 156 u32 scale_hcr_shd; 157 u32 scale_hcb_shd; 158 u32 scale_vy_shd; 159 u32 scale_vc_shd; 160 u32 phase_hy; 161 u32 phase_hc; 162 u32 phase_vy; 163 u32 phase_vc; 164 u32 phase_hy_shd; 165 u32 phase_hc_shd; 166 u32 phase_vy_shd; 167 u32 phase_vc_shd; 168 } rsz; 169 struct { 170 u32 ctrl; 171 u32 yuvmode_mask; 172 u32 rawmode_mask; 173 u32 h_offset; 174 u32 v_offset; 175 u32 h_size; 176 u32 v_size; 177 } dual_crop; 178 struct { 179 u32 y_size_init; 180 u32 cb_size_init; 181 u32 cr_size_init; 182 u32 y_base_ad_init; 183 u32 cb_base_ad_init; 184 u32 cr_base_ad_init; 185 u32 y_offs_cnt_init; 186 u32 cb_offs_cnt_init; 187 u32 cr_offs_cnt_init; 188 u32 y_base_ad_shd; 189 u32 length; 190 } mi; 191 struct { 192 u32 ctrl; 193 u32 pic_size; 194 u32 pic_offs; 195 } dma; 196 }; 197 198 /* Different reg ops between selfpath and mainpath */ 199 struct streams_ops { 200 int (*config_mi)(struct rkisp_stream *stream); 201 void (*stop_mi)(struct rkisp_stream *stream); 202 void (*enable_mi)(struct rkisp_stream *stream); 203 void (*disable_mi)(struct rkisp_stream *stream); 204 void (*set_data_path)(struct rkisp_stream *stream); 205 bool (*is_stream_stopped)(void __iomem *base); 206 void (*update_mi)(struct rkisp_stream *stream); 207 int (*frame_end)(struct rkisp_stream *stream); 208 }; 209 210 /* 211 * struct rkisp_stream - ISP capture video device 212 * 213 * @id: stream video identify 214 * @interlaced: selfpath interlaced flag 215 * @out_isp_fmt: output isp format 216 * @out_fmt: output buffer size 217 * @dcrop: coordinates of dual-crop 218 * 219 * @vbq_lock: lock to protect buf_queue 220 * @buf_queue: queued buffer list 221 * 222 * rkisp use shadowsock registers, so it need two buffer at a time 223 * @curr_buf: the buffer used for current frame 224 * @next_buf: the buffer used for next frame 225 * @linked: stream link to isp 226 * @done: wait frame end event queue 227 * @burst: burst length for Y and CB/CR 228 * @sequence: damtx video frame sequence 229 */ 230 struct rkisp_stream { 231 unsigned int id; 232 unsigned interlaced:1; 233 struct rkisp_device *ispdev; 234 struct rkisp_vdev_node vnode; 235 struct capture_fmt out_isp_fmt; 236 struct v4l2_pix_format_mplane out_fmt; 237 struct v4l2_rect dcrop; 238 struct streams_ops *ops; 239 struct stream_config *config; 240 spinlock_t vbq_lock; 241 struct list_head buf_queue; 242 struct rkisp_buffer *curr_buf; 243 struct rkisp_buffer *next_buf; 244 struct mutex apilock; 245 bool streaming; 246 bool stopping; 247 bool frame_end; 248 bool linked; 249 bool start_stream; 250 wait_queue_head_t done; 251 unsigned int burst; 252 atomic_t sequence; 253 struct frame_debug_info dbg; 254 u8 conn_id; 255 u32 memory; 256 union { 257 struct rkisp_stream_sp sp; 258 struct rkisp_stream_mp mp; 259 struct rkisp_stream_dmarx dmarx; 260 struct rkisp_stream_dmatx dmatx; 261 } u; 262 }; 263 264 struct rkisp_vir_cpy { 265 struct work_struct work; 266 struct completion cmpl; 267 struct list_head queue; 268 struct rkisp_stream *stream; 269 }; 270 271 struct rkisp_capture_device { 272 struct rkisp_device *ispdev; 273 struct rkisp_stream stream[RKISP_MAX_STREAM]; 274 struct rkisp_buffer *rdbk_buf[RDBK_MAX]; 275 struct rkisp_vir_cpy vir_cpy; 276 atomic_t refcnt; 277 u32 wait_line; 278 bool is_done_early; 279 }; 280 281 extern struct stream_config rkisp_mp_stream_config; 282 extern struct stream_config rkisp_sp_stream_config; 283 284 void rkisp_unregister_stream_vdev(struct rkisp_stream *stream); 285 int rkisp_register_stream_vdev(struct rkisp_stream *stream); 286 void rkisp_unregister_stream_vdevs(struct rkisp_device *dev); 287 int rkisp_register_stream_vdevs(struct rkisp_device *dev); 288 void rkisp_mi_isr(u32 mis_val, struct rkisp_device *dev); 289 void rkisp_set_stream_def_fmt(struct rkisp_device *dev, u32 id, 290 u32 width, u32 height, u32 pixelformat); 291 int rkisp_fcc_xysubs(u32 fcc, u32 *xsubs, u32 *ysubs); 292 int rkisp_mbus_code_xysubs(u32 code, u32 *xsubs, u32 *ysubs); 293 int rkisp_fh_open(struct file *filp); 294 int rkisp_fop_release(struct file *file); 295 #endif /* _RKISP_PATH_VIDEO_H */ 296