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1 /* SPDX-License-Identifier: ((GPL-2.0+ WITH Linux-syscall-note) OR MIT)
2  *
3  * Copyright (C) 2019 Rockchip Electronics Co., Ltd.
4  */
5 
6 #ifndef _UAPI_RKISPP_CONFIG_H
7 #define _UAPI_RKISPP_CONFIG_H
8 
9 #include <linux/types.h>
10 #include <linux/v4l2-controls.h>
11 
12 #define ISPP_API_VERSION		KERNEL_VERSION(1, 8, 0)
13 
14 #define ISPP_ID_TNR			(0)
15 #define ISPP_ID_NR			(1)
16 #define ISPP_ID_SHP			(2)
17 #define ISPP_ID_FEC			(3)
18 #define ISPP_ID_ORB			(4)
19 #define ISPP_ID_MAX			(5)
20 
21 #define ISPP_MODULE_TNR			BIT(ISPP_ID_TNR)//2TO1
22 #define ISPP_MODULE_NR			BIT(ISPP_ID_NR)
23 #define ISPP_MODULE_SHP			BIT(ISPP_ID_SHP)
24 #define ISPP_MODULE_FEC			BIT(ISPP_ID_FEC)//CALIBRATION
25 #define ISPP_MODULE_ORB			BIT(ISPP_ID_ORB)
26 //extra function
27 #define ISPP_MODULE_TNR_3TO1		(BIT(16) | ISPP_MODULE_TNR)
28 #define ISPP_MODULE_FEC_ST		(BIT(17) | ISPP_MODULE_FEC)//STABILIZATION
29 
30 #define TNR_SIGMA_CURVE_SIZE		17
31 #define TNR_LUMA_CURVE_SIZE		6
32 #define TNR_GFCOEF6_SIZE		6
33 #define TNR_GFCOEF3_SIZE		3
34 #define TNR_SCALE_YG_SIZE		4
35 #define TNR_SCALE_YL_SIZE		3
36 #define TNR_SCALE_CG_SIZE		3
37 #define TNR_SCALE_Y2CG_SIZE		3
38 #define TNR_SCALE_CL_SIZE		2
39 #define TNR_SCALE_Y2CL_SIZE		3
40 #define TNR_WEIGHT_Y_SIZE		3
41 
42 #define NR_UVNR_UVGAIN_SIZE		2
43 #define NR_UVNR_T1FLT_WTQ_SIZE		8
44 #define NR_UVNR_T2GEN_WTQ_SIZE		4
45 #define NR_UVNR_T2FLT_WT_SIZE		3
46 #define NR_YNR_SGM_DX_SIZE		16
47 #define NR_YNR_SGM_Y_SIZE		17
48 #define NR_YNR_HWEIT_D_SIZE		20
49 #define NR_YNR_HGRAD_Y_SIZE		24
50 #define NR_YNR_HSTV_Y_SIZE		17
51 #define NR_YNR_CI_SIZE			4
52 #define NR_YNR_LGAIN_MIN_SIZE		4
53 #define NR_YNR_LWEIT_FLT_SIZE		4
54 #define NR_YNR_HGAIN_SGM_SIZE		4
55 #define NR_YNR_HWEIT_SIZE		4
56 #define NR_YNR_LWEIT_CMP_SIZE		2
57 #define NR_YNR_ST_SCALE_SIZE		3
58 
59 #define SHP_PBF_KERNEL_SIZE		3
60 #define SHP_MRF_KERNEL_SIZE		6
61 #define SHP_MBF_KERNEL_SIZE		12
62 #define SHP_HRF_KERNEL_SIZE		6
63 #define SHP_HBF_KERNEL_SIZE		3
64 #define SHP_EDGE_COEF_SIZE		3
65 #define SHP_EDGE_SMOTH_SIZE		3
66 #define SHP_EDGE_GAUS_SIZE		6
67 #define SHP_DOG_KERNEL_SIZE		6
68 #define SHP_LUM_POINT_SIZE		6
69 #define SHP_SIGMA_SIZE			8
70 #define SHP_LUM_CLP_SIZE		8
71 #define SHP_LUM_MIN_SIZE		8
72 #define SHP_EDGE_LUM_THED_SIZE		8
73 #define SHP_CLAMP_SIZE			8
74 #define SHP_DETAIL_ALPHA_SIZE		8
75 
76 #define ORB_DATA_NUM			10000
77 #define ORB_BRIEF_NUM			15
78 #define ORB_DUMMY_NUM			13
79 
80 #define FEC_MESH_XY_POINT_SIZE		6
81 #define FEC_MESH_XY_NUM			131072
82 #define FEC_MESH_BUF_NUM		2
83 
84 #define TNR_BUF_IDXFD_NUM		64
85 
86 /************VIDIOC_PRIVATE*************/
87 #define RKISPP_CMD_GET_FECBUF_INFO	\
88 	_IOR('V', BASE_VIDIOC_PRIVATE + 0, struct rkispp_fecbuf_info)
89 
90 #define RKISPP_CMD_SET_FECBUF_SIZE	\
91 	_IOW('V', BASE_VIDIOC_PRIVATE + 1, struct rkispp_fecbuf_size)
92 
93 #define RKISPP_CMD_FEC_IN_OUT \
94 	_IOW('V', BASE_VIDIOC_PRIVATE + 10, struct rkispp_fec_in_out)
95 
96 #define RKISPP_CMD_TRIGGER_YNRRUN       \
97 	_IOW('V', BASE_VIDIOC_PRIVATE + 11, struct rkispp_tnr_inf)
98 
99 #define RKISPP_CMD_GET_TNRBUF_FD \
100 	_IOR('V', BASE_VIDIOC_PRIVATE + 12, struct rkispp_buf_idxfd)
101 
102 #define RKISPP_CMD_TRIGGER_MODE		\
103 	_IOW('V', BASE_VIDIOC_PRIVATE + 13, struct rkispp_trigger_mode)
104 
105 /************EVENT_PRIVATE**************/
106 #define RKISPP_V4L2_EVENT_TNR_COMPLETE  \
107 	(V4L2_EVENT_PRIVATE_START + 3)
108 
109 struct rkispp_fec_in_out {
110 	int width;
111 	int height;
112 	int in_fourcc;
113 	int out_fourcc;
114 	int in_pic_fd;
115 	int out_pic_fd;
116 	int mesh_xint_fd;
117 	int mesh_xfra_fd;
118 	int mesh_yint_fd;
119 	int mesh_yfra_fd;
120 };
121 
122 struct rkispp_tnr_inf {
123 	u32 dev_id;
124 	u32 frame_id;
125 	u32 gainkg_idx;
126 	u32 gainwr_idx;
127 	u32 gainkg_size;
128 	u32 gainwr_size;
129 } __attribute__ ((packed));
130 
131 struct rkispp_buf_idxfd {
132 	u32 buf_num;
133 	u32 index[TNR_BUF_IDXFD_NUM];
134 	s32 dmafd[TNR_BUF_IDXFD_NUM];
135 } __attribute__ ((packed));
136 
137 struct rkispp_trigger_mode {
138 	u32 module;
139 	u32 on;
140 } __attribute__ ((packed));
141 
142 struct rkispp_tnr_config {
143 	u8 opty_en;
144 	u8 optc_en;
145 	u8 gain_en;
146 	u8 pk0_y;
147 	u8 pk1_y;
148 	u8 pk0_c;
149 	u8 pk1_c;
150 	u8 glb_gain_cur_sqrt;
151 	u8 sigma_x[TNR_SIGMA_CURVE_SIZE - 1];
152 	u8 gfcoef_y0[TNR_GFCOEF6_SIZE];
153 	u8 gfcoef_y1[TNR_GFCOEF3_SIZE];
154 	u8 gfcoef_y2[TNR_GFCOEF3_SIZE];
155 	u8 gfcoef_y3[TNR_GFCOEF3_SIZE];
156 	u8 gfcoef_yg0[TNR_GFCOEF6_SIZE];
157 	u8 gfcoef_yg1[TNR_GFCOEF3_SIZE];
158 	u8 gfcoef_yg2[TNR_GFCOEF3_SIZE];
159 	u8 gfcoef_yg3[TNR_GFCOEF3_SIZE];
160 	u8 gfcoef_yl0[TNR_GFCOEF6_SIZE];
161 	u8 gfcoef_yl1[TNR_GFCOEF3_SIZE];
162 	u8 gfcoef_yl2[TNR_GFCOEF3_SIZE];
163 	u8 gfcoef_cg0[TNR_GFCOEF6_SIZE];
164 	u8 gfcoef_cg1[TNR_GFCOEF3_SIZE];
165 	u8 gfcoef_cg2[TNR_GFCOEF3_SIZE];
166 	u8 gfcoef_cl0[TNR_GFCOEF6_SIZE];
167 	u8 gfcoef_cl1[TNR_GFCOEF3_SIZE];
168 	u8 weight_y[TNR_WEIGHT_Y_SIZE];
169 
170 	u16 glb_gain_cur __attribute__((aligned(2)));
171 	u16 glb_gain_nxt;
172 	u16 glb_gain_cur_div;
173 	u16 txt_th1_y;
174 	u16 txt_th0_c;
175 	u16 txt_th1_c;
176 	u16 txt_thy_dlt;
177 	u16 txt_thc_dlt;
178 	u16 txt_th0_y;
179 	u16 sigma_y[TNR_SIGMA_CURVE_SIZE];
180 	u16 luma_curve[TNR_LUMA_CURVE_SIZE];
181 	u16 scale_yg[TNR_SCALE_YG_SIZE];
182 	u16 scale_yl[TNR_SCALE_YL_SIZE];
183 	u16 scale_cg[TNR_SCALE_CG_SIZE];
184 	u16 scale_y2cg[TNR_SCALE_Y2CG_SIZE];
185 	u16 scale_cl[TNR_SCALE_CL_SIZE];
186 	u16 scale_y2cl[TNR_SCALE_Y2CL_SIZE];
187 } __attribute__ ((packed));
188 
189 struct rkispp_nr_config {
190 	u8 uvnr_step1_en;
191 	u8 uvnr_step2_en;
192 	u8 nr_gain_en;
193 	u8 uvnr_sd32_self_en;
194 	u8 uvnr_nobig_en;
195 	u8 uvnr_big_en;
196 	u8 uvnr_gain_1sigma;
197 	u8 uvnr_gain_offset;
198 	u8 uvnr_gain_t2gen;
199 	u8 uvnr_gain_iso;
200 	u8 uvnr_t1gen_m3alpha;
201 	u8 uvnr_t1flt_mode;
202 	u8 uvnr_t1flt_wtp;
203 	u8 uvnr_t2gen_m3alpha;
204 	u8 uvnr_t2gen_wtp;
205 	u8 uvnr_gain_uvgain[NR_UVNR_UVGAIN_SIZE];
206 	u8 uvnr_t1flt_wtq[NR_UVNR_T1FLT_WTQ_SIZE];
207 	u8 uvnr_t2gen_wtq[NR_UVNR_T2GEN_WTQ_SIZE];
208 	u8 uvnr_t2flt_wtp;
209 	u8 uvnr_t2flt_wt[NR_UVNR_T2FLT_WT_SIZE];
210 	u8 ynr_sgm_dx[NR_YNR_SGM_DX_SIZE];
211 	u8 ynr_lci[NR_YNR_CI_SIZE];
212 	u8 ynr_lgain_min[NR_YNR_LGAIN_MIN_SIZE];
213 	u8 ynr_lgain_max;
214 	u8 ynr_lmerge_bound;
215 	u8 ynr_lmerge_ratio;
216 	u8 ynr_lweit_flt[NR_YNR_LWEIT_FLT_SIZE];
217 	u8 ynr_hlci[NR_YNR_CI_SIZE];
218 	u8 ynr_lhci[NR_YNR_CI_SIZE];
219 	u8 ynr_hhci[NR_YNR_CI_SIZE];
220 	u8 ynr_hgain_sgm[NR_YNR_HGAIN_SGM_SIZE];
221 	u8 ynr_hweit_d[NR_YNR_HWEIT_D_SIZE];
222 	u8 ynr_hgrad_y[NR_YNR_HGRAD_Y_SIZE];
223 	u8 ynr_hmax_adjust;
224 	u8 ynr_hstrength;
225 	u8 ynr_lweit_cmp[NR_YNR_LWEIT_CMP_SIZE];
226 	u8 ynr_lmaxgain_lv4;
227 
228 	u16 uvnr_t1flt_msigma __attribute__((aligned(2)));
229 	u16 uvnr_t2gen_msigma;
230 	u16 uvnr_t2flt_msigma;
231 	u16 ynr_lsgm_y[NR_YNR_SGM_Y_SIZE];
232 	u16 ynr_hsgm_y[NR_YNR_SGM_Y_SIZE];
233 	u16 ynr_hweit[NR_YNR_HWEIT_SIZE];
234 	u16 ynr_hstv_y[NR_YNR_HSTV_Y_SIZE];
235 	u16 ynr_st_scale[NR_YNR_ST_SCALE_SIZE];
236 } __attribute__ ((packed));
237 
238 struct rkispp_sharp_config {
239 	u8 rotation;
240 	u8 scl_down_v;
241 	u8 scl_down_h;
242 	u8 tile_ycnt;
243 	u8 tile_xcnt;
244 	u8 alpha_adp_en;
245 	u8 yin_flt_en;
246 	u8 edge_avg_en;
247 	u8 ehf_th;
248 	u8 pbf_ratio;
249 	u8 edge_thed;
250 	u8 dir_min;
251 	u8 pbf_shf_bits;
252 	u8 mbf_shf_bits;
253 	u8 hbf_shf_bits;
254 	u8 m_ratio;
255 	u8 h_ratio;
256 	u8 pbf_k[SHP_PBF_KERNEL_SIZE];
257 	u8 mrf_k[SHP_MRF_KERNEL_SIZE];
258 	u8 mbf_k[SHP_MBF_KERNEL_SIZE];
259 	u8 hrf_k[SHP_HRF_KERNEL_SIZE];
260 	u8 hbf_k[SHP_HBF_KERNEL_SIZE];
261 	s8 eg_coef[SHP_EDGE_COEF_SIZE];
262 	u8 eg_smoth[SHP_EDGE_SMOTH_SIZE];
263 	u8 eg_gaus[SHP_EDGE_GAUS_SIZE];
264 	s8 dog_k[SHP_DOG_KERNEL_SIZE];
265 	u8 lum_point[SHP_LUM_POINT_SIZE];
266 	u8 pbf_sigma[SHP_SIGMA_SIZE];
267 	u8 lum_clp_m[SHP_LUM_CLP_SIZE];
268 	s8 lum_min_m[SHP_LUM_MIN_SIZE];
269 	u8 mbf_sigma[SHP_SIGMA_SIZE];
270 	u8 lum_clp_h[SHP_LUM_CLP_SIZE];
271 	u8 hbf_sigma[SHP_SIGMA_SIZE];
272 	u8 edge_lum_thed[SHP_EDGE_LUM_THED_SIZE];
273 	u8 clamp_pos[SHP_CLAMP_SIZE];
274 	u8 clamp_neg[SHP_CLAMP_SIZE];
275 	u8 detail_alpha[SHP_DETAIL_ALPHA_SIZE];
276 
277 	u16 hbf_ratio __attribute__((aligned(2)));
278 	u16 smoth_th4;
279 	u16 l_alpha;
280 	u16 g_alpha;
281 	u16 rfl_ratio;
282 	u16 rfh_ratio;
283 } __attribute__ ((packed));
284 
285 enum rkispp_fecbuf_stat {
286 	FEC_BUF_INIT = 0,
287 	FEC_BUF_WAIT2CHIP,
288 	FEC_BUF_CHIPINUSE,
289 };
290 
291 struct rkispp_fecbuf_info {
292 	s32 buf_fd[FEC_MESH_BUF_NUM];
293 	u32 buf_size[FEC_MESH_BUF_NUM];
294 } __attribute__ ((packed));
295 
296 struct rkispp_fecbuf_size {
297 	u32 meas_width;
298 	u32 meas_height;
299 	u32 meas_mode;
300 } __attribute__ ((packed));
301 
302 struct rkispp_fec_head {
303 	enum rkispp_fecbuf_stat stat;
304 	u32 meshxf_oft;
305 	u32 meshyf_oft;
306 	u32 meshxi_oft;
307 	u32 meshyi_oft;
308 } __attribute__ ((packed));
309 
310 struct rkispp_fec_config {
311 	u8 mesh_density;
312 	u8 crop_en;
313 	u16 crop_width __attribute__((aligned(2)));
314 	u16 crop_height;
315 	u32 mesh_size __attribute__((aligned(4)));
316 	s32 buf_fd;
317 } __attribute__ ((packed));
318 
319 struct rkispp_orb_config {
320 	u8 limit_value;
321 	u32 max_feature __attribute__((aligned(4)));
322 } __attribute__ ((packed));
323 
324 /**
325  * struct rkispp_params_cfg - Rockchip ISPP Input Parameters Meta Data
326  *
327  * @module_en_update: mask the enable bits of which module  should be updated
328  * @module_ens: mask the enable value of each module, only update the module
329  * which correspond bit was set in module_en_update
330  * @module_cfg_update: mask the config bits of which module  should be updated
331  * @module_init_en: initial enable module function
332  */
333 struct rkispp_params_cfg {
334 	u32 module_en_update;
335 	u32 module_ens;
336 	u32 module_cfg_update;
337 	u32 module_init_ens;
338 
339 	u32 frame_id;
340 	struct rkispp_tnr_config tnr_cfg;
341 	struct rkispp_nr_config nr_cfg;
342 	struct rkispp_sharp_config shp_cfg;
343 	struct rkispp_fec_config fec_cfg;
344 	struct rkispp_orb_config orb_cfg;
345 } __attribute__ ((packed));
346 
347 struct rkispp_orb_data {
348 	u8 brief[ORB_BRIEF_NUM];
349 	u32 y : 13;
350 	u32 x : 13;
351 	u32 dmy1 : 6;
352 	u8 dmy2[ORB_DUMMY_NUM];
353 } __attribute__ ((packed));
354 
355 /**
356  * struct rkispp_stats_buffer - Rockchip ISPP Statistics
357  *
358  * @meas_type: measurement types
359  * @frame_id: frame ID for sync
360  * @data: statistics data
361  */
362 struct rkispp_stats_buffer {
363 	struct rkispp_orb_data data[ORB_DATA_NUM];
364 
365 	u32 total_num __attribute__((aligned(4)));
366 	u32 meas_type;
367 	u32 frame_id;
368 } __attribute__ ((packed));
369 
370 #endif
371