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1
2/*----------------------------------------------------------------------------------
3disp init configuration
4
5disp_mode             (0:screen0<screen0,fb0>)
6screenx_output_type   (0:none; 1:lcd; 2:tv; 3:hdmi;5:vdpo)
7screenx_output_mode   (used for hdmi output, 0:480i 1:576i 2:480p 3:576p 4:720p50)
8                      (5:720p60 6:1080i50 7:1080i60 8:1080p24 9:1080p50 10:1080p60)
9screenx_output_format (for hdmi, 0:RGB 1:yuv444 2:yuv422 3:yuv420)
10screenx_output_bits   (for hdmi, 0:8bit 1:10bit 2:12bit 2:16bit)
11screenx_output_eotf   (for hdmi, 0:reserve 4:SDR 16:HDR10 18:HLG)
12screenx_output_cs     (for hdmi, 0:undefined  257:BT709 260:BT601  263:BT2020)
13screenx_output_dvi_hdmi (for hdmi, 0:undefined 1:dvi mode 2:hdmi mode)
14screen0_output_range   (for hdmi, 0:default 1:full 2:limited)
15screen0_output_scan    (for hdmi, 0:no data 1:overscan 2:underscan)
16screen0_output_aspect_ratio  (for hdmi, 8-same as original picture 9-4:3 10-16:9 11-14:9)
17fbx format            (4:RGB655 5:RGB565 6:RGB556 7:ARGB1555 8:RGBA5551 9:RGB888 10:ARGB8888 12:ARGB4444)
18fbx pixel sequence    (0:ARGB 1:BGRA 2:ABGR 3:RGBA)
19fb0_scaler_mode_enable(scaler mode enable, used FE)
20fbx_width,fbx_height  (framebuffer horizontal/vertical pixels, fix to output resolution while equal 0)
21lcdx_backlight        (lcd init backlight,the range:[0,256],default:197
22lcdx_yy               (lcd init screen bright/contrast/saturation/hue, value:0~100, default:50/50/57/50)
23lcd0_contrast         (LCD contrast, 0~100)
24lcd0_saturation       (LCD saturation, 0~100)
25lcd0_hue              (LCD hue, 0~100)
26framebuffer software rotation setting:
27disp_rotation_used:   (0:disable; 1:enable,you must set fbX_width to lcd_y,
28set fbX_height to lcd_x)
29degreeX:              (X:screen index; 0:0 degree; 1:90 degree; 3:270 degree)
30degreeX_Y:            (X:screen index; Y:layer index 0~15; 0:0 degree; 1:90 degree; 3:270 degree)
31devX_output_type : config output type in bootGUI framework in UBOOT-2018.
32				   (0:none; 1:lcd; 2:tv; 4:hdmi;)
33devX_output_mode : config output resolution(see include/video/sunxi_display2.h) of bootGUI framework in UBOOT-2018
34devX_screen_id   : config display index of bootGUI framework in UBOOT-2018
35devX_do_hpd      : whether do hpd detectation or not in UBOOT-2018
36chn_cfg_mode     : Hardware DE channel allocation config. 0:single display with 6
37				   channel, 1:dual display with 4 channel in main display and 2 channel in second
38                   display, 2:dual display with 3 channel in main display and 3 channel in second
39                   in display.
40----------------------------------------------------------------------------------*/
41		&disp {
42			disp_init_enable         = <1>;
43			disp_mode                = <0>;
44
45			screen0_output_type      = <1>;
46			screen0_output_mode      = <4>;
47
48			screen1_output_type      = <3>;
49			screen1_output_mode      = <10>;
50
51			screen1_output_format    = <0>;
52			screen1_output_bits      = <0>;
53			screen1_output_eotf      = <4>;
54			screen1_output_cs        = <257>;
55			screen1_output_dvi_hdmi  = <2>;
56			screen1_output_range     = <2>;
57			screen1_output_scan      = <0>;
58			screen1_output_aspect_ratio = <8>;
59
60			dev0_output_type         = <1>;
61			dev0_output_mode         = <4>;
62			dev0_screen_id           = <0>;
63			dev0_do_hpd              = <0>;
64
65			dev1_output_type         = <4>;
66			dev1_output_mode         = <10>;
67			dev1_screen_id           = <1>;
68			dev1_do_hpd              = <1>;
69
70			def_output_dev           = <0>;
71			hdmi_mode_check          = <1>;
72
73			fb0_format               = <0>;
74			fb0_width                = <1024>;
75			fb0_height               = <600>;
76
77			fb1_format               = <0>;
78			fb1_width                = <0>;
79			fb1_height               = <0>;
80			chn_cfg_mode             = <1>;
81
82			disp_para_zone           = <1>;
83			/* VCC-LCD */
84			dc1sw-supply = <&reg_sw>;
85			/* VCC-LVDS and VCC-HDMI */
86			bldo1-supply = <&reg_bldo1>;
87			/* VCC-TV */
88			cldo4-supply = <&reg_cldo4>;
89		};
90#if 0
91		&lcd1 {
92		  status = "disabled";
93		};
94
95		&drm {
96			boot_disp = <0>;
97			boot_fb0 = "";
98
99			//connector0_output_type = <3>;
100			//connector0_output_mode = "CEA-016-1920x1080";
101			connector0_output_type = <1>;
102			connector0_output_mode = "";
103
104			connector1_output_type = <0>;
105			connector1_output_mode = "";
106		};
107#endif
108		&hdmi {
109			hdmi_used = <1>;
110
111			bldo1-supply = <&reg_bldo1>;
112			hdmi_power_cnt = <1>;
113			hdmi_power0 = "bldo1";
114
115			hdmi_hdcp_enable = <1>;
116			hdmi_hdcp22_enable = <1>;
117
118			hdmi_cec_support = <1>;
119			hdmi_cec_super_standby = <0>;
120
121			ddc_en_io_ctrl = <0>;
122			power_io_ctrl = <0>;
123		};
124
125/*----------------------------------------------------------------------------------
126;lcd0 configuration
127
128;lcd_if:               0:hv(sync+de); 1:8080; 2:ttl; 3:lvds; 4:dsi; 5:edp; 6:extend dsi
129;lcd_hv_if             0:Parallel RGB; 8:Serial RGB; 10:Dummy RGB; 11: RGB Dummy;12:CCIR656
130;lcd_hv_clk_phase      0:0 degree;1:90 degree;2:180 degree;3:270 degree
131;lcd_hv_sync_polarity  0:vs low,hs low; 1:vs high,hslow; 2:vs low,hs high; 3:vs high,hs high
132;lcd_hv_syuv_seq       0:YUYV; 1:YVYU; 2:UYVY; 3:VYUY
133;lcd_cpu_if            0:18bit/1 cycle parallel(RGB666); 4:16bit/1cycle parallel (RGB565)
134;                      6:18bit/3 cycle parallel(RGB666); 7:16bit/2cycle parallel (RGB565)
135;lcd_cpu_te            0:frame auto trigger; 1:frame triggered by te rising edge; 2:frame triggered by te falling edge;
136;lcd_dsi_if            0:video mode; 1: Command mode; 2:video burst mode
137;lcd_dsi_te            0:frame auto trigger; 1:frame triggered by te rising edge; 2:frame triggered by te falling edge;
138;lcd_x:                lcd horizontal resolution
139;lcd_y:                lcd vertical resolution
140;lcd_width:            width of lcd in mm
141;lcd_height:           height of lcd in mm
142;lcd_dclk_freq:        in MHZ unit
143;lcd_pwm_freq:         in HZ unit
144;lcd_pwm_pol:          lcd backlight PWM polarity
145;lcd_pwm_max_limit     lcd backlight PWM max limit(<=255)
146;lcd_hbp:              hsync back porch(pixel) + hsync plus width(pixel);
147;lcd_ht:               hsync total cycle(pixel)
148;lcd_vbp:              vsync back porch(line) + vysnc plus width(line)
149;lcd_vt:               vysnc total cycle(line)
150;lcd_hspw:             hsync plus width(pixel)
151;lcd_vspw:             vysnc plus width(pixel)
152;lcd_lvds_if:          0:single link;  1:dual link
153;lcd_lvds_colordepth:  0:8bit; 1:6bit
154;lcd_lvds_mode:        0:NS mode; 1:JEIDA mode
155;lcd_frm:              0:disable; 1:enable rgb666 dither; 2:enable rgb656 dither
156;lcd_io_phase:         0:noraml; 1:intert phase(0~3bit: vsync phase; 4~7bit:hsync phase;
157;                      8~11bit:dclk phase; 12~15bit:de phase)
158;lcd_gamma_en          lcd gamma correction enable
159;lcd_bright_curve_en   lcd bright curve correction enable
160;lcd_cmap_en           lcd color map function enable
161;deu_mode              0:smoll lcd screen; 1:large lcd screen(larger than 10inch)
162;lcdgamma4iep:         Smart Backlight parameter, lcd gamma vale * 10;
163;                      decrease it while lcd is not bright enough; increase while lcd is too bright
164;smart_color           90:normal lcd screen 65:retina lcd screen(9.7inch)
165;Pin setting for special function ie.LVDS, RGB data or vsync
166;   name(donot care) = port:PD12<pin function><pull up or pull down><drive ability><output level>
167;Pin setting for gpio:
168;   lcd_gpio_X     = port:PD12<pin function><pull up or pull down><drive ability><output level>
169;Pin setting for backlight enable pin
170;   lcd_bl_en     = port:PD12<pin function><pull up or pull down><drive ability><output level>
171;fsync setting, pulse to csi
172;lcd_fsync_en          (0:disable fsync,1:enable)
173;lcd_fsync_act_time    (active time of fsync, unit:pixel)
174;lcd_fsync_dis_time    (disactive time of fsync, unit:pixel)
175;lcd_fsync_pol         (0:positive;1:negative)
176;gpio config: <&pio for cpu or &r_pio for cpus, port, port num, pio function,
177pull up or pull down(default 0), driver level(default 1), data>
178;For dual link lvds: use lvds2link_pins_a  and lvds2link_pins_b instead
179;For rgb24: use rgb24_pins_a  and rgb24_pins_b instead
180;For lvds1: use lvds1_pins_a  and lvds1_pins_b instead
181;For lvds0: use lvds0_pins_a  and lvds0_pins_b instead
182;----------------------------------------------------------------------------------*/
183		&lcd0 {
184			lcd_used            = <1>;
185
186			lcd_driver_name     = "bp101wx1";
187			lcd_backlight       = <255>;
188			lcd_if              = <0>;
189
190			lcd_x               = <1024>;
191			lcd_y               = <600>;
192			lcd_width           = <150>;
193			lcd_height          = <94>;
194			lcd_dclk_freq       = <50>;
195
196			lcd_pwm_used        = <1>;
197			lcd_pwm_ch          = <0>;
198			lcd_pwm_freq        = <50000>;
199			lcd_pwm_pol         = <1>;
200			lcd_pwm_max_limit   = <255>;
201
202
203			lcd_hbp             = <120>;
204			lcd_ht              = <1368>;
205			lcd_hspw            = <10>;
206			lcd_vbp             = <10>;
207			lcd_vt              = <636>;
208			lcd_vspw            = <5>;
209
210			lcd_lvds_if         = <0>;
211			lcd_lvds_colordepth = <0>;
212			lcd_lvds_mode       = <1>;
213			lcd_frm             = <0>;
214			lcd_hv_clk_phase    = <0>;
215			lcd_hv_sync_polarity= <0>;
216			lcd_gamma_en        = <0>;
217			lcd_bright_curve_en = <0>;
218			lcd_cmap_en         = <0>;
219			lcd_fsync_en        = <0>;
220			lcd_fsync_act_time  = <1000>;
221			lcd_fsync_dis_time  = <1000>;
222			lcd_fsync_pol       = <0>;
223
224			deu_mode            = <0>;
225			lcdgamma4iep        = <22>;
226			smart_color         = <90>;
227
228			lcd_pin_power = "bldo1";
229
230			lcd_power = "dc1sw";
231
232			lcd_gpio_0       = <&pio PH 4 1 0xffffffff 0xffffffff 1>;
233
234			pinctrl-0 = <&rgb24_pins_a>;
235			pinctrl-1 = <&rgb24_pins_b>;
236
237			dc1sw-supply = <&reg_sw>;
238			bldo1-supply = <&reg_bldo1>;
239			cldo4-supply = <&reg_cldo4>;
240		};
241
242		&pwm0{
243			status = "okay";
244			};
245
246
247		&twi3{
248			ctp {
249				compatible = "allwinner,goodix";
250				reg = <0x5d>;
251				device_type = "ctp";
252				status = "disabled";
253				ctp_twi_id = <0x3>;
254				ctp_twi_addr = <0x5d>;
255				ctp_screen_max_x = <0x500>;
256				ctp_screen_max_y = <0x320>;
257				ctp_revert_x_flag = <0x0>;
258				ctp_revert_y_flag = <0x0>;
259				ctp_exchange_x_y_flag = <0x0>;
260				ctp_int_port = <&pio PH 8 6 0xffffffff 0xffffffff 0>;
261				ctp_wakeup = <&pio PH 10 1 0xffffffff 0xffffffff 1>;
262				ctp-supply = <&reg_dcdc1>;
263				ctp_power_ldo_vol = <3300>;
264
265                goodix,cfg-group0 = [
266                        46 00 04 58 02 0A 3D 00 01 08
267                        28 05 50 32 03 05 00 00 00 00
268                        00 00 00 18 1A 1E 14 8D 2D 88
269                        17 15 31 0D 00 00 01 9B 03 1D
270                        00 00 00 00 00 00 00 00 00 00
271                        00 1E 5A 94 C5 02 08 00 00 00
272                        61 21 00 57 29 00 4E 34 00 48
273                        41 00 43 51 00 43 00 00 00 00
274                        00 00 00 00 00 00 00 00 00 00
275                        00 00 00 00 00 00 00 00 00 00
276                        00 00 00 00 00 00 00 00 00 00
277                        00 00 00 01 04 05 06 07 08 09
278                        0C 0D 0E 0F 10 11 14 15 FF FF
279                        FF FF 00 00 00 00 00 00 00 00
280                        00 00 00 02 04 06 07 08 0A 0C
281                        0F 10 11 12 13 19 1B 1C 1E 1F
282                        20 21 22 23 24 25 26 27 FF FF
283                        FF FF FF FF 00 00 00 00 00 00
284                        00 00 00 00 FD 01];
285                goodix,cfg-group3 = [
286                        46 00 04 58 02 0A 3D 00 01 08
287                        28 05 50 32 03 05 00 00 00 00
288                        00 00 00 18 1A 1E 14 8D 2D 88
289                        17 15 31 0D 00 00 01 9B 03 1D
290                        00 00 00 00 00 00 00 00 00 00
291                        00 1E 5A 94 C5 02 08 00 00 00
292                        61 21 00 57 29 00 4E 34 00 48
293                        41 00 43 51 00 43 00 00 00 00
294                        00 00 00 00 00 00 00 00 00 00
295                        00 00 00 00 00 00 00 00 00 00
296                        00 00 00 00 00 00 00 00 00 00
297                        00 00 00 01 04 05 06 07 08 09
298                        0C 0D 0E 0F 10 11 14 15 FF FF
299                        FF FF 00 00 00 00 00 00 00 00
300                        00 00 00 02 04 06 07 08 0A 0C
301                        0F 10 11 12 13 19 1B 1C 1E 1F
302                        20 21 22 23 24 25 26 27 FF FF
303                        FF FF FF FF 00 00 00 00 00 00
304                        00 00 00 00 FD 01];
305			};
306		};
307