1 /*
2 * MFD core driver for the X-Powers' Power Management ICs
3 *
4 * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC
5 * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature
6 * as well as configurable GPIOs.
7 *
8 * This file contains the interface independent core functions.
9 *
10 * Copyright (C) 2014 Carlo Caione
11 *
12 * Author: Carlo Caione <carlo@caione.org>
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 */
18
19 #include <linux/err.h>
20 #include <linux/delay.h>
21 #include <linux/interrupt.h>
22 #include <linux/kernel.h>
23 #include <linux/module.h>
24 #include <linux/pm_runtime.h>
25 #include <linux/regmap.h>
26 #include <linux/regulator/consumer.h>
27 #include <power/axp2101.h>
28 #include <linux/mfd/core.h>
29 #include <linux/of_device.h>
30 #include <linux/acpi.h>
31
32 #define AXP20X_OFF 0x80
33
34 static const char *const axp20x_model_names[] = {
35 "AXP152", "AXP202", "AXP209", "AXP221", "AXP223",
36 "AXP288", "AXP806", "AXP809", "AXP2101", "AXP15",
37 "AXP1530", "AXP858", "AXP803", "AXP2202",
38 };
39
40 static const struct regmap_range axp152_writeable_ranges[] = {
41 regmap_reg_range(AXP152_LDO3456_DC1234_CTRL, AXP152_IRQ3_STATE),
42 regmap_reg_range(AXP152_DCDC_MODE, AXP152_PWM1_DUTY_CYCLE),
43 };
44
45 static const struct regmap_range axp152_volatile_ranges[] = {
46 regmap_reg_range(AXP152_PWR_OP_MODE, AXP152_PWR_OP_MODE),
47 regmap_reg_range(AXP152_IRQ1_EN, AXP152_IRQ3_STATE),
48 regmap_reg_range(AXP152_GPIO_INPUT, AXP152_GPIO_INPUT),
49 };
50
51 static const struct regmap_access_table axp152_writeable_table = {
52 .yes_ranges = axp152_writeable_ranges,
53 .n_yes_ranges = ARRAY_SIZE(axp152_writeable_ranges),
54 };
55
56 static const struct regmap_access_table axp152_volatile_table = {
57 .yes_ranges = axp152_volatile_ranges,
58 .n_yes_ranges = ARRAY_SIZE(axp152_volatile_ranges),
59 };
60
61 static const struct regmap_range axp20x_writeable_ranges[] = {
62 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
63 regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES),
64 regmap_reg_range(AXP20X_RDC_H, AXP20X_OCV(AXP20X_OCV_MAX)),
65 };
66
67 static const struct regmap_range axp20x_volatile_ranges[] = {
68 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_USB_OTG_STATUS),
69 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2),
70 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
71 regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L),
72 regmap_reg_range(AXP20X_GPIO20_SS, AXP20X_GPIO3_CTRL),
73 regmap_reg_range(AXP20X_FG_RES, AXP20X_RDC_L),
74 };
75
76 static const struct regmap_access_table axp20x_writeable_table = {
77 .yes_ranges = axp20x_writeable_ranges,
78 .n_yes_ranges = ARRAY_SIZE(axp20x_writeable_ranges),
79 };
80
81 static const struct regmap_access_table axp20x_volatile_table = {
82 .yes_ranges = axp20x_volatile_ranges,
83 .n_yes_ranges = ARRAY_SIZE(axp20x_volatile_ranges),
84 };
85
86 /* AXP22x ranges are shared with the AXP809, as they cover the same range */
87 static const struct regmap_range axp22x_writeable_ranges[] = {
88 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
89 regmap_reg_range(AXP20X_DCDC_MODE, AXP22X_BATLOW_THRES1),
90 };
91
92 static const struct regmap_range axp22x_volatile_ranges[] = {
93 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_PWR_OP_MODE),
94 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
95 regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE),
96 regmap_reg_range(AXP20X_FG_RES, AXP20X_FG_RES),
97 };
98
99 static const struct regmap_access_table axp22x_writeable_table = {
100 .yes_ranges = axp22x_writeable_ranges,
101 .n_yes_ranges = ARRAY_SIZE(axp22x_writeable_ranges),
102 };
103
104 static const struct regmap_access_table axp22x_volatile_table = {
105 .yes_ranges = axp22x_volatile_ranges,
106 .n_yes_ranges = ARRAY_SIZE(axp22x_volatile_ranges),
107 };
108
109 static const struct regmap_range axp288_writeable_ranges[] = {
110 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE),
111 regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5),
112 };
113
114 static const struct regmap_range axp288_volatile_ranges[] = {
115 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IPSOUT_V_HIGH_L),
116 };
117
118 static const struct regmap_access_table axp288_writeable_table = {
119 .yes_ranges = axp288_writeable_ranges,
120 .n_yes_ranges = ARRAY_SIZE(axp288_writeable_ranges),
121 };
122
123 static const struct regmap_access_table axp288_volatile_table = {
124 .yes_ranges = axp288_volatile_ranges,
125 .n_yes_ranges = ARRAY_SIZE(axp288_volatile_ranges),
126 };
127
128 static const struct regmap_range axp806_writeable_ranges[] = {
129 regmap_reg_range(AXP806_STARTUP_SRC, AXP806_REG_ADDR_EXT),
130 };
131
132 static const struct regmap_range axp806_volatile_ranges[] = {
133 regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE),
134 };
135
136 static const struct regmap_access_table axp806_writeable_table = {
137 .yes_ranges = axp806_writeable_ranges,
138 .n_yes_ranges = ARRAY_SIZE(axp806_writeable_ranges),
139 };
140
141 static const struct regmap_access_table axp806_volatile_table = {
142 .yes_ranges = axp806_volatile_ranges,
143 .n_yes_ranges = ARRAY_SIZE(axp806_volatile_ranges),
144 };
145
146 static const struct regmap_range axp2101_writeable_ranges[] = {
147 regmap_reg_range(AXP2101_COMM_STAT0, AXP2101_BUFFERC),
148 };
149
150 static const struct regmap_range axp2101_volatile_ranges[] = {
151 regmap_reg_range(AXP2101_COMM_STAT0, AXP2101_BUFFERC),
152 };
153
154 static const struct regmap_access_table axp2101_writeable_table = {
155 .yes_ranges = axp2101_writeable_ranges,
156 .n_yes_ranges = ARRAY_SIZE(axp2101_writeable_ranges),
157 };
158
159 static const struct regmap_access_table axp2101_volatile_table = {
160 .yes_ranges = axp2101_volatile_ranges,
161 .n_yes_ranges = ARRAY_SIZE(axp2101_volatile_ranges),
162 };
163 /***********************/
164 static const struct regmap_range axp15_writeable_ranges[] = {
165 regmap_reg_range(AXP15_STATUS, AXP15_GPIO0123_SIGNAL),
166 };
167
168 static const struct regmap_range axp15_volatile_ranges[] = {
169 regmap_reg_range(AXP15_STATUS, AXP15_GPIO0123_SIGNAL),
170 };
171
172 static const struct regmap_access_table axp15_writeable_table = {
173 .yes_ranges = axp15_writeable_ranges,
174 .n_yes_ranges = ARRAY_SIZE(axp15_writeable_ranges),
175 };
176
177 static const struct regmap_access_table axp15_volatile_table = {
178 .yes_ranges = axp15_volatile_ranges,
179 .n_yes_ranges = ARRAY_SIZE(axp15_volatile_ranges),
180 };
181 /***********************/
182 static const struct regmap_range axp1530_writeable_ranges[] = {
183 regmap_reg_range(AXP1530_ON_INDICATE, AXP1530_FREQUENCY),
184 };
185
186 static const struct regmap_range axp1530_volatile_ranges[] = {
187 regmap_reg_range(AXP1530_ON_INDICATE, AXP1530_FREQUENCY),
188 };
189
190 static const struct regmap_access_table axp1530_writeable_table = {
191 .yes_ranges = axp1530_writeable_ranges,
192 .n_yes_ranges = ARRAY_SIZE(axp1530_writeable_ranges),
193 };
194
195 static const struct regmap_access_table axp1530_volatile_table = {
196 .yes_ranges = axp1530_volatile_ranges,
197 .n_yes_ranges = ARRAY_SIZE(axp1530_volatile_ranges),
198 };
199 /***********************/
200 static const struct regmap_range axp858_writeable_ranges[] = {
201 regmap_reg_range(AXP858_ON_INDICATE, AXP858_FREQUENCY_ALDO2),
202 };
203
204 static const struct regmap_range axp858_volatile_ranges[] = {
205 regmap_reg_range(AXP858_ON_INDICATE, AXP858_FREQUENCY_ALDO2),
206 };
207
208 static const struct regmap_access_table axp858_writeable_table = {
209 .yes_ranges = axp858_writeable_ranges,
210 .n_yes_ranges = ARRAY_SIZE(axp858_writeable_ranges),
211 };
212
213 static const struct regmap_access_table axp858_volatile_table = {
214 .yes_ranges = axp858_volatile_ranges,
215 .n_yes_ranges = ARRAY_SIZE(axp858_volatile_ranges),
216 };
217
218
219 static const struct regmap_range axp803_writeable_ranges[] = {
220 regmap_reg_range(AXP803_STATUS, AXP803_REG_ADDR_EXT),
221 };
222
223 static const struct regmap_range axp803_volatile_ranges[] = {
224 regmap_reg_range(AXP803_STATUS, AXP803_REG_ADDR_EXT),
225 };
226
227 static const struct regmap_access_table axp803_writeable_table = {
228 .yes_ranges = axp803_writeable_ranges,
229 .n_yes_ranges = ARRAY_SIZE(axp803_writeable_ranges),
230 };
231
232 static const struct regmap_access_table axp803_volatile_table = {
233 .yes_ranges = axp803_volatile_ranges,
234 .n_yes_ranges = ARRAY_SIZE(axp803_volatile_ranges),
235 };
236
237 static const struct regmap_range axp2202_writeable_ranges[] = {
238 regmap_reg_range(AXP2202_COMM_STAT0, AXP2202_TWI_ADDR_EXT)
239 };
240
241 static const struct regmap_range axp2202_volatile_ranges[] = {
242 regmap_reg_range(AXP2202_COMM_STAT0, AXP2202_TWI_ADDR_EXT),
243 };
244
245 static const struct regmap_access_table axp2202_writeable_table = {
246 .yes_ranges = axp2202_writeable_ranges,
247 .n_yes_ranges = ARRAY_SIZE(axp2202_writeable_ranges),
248 };
249
250 static const struct regmap_access_table axp2202_volatile_table = {
251 .yes_ranges = axp2202_volatile_ranges,
252 .n_yes_ranges = ARRAY_SIZE(axp2202_volatile_ranges),
253 };
254
255 /*---------------*/
256 static struct resource axp152_pek_resources[] = {
257 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
258 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
259 };
260
261 static struct resource axp20x_ac_power_supply_resources[] = {
262 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"),
263 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"),
264 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_OVER_V, "ACIN_OVER_V"),
265 };
266
267 static struct resource axp20x_pek_resources[] = {
268 {
269 .name = "PEK_DBR",
270 .start = AXP20X_IRQ_PEK_RIS_EDGE,
271 .end = AXP20X_IRQ_PEK_RIS_EDGE,
272 .flags = IORESOURCE_IRQ,
273 }, {
274 .name = "PEK_DBF",
275 .start = AXP20X_IRQ_PEK_FAL_EDGE,
276 .end = AXP20X_IRQ_PEK_FAL_EDGE,
277 .flags = IORESOURCE_IRQ,
278 },
279 };
280
281 static struct resource axp20x_usb_power_supply_resources[] = {
282 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
283 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
284 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_VALID, "VBUS_VALID"),
285 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"),
286 };
287
288 static struct resource axp22x_usb_power_supply_resources[] = {
289 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
290 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
291 };
292
293 static struct resource axp22x_pek_resources[] = {
294 {
295 .name = "PEK_DBR",
296 .start = AXP22X_IRQ_PEK_RIS_EDGE,
297 .end = AXP22X_IRQ_PEK_RIS_EDGE,
298 .flags = IORESOURCE_IRQ,
299 }, {
300 .name = "PEK_DBF",
301 .start = AXP22X_IRQ_PEK_FAL_EDGE,
302 .end = AXP22X_IRQ_PEK_FAL_EDGE,
303 .flags = IORESOURCE_IRQ,
304 },
305 };
306
307 static struct resource axp288_power_button_resources[] = {
308 {
309 .name = "PEK_DBR",
310 .start = AXP288_IRQ_POKP,
311 .end = AXP288_IRQ_POKP,
312 .flags = IORESOURCE_IRQ,
313 },
314 {
315 .name = "PEK_DBF",
316 .start = AXP288_IRQ_POKN,
317 .end = AXP288_IRQ_POKN,
318 .flags = IORESOURCE_IRQ,
319 },
320 };
321
322 static struct resource axp288_fuel_gauge_resources[] = {
323 {
324 .start = AXP288_IRQ_QWBTU,
325 .end = AXP288_IRQ_QWBTU,
326 .flags = IORESOURCE_IRQ,
327 },
328 {
329 .start = AXP288_IRQ_WBTU,
330 .end = AXP288_IRQ_WBTU,
331 .flags = IORESOURCE_IRQ,
332 },
333 {
334 .start = AXP288_IRQ_QWBTO,
335 .end = AXP288_IRQ_QWBTO,
336 .flags = IORESOURCE_IRQ,
337 },
338 {
339 .start = AXP288_IRQ_WBTO,
340 .end = AXP288_IRQ_WBTO,
341 .flags = IORESOURCE_IRQ,
342 },
343 {
344 .start = AXP288_IRQ_WL2,
345 .end = AXP288_IRQ_WL2,
346 .flags = IORESOURCE_IRQ,
347 },
348 {
349 .start = AXP288_IRQ_WL1,
350 .end = AXP288_IRQ_WL1,
351 .flags = IORESOURCE_IRQ,
352 },
353 };
354
355 static struct resource axp809_pek_resources[] = {
356 {
357 .name = "PEK_DBR",
358 .start = AXP809_IRQ_PEK_RIS_EDGE,
359 .end = AXP809_IRQ_PEK_RIS_EDGE,
360 .flags = IORESOURCE_IRQ,
361 }, {
362 .name = "PEK_DBF",
363 .start = AXP809_IRQ_PEK_FAL_EDGE,
364 .end = AXP809_IRQ_PEK_FAL_EDGE,
365 .flags = IORESOURCE_IRQ,
366 },
367 };
368
369 static const struct regmap_config axp152_regmap_config = {
370 .reg_bits = 8,
371 .val_bits = 8,
372 .wr_table = &axp152_writeable_table,
373 .volatile_table = &axp152_volatile_table,
374 .max_register = AXP152_PWM1_DUTY_CYCLE,
375 .cache_type = REGCACHE_RBTREE,
376 };
377
378 static const struct regmap_config axp20x_regmap_config = {
379 .reg_bits = 8,
380 .val_bits = 8,
381 .wr_table = &axp20x_writeable_table,
382 .volatile_table = &axp20x_volatile_table,
383 .max_register = AXP20X_OCV(AXP20X_OCV_MAX),
384 .cache_type = REGCACHE_RBTREE,
385 };
386
387 static const struct regmap_config axp22x_regmap_config = {
388 .reg_bits = 8,
389 .val_bits = 8,
390 .wr_table = &axp22x_writeable_table,
391 .volatile_table = &axp22x_volatile_table,
392 .max_register = AXP22X_BATLOW_THRES1,
393 .cache_type = REGCACHE_RBTREE,
394 };
395
396 static const struct regmap_config axp288_regmap_config = {
397 .reg_bits = 8,
398 .val_bits = 8,
399 .wr_table = &axp288_writeable_table,
400 .volatile_table = &axp288_volatile_table,
401 .max_register = AXP288_FG_TUNE5,
402 .cache_type = REGCACHE_RBTREE,
403 };
404
405 static const struct regmap_config axp806_regmap_config = {
406 .reg_bits = 8,
407 .val_bits = 8,
408 .wr_table = &axp806_writeable_table,
409 .volatile_table = &axp806_volatile_table,
410 .max_register = AXP806_VREF_TEMP_WARN_L,
411 .cache_type = REGCACHE_RBTREE,
412 };
413
414
415 static const struct regmap_config axp2101_regmap_config = {
416 .reg_bits = 8,
417 .val_bits = 8,
418 .wr_table = &axp2101_writeable_table,
419 .volatile_table = &axp2101_volatile_table,
420 .max_register = AXP2101_BUFFERC,
421 .use_single_read = true,
422 .use_single_write = true,
423 .cache_type = REGCACHE_RBTREE,
424 };
425 /******************************/
426 static const struct regmap_config axp15_regmap_config = {
427 .reg_bits = 8,
428 .val_bits = 8,
429 .wr_table = &axp15_writeable_table,
430 .volatile_table = &axp15_volatile_table,
431 .max_register = AXP15_GPIO0123_SIGNAL,
432 .use_single_read = true,
433 .use_single_write = true,
434 .cache_type = REGCACHE_RBTREE,
435 };
436 /******************************/
437 static const struct regmap_config axp1530_regmap_config = {
438 .reg_bits = 8,
439 .val_bits = 8,
440 .wr_table = &axp1530_writeable_table,
441 .volatile_table = &axp1530_volatile_table,
442 .max_register = AXP1530_FREQUENCY,
443 .use_single_read = true,
444 .use_single_write = true,
445 .cache_type = REGCACHE_RBTREE,
446 };
447 /******************************/
448 static const struct regmap_config axp858_regmap_config = {
449 .reg_bits = 8,
450 .val_bits = 8,
451 .wr_table = &axp858_writeable_table,
452 .volatile_table = &axp858_volatile_table,
453 .max_register = AXP858_FREQUENCY_ALDO2,
454 .use_single_read = true,
455 .use_single_write = true,
456 .cache_type = REGCACHE_RBTREE,
457 };
458
459 static const struct regmap_config axp803_regmap_config = {
460 .reg_bits = 8,
461 .val_bits = 8,
462 .wr_table = &axp803_writeable_table,
463 .volatile_table = &axp803_volatile_table,
464 .max_register = AXP803_REG_ADDR_EXT,
465 .use_single_read = true,
466 .use_single_write = true,
467 .cache_type = REGCACHE_RBTREE,
468 };
469
470 static const struct regmap_config axp2202_regmap_config = {
471 .reg_bits = 8,
472 .val_bits = 8,
473 .wr_table = &axp2202_writeable_table,
474 .volatile_table = &axp2202_volatile_table,
475 .max_register = AXP2202_TWI_ADDR_EXT,
476 .use_single_read = true,
477 .use_single_write = true,
478 .cache_type = REGCACHE_NONE,
479 };
480
481 /*------------------*/
482 #define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask) \
483 [_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) }
484
485 static const struct regmap_irq axp152_regmap_irqs[] = {
486 INIT_REGMAP_IRQ(AXP152, LDO0IN_CONNECT, 0, 6),
487 INIT_REGMAP_IRQ(AXP152, LDO0IN_REMOVAL, 0, 5),
488 INIT_REGMAP_IRQ(AXP152, ALDO0IN_CONNECT, 0, 3),
489 INIT_REGMAP_IRQ(AXP152, ALDO0IN_REMOVAL, 0, 2),
490 INIT_REGMAP_IRQ(AXP152, DCDC1_V_LOW, 1, 5),
491 INIT_REGMAP_IRQ(AXP152, DCDC2_V_LOW, 1, 4),
492 INIT_REGMAP_IRQ(AXP152, DCDC3_V_LOW, 1, 3),
493 INIT_REGMAP_IRQ(AXP152, DCDC4_V_LOW, 1, 2),
494 INIT_REGMAP_IRQ(AXP152, PEK_SHORT, 1, 1),
495 INIT_REGMAP_IRQ(AXP152, PEK_LONG, 1, 0),
496 INIT_REGMAP_IRQ(AXP152, TIMER, 2, 7),
497 INIT_REGMAP_IRQ(AXP152, PEK_RIS_EDGE, 2, 6),
498 INIT_REGMAP_IRQ(AXP152, PEK_FAL_EDGE, 2, 5),
499 INIT_REGMAP_IRQ(AXP152, GPIO3_INPUT, 2, 3),
500 INIT_REGMAP_IRQ(AXP152, GPIO2_INPUT, 2, 2),
501 INIT_REGMAP_IRQ(AXP152, GPIO1_INPUT, 2, 1),
502 INIT_REGMAP_IRQ(AXP152, GPIO0_INPUT, 2, 0),
503 };
504
505 static const struct regmap_irq axp20x_regmap_irqs[] = {
506 INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V, 0, 7),
507 INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN, 0, 6),
508 INIT_REGMAP_IRQ(AXP20X, ACIN_REMOVAL, 0, 5),
509 INIT_REGMAP_IRQ(AXP20X, VBUS_OVER_V, 0, 4),
510 INIT_REGMAP_IRQ(AXP20X, VBUS_PLUGIN, 0, 3),
511 INIT_REGMAP_IRQ(AXP20X, VBUS_REMOVAL, 0, 2),
512 INIT_REGMAP_IRQ(AXP20X, VBUS_V_LOW, 0, 1),
513 INIT_REGMAP_IRQ(AXP20X, BATT_PLUGIN, 1, 7),
514 INIT_REGMAP_IRQ(AXP20X, BATT_REMOVAL, 1, 6),
515 INIT_REGMAP_IRQ(AXP20X, BATT_ENT_ACT_MODE, 1, 5),
516 INIT_REGMAP_IRQ(AXP20X, BATT_EXIT_ACT_MODE, 1, 4),
517 INIT_REGMAP_IRQ(AXP20X, CHARG, 1, 3),
518 INIT_REGMAP_IRQ(AXP20X, CHARG_DONE, 1, 2),
519 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_HIGH, 1, 1),
520 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_LOW, 1, 0),
521 INIT_REGMAP_IRQ(AXP20X, DIE_TEMP_HIGH, 2, 7),
522 INIT_REGMAP_IRQ(AXP20X, CHARG_I_LOW, 2, 6),
523 INIT_REGMAP_IRQ(AXP20X, DCDC1_V_LONG, 2, 5),
524 INIT_REGMAP_IRQ(AXP20X, DCDC2_V_LONG, 2, 4),
525 INIT_REGMAP_IRQ(AXP20X, DCDC3_V_LONG, 2, 3),
526 INIT_REGMAP_IRQ(AXP20X, PEK_SHORT, 2, 1),
527 INIT_REGMAP_IRQ(AXP20X, PEK_LONG, 2, 0),
528 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_ON, 3, 7),
529 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_OFF, 3, 6),
530 INIT_REGMAP_IRQ(AXP20X, VBUS_VALID, 3, 5),
531 INIT_REGMAP_IRQ(AXP20X, VBUS_NOT_VALID, 3, 4),
532 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_VALID, 3, 3),
533 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_END, 3, 2),
534 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL1, 3, 1),
535 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL2, 3, 0),
536 INIT_REGMAP_IRQ(AXP20X, TIMER, 4, 7),
537 INIT_REGMAP_IRQ(AXP20X, PEK_RIS_EDGE, 4, 6),
538 INIT_REGMAP_IRQ(AXP20X, PEK_FAL_EDGE, 4, 5),
539 INIT_REGMAP_IRQ(AXP20X, GPIO3_INPUT, 4, 3),
540 INIT_REGMAP_IRQ(AXP20X, GPIO2_INPUT, 4, 2),
541 INIT_REGMAP_IRQ(AXP20X, GPIO1_INPUT, 4, 1),
542 INIT_REGMAP_IRQ(AXP20X, GPIO0_INPUT, 4, 0),
543 };
544
545 static const struct regmap_irq axp22x_regmap_irqs[] = {
546 INIT_REGMAP_IRQ(AXP22X, ACIN_OVER_V, 0, 7),
547 INIT_REGMAP_IRQ(AXP22X, ACIN_PLUGIN, 0, 6),
548 INIT_REGMAP_IRQ(AXP22X, ACIN_REMOVAL, 0, 5),
549 INIT_REGMAP_IRQ(AXP22X, VBUS_OVER_V, 0, 4),
550 INIT_REGMAP_IRQ(AXP22X, VBUS_PLUGIN, 0, 3),
551 INIT_REGMAP_IRQ(AXP22X, VBUS_REMOVAL, 0, 2),
552 INIT_REGMAP_IRQ(AXP22X, VBUS_V_LOW, 0, 1),
553 INIT_REGMAP_IRQ(AXP22X, BATT_PLUGIN, 1, 7),
554 INIT_REGMAP_IRQ(AXP22X, BATT_REMOVAL, 1, 6),
555 INIT_REGMAP_IRQ(AXP22X, BATT_ENT_ACT_MODE, 1, 5),
556 INIT_REGMAP_IRQ(AXP22X, BATT_EXIT_ACT_MODE, 1, 4),
557 INIT_REGMAP_IRQ(AXP22X, CHARG, 1, 3),
558 INIT_REGMAP_IRQ(AXP22X, CHARG_DONE, 1, 2),
559 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_HIGH, 1, 1),
560 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_LOW, 1, 0),
561 INIT_REGMAP_IRQ(AXP22X, DIE_TEMP_HIGH, 2, 7),
562 INIT_REGMAP_IRQ(AXP22X, PEK_SHORT, 2, 1),
563 INIT_REGMAP_IRQ(AXP22X, PEK_LONG, 2, 0),
564 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL1, 3, 1),
565 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL2, 3, 0),
566 INIT_REGMAP_IRQ(AXP22X, TIMER, 4, 7),
567 INIT_REGMAP_IRQ(AXP22X, PEK_RIS_EDGE, 4, 6),
568 INIT_REGMAP_IRQ(AXP22X, PEK_FAL_EDGE, 4, 5),
569 INIT_REGMAP_IRQ(AXP22X, GPIO1_INPUT, 4, 1),
570 INIT_REGMAP_IRQ(AXP22X, GPIO0_INPUT, 4, 0),
571 };
572
573 /* some IRQs are compatible with axp20x models */
574 static const struct regmap_irq axp288_regmap_irqs[] = {
575 INIT_REGMAP_IRQ(AXP288, VBUS_FALL, 0, 2),
576 INIT_REGMAP_IRQ(AXP288, VBUS_RISE, 0, 3),
577 INIT_REGMAP_IRQ(AXP288, OV, 0, 4),
578
579 INIT_REGMAP_IRQ(AXP288, DONE, 1, 2),
580 INIT_REGMAP_IRQ(AXP288, CHARGING, 1, 3),
581 INIT_REGMAP_IRQ(AXP288, SAFE_QUIT, 1, 4),
582 INIT_REGMAP_IRQ(AXP288, SAFE_ENTER, 1, 5),
583 INIT_REGMAP_IRQ(AXP288, ABSENT, 1, 6),
584 INIT_REGMAP_IRQ(AXP288, APPEND, 1, 7),
585
586 INIT_REGMAP_IRQ(AXP288, QWBTU, 2, 0),
587 INIT_REGMAP_IRQ(AXP288, WBTU, 2, 1),
588 INIT_REGMAP_IRQ(AXP288, QWBTO, 2, 2),
589 INIT_REGMAP_IRQ(AXP288, WBTO, 2, 3),
590 INIT_REGMAP_IRQ(AXP288, QCBTU, 2, 4),
591 INIT_REGMAP_IRQ(AXP288, CBTU, 2, 5),
592 INIT_REGMAP_IRQ(AXP288, QCBTO, 2, 6),
593 INIT_REGMAP_IRQ(AXP288, CBTO, 2, 7),
594
595 INIT_REGMAP_IRQ(AXP288, WL2, 3, 0),
596 INIT_REGMAP_IRQ(AXP288, WL1, 3, 1),
597 INIT_REGMAP_IRQ(AXP288, GPADC, 3, 2),
598 INIT_REGMAP_IRQ(AXP288, OT, 3, 7),
599
600 INIT_REGMAP_IRQ(AXP288, GPIO0, 4, 0),
601 INIT_REGMAP_IRQ(AXP288, GPIO1, 4, 1),
602 INIT_REGMAP_IRQ(AXP288, POKO, 4, 2),
603 INIT_REGMAP_IRQ(AXP288, POKL, 4, 3),
604 INIT_REGMAP_IRQ(AXP288, POKS, 4, 4),
605 INIT_REGMAP_IRQ(AXP288, POKN, 4, 5),
606 INIT_REGMAP_IRQ(AXP288, POKP, 4, 6),
607 INIT_REGMAP_IRQ(AXP288, TIMER, 4, 7),
608
609 INIT_REGMAP_IRQ(AXP288, MV_CHNG, 5, 0),
610 INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1),
611 };
612
613 static const struct regmap_irq axp806_regmap_irqs[] = {
614 INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV1, 0, 0),
615 INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV2, 0, 1),
616 INIT_REGMAP_IRQ(AXP806, DCDCA_V_LOW, 0, 3),
617 INIT_REGMAP_IRQ(AXP806, DCDCB_V_LOW, 0, 4),
618 INIT_REGMAP_IRQ(AXP806, DCDCC_V_LOW, 0, 5),
619 INIT_REGMAP_IRQ(AXP806, DCDCD_V_LOW, 0, 6),
620 INIT_REGMAP_IRQ(AXP806, DCDCE_V_LOW, 0, 7),
621 INIT_REGMAP_IRQ(AXP806, PWROK_LONG, 1, 0),
622 INIT_REGMAP_IRQ(AXP806, PWROK_SHORT, 1, 1),
623 INIT_REGMAP_IRQ(AXP806, WAKEUP, 1, 4),
624 INIT_REGMAP_IRQ(AXP806, PWROK_FALL, 1, 5),
625 INIT_REGMAP_IRQ(AXP806, PWROK_RISE, 1, 6),
626 };
627
628 static const struct regmap_irq axp809_regmap_irqs[] = {
629 INIT_REGMAP_IRQ(AXP809, ACIN_OVER_V, 0, 7),
630 INIT_REGMAP_IRQ(AXP809, ACIN_PLUGIN, 0, 6),
631 INIT_REGMAP_IRQ(AXP809, ACIN_REMOVAL, 0, 5),
632 INIT_REGMAP_IRQ(AXP809, VBUS_OVER_V, 0, 4),
633 INIT_REGMAP_IRQ(AXP809, VBUS_PLUGIN, 0, 3),
634 INIT_REGMAP_IRQ(AXP809, VBUS_REMOVAL, 0, 2),
635 INIT_REGMAP_IRQ(AXP809, VBUS_V_LOW, 0, 1),
636 INIT_REGMAP_IRQ(AXP809, BATT_PLUGIN, 1, 7),
637 INIT_REGMAP_IRQ(AXP809, BATT_REMOVAL, 1, 6),
638 INIT_REGMAP_IRQ(AXP809, BATT_ENT_ACT_MODE, 1, 5),
639 INIT_REGMAP_IRQ(AXP809, BATT_EXIT_ACT_MODE, 1, 4),
640 INIT_REGMAP_IRQ(AXP809, CHARG, 1, 3),
641 INIT_REGMAP_IRQ(AXP809, CHARG_DONE, 1, 2),
642 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH, 2, 7),
643 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH_END, 2, 6),
644 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW, 2, 5),
645 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW_END, 2, 4),
646 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH, 2, 3),
647 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH_END, 2, 2),
648 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW, 2, 1),
649 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW_END, 2, 0),
650 INIT_REGMAP_IRQ(AXP809, DIE_TEMP_HIGH, 3, 7),
651 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL1, 3, 1),
652 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL2, 3, 0),
653 INIT_REGMAP_IRQ(AXP809, TIMER, 4, 7),
654 INIT_REGMAP_IRQ(AXP809, PEK_RIS_EDGE, 4, 6),
655 INIT_REGMAP_IRQ(AXP809, PEK_FAL_EDGE, 4, 5),
656 INIT_REGMAP_IRQ(AXP809, PEK_SHORT, 4, 4),
657 INIT_REGMAP_IRQ(AXP809, PEK_LONG, 4, 3),
658 INIT_REGMAP_IRQ(AXP809, PEK_OVER_OFF, 4, 2),
659 INIT_REGMAP_IRQ(AXP809, GPIO1_INPUT, 4, 1),
660 INIT_REGMAP_IRQ(AXP809, GPIO0_INPUT, 4, 0),
661 };
662
663 static const struct regmap_irq axp2101_regmap_irqs[] = {
664 INIT_REGMAP_IRQ(AXP2101, SOCWL2, 0, 7),
665 INIT_REGMAP_IRQ(AXP2101, SOCWL1, 0, 6),
666 INIT_REGMAP_IRQ(AXP2101, GWDT, 0, 5),
667 INIT_REGMAP_IRQ(AXP2101, NEWSOC, 0, 4),
668 INIT_REGMAP_IRQ(AXP2101, BCOT, 0, 3),
669 INIT_REGMAP_IRQ(AXP2101, BCUT, 0, 2),
670 INIT_REGMAP_IRQ(AXP2101, BWOT, 0, 1),
671 INIT_REGMAP_IRQ(AXP2101, BWUT, 0, 0),
672 INIT_REGMAP_IRQ(AXP2101, VINSET, 1, 7),
673 INIT_REGMAP_IRQ(AXP2101, VREMOV, 1, 6),
674 INIT_REGMAP_IRQ(AXP2101, BINSERT, 1, 5),
675 INIT_REGMAP_IRQ(AXP2101, BREMOV, 1, 4),
676 INIT_REGMAP_IRQ(AXP2101, PONS, 1, 3),
677 INIT_REGMAP_IRQ(AXP2101, PONL, 1, 2),
678 INIT_REGMAP_IRQ(AXP2101, PONN, 1, 1),
679 INIT_REGMAP_IRQ(AXP2101, PONP, 1, 0),
680 INIT_REGMAP_IRQ(AXP2101, WDEXP, 2, 7),
681 INIT_REGMAP_IRQ(AXP2101, LDOOC, 2, 6),
682 INIT_REGMAP_IRQ(AXP2101, BOCP, 2, 5),
683 INIT_REGMAP_IRQ(AXP2101, CHGDN, 2, 4),
684 INIT_REGMAP_IRQ(AXP2101, CHGST, 2, 3),
685 INIT_REGMAP_IRQ(AXP2101, DOTL1, 2, 2),
686 INIT_REGMAP_IRQ(AXP2101, CHGTE, 2, 1),
687 INIT_REGMAP_IRQ(AXP2101, BOVP, 2, 0),
688 };
689 /********************************/
690 static const struct regmap_irq axp15_regmap_irqs[] = {
691 INIT_REGMAP_IRQ(AXP15, LDO0IN_L2H, 0, 6),
692 INIT_REGMAP_IRQ(AXP15, LDO0IN_H2L, 0, 5),
693 INIT_REGMAP_IRQ(AXP15, ALDOIN_L2H, 0, 3),
694 INIT_REGMAP_IRQ(AXP15, ALDOIN_H2L, 0, 2),
695 INIT_REGMAP_IRQ(AXP15, DCDC1_V_LOW, 1, 5),
696 INIT_REGMAP_IRQ(AXP15, DCDC2_V_LOW, 1, 4),
697 INIT_REGMAP_IRQ(AXP15, DCDC3_V_LOW, 1, 3),
698 INIT_REGMAP_IRQ(AXP15, DCDC4_V_LOW, 1, 2),
699 INIT_REGMAP_IRQ(AXP15, PEKSH, 1, 1),
700 INIT_REGMAP_IRQ(AXP15, PEKLO, 1, 0),
701 INIT_REGMAP_IRQ(AXP15, EVENT_TIMEOUT, 2, 7),
702 INIT_REGMAP_IRQ(AXP15, PEKRE, 2, 6),
703 INIT_REGMAP_IRQ(AXP15, PEKFE, 2, 5),
704 INIT_REGMAP_IRQ(AXP15, GPIO3, 2, 3),
705 INIT_REGMAP_IRQ(AXP15, GPIO2, 2, 2),
706 INIT_REGMAP_IRQ(AXP15, GPIO1, 2, 1),
707 INIT_REGMAP_IRQ(AXP15, GPIO0, 2, 0),
708 };
709 /********************************/
710 static const struct regmap_irq axp1530_regmap_irqs[] = {
711 INIT_REGMAP_IRQ(AXP1530, KEY_L2H_EN, 0, 7),
712 INIT_REGMAP_IRQ(AXP1530, KEY_H2L_EN, 0, 6),
713 INIT_REGMAP_IRQ(AXP1530, POKSIRQ_EN, 0, 5),
714 INIT_REGMAP_IRQ(AXP1530, POKLIRQ_EN, 0, 4),
715 INIT_REGMAP_IRQ(AXP1530, DCDC3_UNDER, 0, 3),
716 INIT_REGMAP_IRQ(AXP1530, DCDC2_UNDER, 0, 2),
717 INIT_REGMAP_IRQ(AXP1530, TEMP_OVER, 0, 0),
718 };
719 /********************************/
720 static const struct regmap_irq axp858_regmap_irqs[] = {
721 INIT_REGMAP_IRQ(AXP858, DCDC3_CUR_OVER, 1, 7),
722 INIT_REGMAP_IRQ(AXP858, DCDC2_CUR_OVER, 1, 6),
723 INIT_REGMAP_IRQ(AXP858, GPIO2_EN, 1, 5),
724 INIT_REGMAP_IRQ(AXP858, POKPIRQ_EN, 1, 4),
725 INIT_REGMAP_IRQ(AXP858, POKNIRQ_EN, 1, 3),
726 INIT_REGMAP_IRQ(AXP858, GPIO1_EN, 1, 2),
727 INIT_REGMAP_IRQ(AXP858, POKSIRQ_EN, 1, 1),
728 INIT_REGMAP_IRQ(AXP858, POKLIRQ_EN, 1, 0),
729 INIT_REGMAP_IRQ(AXP858, DCDC6_UNDER, 0, 7),
730 INIT_REGMAP_IRQ(AXP858, DCDC5_UNDER, 0, 6),
731 INIT_REGMAP_IRQ(AXP858, DCDC4_UNDER, 0, 5),
732 INIT_REGMAP_IRQ(AXP858, DCDC3_UNDER, 0, 4),
733 INIT_REGMAP_IRQ(AXP858, DCDC2_UNDER, 0, 3),
734 INIT_REGMAP_IRQ(AXP858, DCDC1_UNDER, 0, 2),
735 INIT_REGMAP_IRQ(AXP858, TEMP_OVER2, 0, 1),
736 INIT_REGMAP_IRQ(AXP858, TEMP_OVER1, 0, 0),
737 };
738 /*------------------*/
739 static const struct regmap_irq axp803_regmap_irqs[] = {
740 INIT_REGMAP_IRQ(AXP803, ACOV, 0, 7),
741 INIT_REGMAP_IRQ(AXP803, ACIN, 0, 6),
742 INIT_REGMAP_IRQ(AXP803, ACRE, 0, 5),
743 INIT_REGMAP_IRQ(AXP803, USBOV, 0, 4),
744 INIT_REGMAP_IRQ(AXP803, USBIN, 0, 3),
745 INIT_REGMAP_IRQ(AXP803, USBRE, 0, 2),
746 INIT_REGMAP_IRQ(AXP803, BATIN, 1, 7),
747 INIT_REGMAP_IRQ(AXP803, BATRE, 1, 6),
748 INIT_REGMAP_IRQ(AXP803, BATATIN, 1, 5),
749 INIT_REGMAP_IRQ(AXP803, BATATOU, 1, 4),
750 INIT_REGMAP_IRQ(AXP803, CHAST, 1, 3),
751 INIT_REGMAP_IRQ(AXP803, CHAOV, 1, 2),
752 INIT_REGMAP_IRQ(AXP803, BATOVCHG, 2, 7),
753 INIT_REGMAP_IRQ(AXP803, QBATOVCHG, 2, 6),
754 INIT_REGMAP_IRQ(AXP803, BATINCHG, 2, 5),
755 INIT_REGMAP_IRQ(AXP803, QBATINCHG, 2, 4),
756 INIT_REGMAP_IRQ(AXP803, BATOVWORK, 2, 3),
757 INIT_REGMAP_IRQ(AXP803, QBATOVWORK, 2, 2),
758 INIT_REGMAP_IRQ(AXP803, BATINWORK, 2, 1),
759 INIT_REGMAP_IRQ(AXP803, QBATINWORK, 2, 0),
760 INIT_REGMAP_IRQ(AXP803, LOWN1, 3, 1),
761 INIT_REGMAP_IRQ(AXP803, LOWN2, 3, 0),
762 INIT_REGMAP_IRQ(AXP803, TIMER, 4, 7),
763 INIT_REGMAP_IRQ(AXP803, PEKRE, 4, 6),
764 INIT_REGMAP_IRQ(AXP803, PEKFE, 4, 5),
765 INIT_REGMAP_IRQ(AXP803, POKSH, 4, 4),
766 INIT_REGMAP_IRQ(AXP803, POKLO, 4, 3),
767 INIT_REGMAP_IRQ(AXP803, GPIO1, 4, 1),
768 INIT_REGMAP_IRQ(AXP803, GPIO0, 4, 0),
769 };
770
771 static const struct regmap_irq axp2202_regmap_irqs[] = {
772 INIT_REGMAP_IRQ(AXP2202, SOCWL2, 0, 7),
773 INIT_REGMAP_IRQ(AXP2202, SOCWL1, 0, 6),
774 INIT_REGMAP_IRQ(AXP2202, GWDT, 0, 5),
775 INIT_REGMAP_IRQ(AXP2202, NEWSOC, 0, 4),
776 INIT_REGMAP_IRQ(AXP2202, BST_OV, 0, 2),
777 INIT_REGMAP_IRQ(AXP2202, VBUS_OV, 0, 1),
778 INIT_REGMAP_IRQ(AXP2202, VBUS_FAULT, 0, 0),
779 INIT_REGMAP_IRQ(AXP2202, VINSERT, 1, 7),
780 INIT_REGMAP_IRQ(AXP2202, VREMOVE, 1, 6),
781 INIT_REGMAP_IRQ(AXP2202, BINSERT, 1, 5),
782 INIT_REGMAP_IRQ(AXP2202, BREMOVE, 1, 4),
783 INIT_REGMAP_IRQ(AXP2202, PONS, 1, 3),
784 INIT_REGMAP_IRQ(AXP2202, PONL, 1, 2),
785 INIT_REGMAP_IRQ(AXP2202, PONN, 1, 1),
786 INIT_REGMAP_IRQ(AXP2202, PONP, 1, 0),
787 INIT_REGMAP_IRQ(AXP2202, WDEXP, 2, 7),
788 INIT_REGMAP_IRQ(AXP2202, LDOOC, 2, 6),
789 INIT_REGMAP_IRQ(AXP2202, BOCP, 2, 5),
790 INIT_REGMAP_IRQ(AXP2202, CHGDN, 2, 4),
791 INIT_REGMAP_IRQ(AXP2202, CHGST, 2, 3),
792 INIT_REGMAP_IRQ(AXP2202, DOTL1, 2, 2),
793 INIT_REGMAP_IRQ(AXP2202, CHGTE, 2, 1),
794 INIT_REGMAP_IRQ(AXP2202, BOVP, 2, 0),
795 INIT_REGMAP_IRQ(AXP2202, BC_DONE, 3, 7),
796 INIT_REGMAP_IRQ(AXP2202, BC_CHNG, 3, 6),
797 INIT_REGMAP_IRQ(AXP2202, RID_CHNG, 3, 5),
798 INIT_REGMAP_IRQ(AXP2202, BCOTQ, 3, 4),
799 INIT_REGMAP_IRQ(AXP2202, BCOT, 3, 3),
800 INIT_REGMAP_IRQ(AXP2202, BCUT, 3, 2),
801 INIT_REGMAP_IRQ(AXP2202, BWOT, 3, 1),
802 INIT_REGMAP_IRQ(AXP2202, BWUT, 3, 0),
803 INIT_REGMAP_IRQ(AXP2202, CREMOVE, 4, 6),
804 INIT_REGMAP_IRQ(AXP2202, CINSERT, 4, 5),
805 INIT_REGMAP_IRQ(AXP2202, TOGGLE_DONE, 4, 4),
806 INIT_REGMAP_IRQ(AXP2202, VBUS_SAFE5V, 4, 3),
807 INIT_REGMAP_IRQ(AXP2202, VBUS_SAFE0V, 4, 2),
808 INIT_REGMAP_IRQ(AXP2202, ERR_GEN, 4, 1),
809 INIT_REGMAP_IRQ(AXP2202, PWR_CHNG, 4, 0),
810 };
811
812 static const struct regmap_irq_chip axp152_regmap_irq_chip = {
813 .name = "axp152_irq_chip",
814 .status_base = AXP152_IRQ1_STATE,
815 .ack_base = AXP152_IRQ1_STATE,
816 .mask_base = AXP152_IRQ1_EN,
817 .mask_invert = true,
818 .init_ack_masked = true,
819 .irqs = axp152_regmap_irqs,
820 .num_irqs = ARRAY_SIZE(axp152_regmap_irqs),
821 .num_regs = 3,
822 };
823
824 static const struct regmap_irq_chip axp20x_regmap_irq_chip = {
825 .name = "axp20x_irq_chip",
826 .status_base = AXP20X_IRQ1_STATE,
827 .ack_base = AXP20X_IRQ1_STATE,
828 .mask_base = AXP20X_IRQ1_EN,
829 .mask_invert = true,
830 .init_ack_masked = true,
831 .irqs = axp20x_regmap_irqs,
832 .num_irqs = ARRAY_SIZE(axp20x_regmap_irqs),
833 .num_regs = 5,
834
835 };
836
837 static const struct regmap_irq_chip axp22x_regmap_irq_chip = {
838 .name = "axp22x_irq_chip",
839 .status_base = AXP20X_IRQ1_STATE,
840 .ack_base = AXP20X_IRQ1_STATE,
841 .mask_base = AXP20X_IRQ1_EN,
842 .mask_invert = true,
843 .init_ack_masked = true,
844 .irqs = axp22x_regmap_irqs,
845 .num_irqs = ARRAY_SIZE(axp22x_regmap_irqs),
846 .num_regs = 5,
847 };
848
849 static const struct regmap_irq_chip axp288_regmap_irq_chip = {
850 .name = "axp288_irq_chip",
851 .status_base = AXP20X_IRQ1_STATE,
852 .ack_base = AXP20X_IRQ1_STATE,
853 .mask_base = AXP20X_IRQ1_EN,
854 .mask_invert = true,
855 .init_ack_masked = true,
856 .irqs = axp288_regmap_irqs,
857 .num_irqs = ARRAY_SIZE(axp288_regmap_irqs),
858 .num_regs = 6,
859
860 };
861
862 static const struct regmap_irq_chip axp806_regmap_irq_chip = {
863 .name = "axp806",
864 .status_base = AXP20X_IRQ1_STATE,
865 .ack_base = AXP20X_IRQ1_STATE,
866 .mask_base = AXP20X_IRQ1_EN,
867 .mask_invert = true,
868 .init_ack_masked = true,
869 .irqs = axp806_regmap_irqs,
870 .num_irqs = ARRAY_SIZE(axp806_regmap_irqs),
871 .num_regs = 2,
872 };
873
874 static const struct regmap_irq_chip axp809_regmap_irq_chip = {
875 .name = "axp809",
876 .status_base = AXP20X_IRQ1_STATE,
877 .ack_base = AXP20X_IRQ1_STATE,
878 .mask_base = AXP20X_IRQ1_EN,
879 .mask_invert = true,
880 .init_ack_masked = true,
881 .irqs = axp809_regmap_irqs,
882 .num_irqs = ARRAY_SIZE(axp809_regmap_irqs),
883 .num_regs = 5,
884 };
885
886 static const struct regmap_irq_chip axp2101_regmap_irq_chip = {
887 .name = "axp2101_irq_chip",
888 .status_base = AXP2101_INTSTS1,
889 .ack_base = AXP2101_INTSTS1,
890 .mask_base = AXP2101_INTEN1,
891 .mask_invert = true,
892 .init_ack_masked = true,
893 .irqs = axp2101_regmap_irqs,
894 .num_irqs = ARRAY_SIZE(axp2101_regmap_irqs),
895 .num_regs = 3,
896
897 };
898 /********************************/
899 static const struct regmap_irq_chip axp15_regmap_irq_chip = {
900 .name = "axp15_irq_chip",
901 .status_base = AXP15_INTSTS1,
902 .ack_base = AXP15_INTSTS1,
903 .mask_base = AXP15_INTEN1,
904 .mask_invert = true,
905 .init_ack_masked = true,
906 .irqs = axp15_regmap_irqs,
907 .num_irqs = ARRAY_SIZE(axp15_regmap_irqs),
908 .num_regs = 3,
909 };
910 /********************************/
911 static const struct regmap_irq_chip axp1530_regmap_irq_chip = {
912 .name = "axp1530_irq_chip",
913 .status_base = AXP1530_IRQ_STATUS1,
914 .ack_base = AXP1530_IRQ_STATUS1,
915 .mask_base = AXP1530_IRQ_ENABLE1,
916 .mask_invert = true,
917 .init_ack_masked = true,
918 .irqs = axp1530_regmap_irqs,
919 .num_irqs = ARRAY_SIZE(axp1530_regmap_irqs),
920 .num_regs = 1,
921 };
922 /********************************/
923 static const struct regmap_irq_chip axp858_regmap_irq_chip = {
924 .name = "axp858_irq_chip",
925 .status_base = AXP858_IRQ_STS1,
926 .ack_base = AXP858_IRQ_STS1,
927 .mask_base = AXP858_IRQ_EN1,
928 .mask_invert = true,
929 .init_ack_masked = true,
930 .irqs = axp858_regmap_irqs,
931 .num_irqs = ARRAY_SIZE(axp858_regmap_irqs),
932 .num_regs = 2,
933 };
934
935 static const struct regmap_irq_chip axp803_regmap_irq_chip = {
936 .name = "axp803_irq_chip",
937 .status_base = AXP803_INTSTS1,
938 .ack_base = AXP803_INTSTS1,
939 .mask_base = AXP803_INTEN1,
940 .mask_invert = true,
941 .init_ack_masked = true,
942 .irqs = axp803_regmap_irqs,
943 .num_irqs = ARRAY_SIZE(axp803_regmap_irqs),
944 .num_regs = 6,
945 };
946
947 static const struct regmap_irq_chip axp2202_regmap_irq_chip = {
948 .name = "axp2202_irq_chip",
949 .status_base = AXP2202_IRQ0,
950 .ack_base = AXP2202_IRQ0,
951 .mask_base = AXP2202_IRQ_EN0,
952 .mask_invert = true,
953 .init_ack_masked = true,
954 .irqs = axp2202_regmap_irqs,
955 .num_irqs = ARRAY_SIZE(axp2202_regmap_irqs),
956 .num_regs = 5,
957 };
958
959 /*--------------------*/
960 static struct mfd_cell axp20x_cells[] = {
961 {
962 .name = "axp20x-gpio",
963 .of_compatible = "x-powers,axp209-gpio",
964 }, {
965 .name = "axp20x-pek",
966 .num_resources = ARRAY_SIZE(axp20x_pek_resources),
967 .resources = axp20x_pek_resources,
968 }, {
969 .name = "axp20x-regulator",
970 }, {
971 .name = "axp20x-ac-power-supply",
972 .of_compatible = "x-powers,axp202-ac-power-supply",
973 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
974 .resources = axp20x_ac_power_supply_resources,
975 }, {
976 .name = "axp20x-usb-power-supply",
977 .of_compatible = "x-powers,axp202-usb-power-supply",
978 .num_resources = ARRAY_SIZE(axp20x_usb_power_supply_resources),
979 .resources = axp20x_usb_power_supply_resources,
980 },
981 };
982
983 static struct mfd_cell axp22x_cells[] = {
984 {
985 .name = "axp20x-pek",
986 .num_resources = ARRAY_SIZE(axp22x_pek_resources),
987 .resources = axp22x_pek_resources,
988 }, {
989 .name = "axp20x-regulator",
990 }, {
991 .name = "axp20x-usb-power-supply",
992 .of_compatible = "x-powers,axp221-usb-power-supply",
993 .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources),
994 .resources = axp22x_usb_power_supply_resources,
995 },
996 };
997
998 #define AXP152_DCDC1_NAME "dcdc1"
999 #define AXP152_DCDC2_NAME "dcdc2"
1000 #define AXP152_DCDC3_NAME "dcdc3"
1001 #define AXP152_DCDC4_NAME "dcdc4"
1002 #define AXP152_ALDO1_NAME "aldo1"
1003 #define AXP152_ALDO2_NAME "aldo2"
1004 #define AXP152_DLDO1_NAME "dldo1"
1005 #define AXP152_DLDO2_NAME "dldo2"
1006 #define AXP152_LDO0_NAME "ldo0"
1007 static struct mfd_cell axp152_cells[] = {
1008 /* {
1009 .name = "axp20x-pek",
1010 .num_resources = ARRAY_SIZE(axp152_pek_resources),
1011 .resources = axp152_pek_resources,
1012 },*/
1013 {
1014 .name = "axp152-pek",
1015 .num_resources = ARRAY_SIZE(axp152_pek_resources),
1016 .resources = axp152_pek_resources,
1017 .of_compatible = "x-powers,axp152-pek",
1018 },
1019 {
1020 /* match drivers/regulator/axp2101.c */
1021 .name = "axp2101-regulator",
1022 },
1023 {
1024 /* match drivers/power/supply/axp152_vbus_power.c */
1025 .name = "axp152-vbus",
1026 .of_compatible = "x-powers,axp152-vbus",
1027 },
1028 {
1029 .of_compatible = "xpower-vregulator,dcdc1",
1030 .name = "reg-virt-consumer",
1031 .id = 1,
1032 .platform_data = AXP152_DCDC1_NAME,
1033 .pdata_size = sizeof(AXP152_DCDC1_NAME),
1034 },
1035 {
1036 .of_compatible = "xpower-vregulator,dcdc2",
1037 .name = "reg-virt-consumer",
1038 .id = 2,
1039 .platform_data = AXP152_DCDC2_NAME,
1040 .pdata_size = sizeof(AXP152_DCDC2_NAME),
1041 },
1042 {
1043 .of_compatible = "xpower-vregulator,dcdc3",
1044 .name = "reg-virt-consumer",
1045 .id = 3,
1046 .platform_data = AXP152_DCDC3_NAME,
1047 .pdata_size = sizeof(AXP152_DCDC3_NAME),
1048 },
1049 {
1050 .of_compatible = "xpower-vregulator,dcdc4",
1051 .name = "reg-virt-consumer",
1052 .id = 4,
1053 .platform_data = AXP152_DCDC4_NAME,
1054 .pdata_size = sizeof(AXP152_DCDC4_NAME),
1055 },
1056 {
1057 .of_compatible = "xpower-vregulator,aldo1",
1058 .name = "reg-virt-consumer",
1059 .id = 5,
1060 .platform_data = AXP152_ALDO1_NAME,
1061 .pdata_size = sizeof(AXP152_ALDO1_NAME),
1062 },
1063 {
1064 .of_compatible = "xpower-vregulator,aldo2",
1065 .name = "reg-virt-consumer",
1066 .id = 6,
1067 .platform_data = AXP152_ALDO2_NAME,
1068 .pdata_size = sizeof(AXP152_ALDO2_NAME),
1069 },
1070 {
1071 .of_compatible = "xpower-vregulator,dldo1",
1072 .name = "reg-virt-consumer",
1073 .id = 7,
1074 .platform_data = AXP152_DLDO1_NAME,
1075 .pdata_size = sizeof(AXP152_DLDO1_NAME),
1076 },
1077 {
1078 .of_compatible = "xpower-vregulator,ldo0",
1079 .name = "reg-virt-consumer",
1080 .id = 8,
1081 .platform_data = AXP152_LDO0_NAME,
1082 .pdata_size = sizeof(AXP152_LDO0_NAME),
1083 },
1084 };
1085
1086 static struct resource axp288_adc_resources[] = {
1087 {
1088 .name = "GPADC",
1089 .start = AXP288_IRQ_GPADC,
1090 .end = AXP288_IRQ_GPADC,
1091 .flags = IORESOURCE_IRQ,
1092 },
1093 };
1094
1095 static struct resource axp2101_power_supply_resources[] = {
1096 DEFINE_RES_IRQ_NAMED(AXP2101_IRQ_BWUT, "bat untemp work"),
1097 DEFINE_RES_IRQ_NAMED(AXP2101_IRQ_BWOT, "bat ovtemp work"),
1098 DEFINE_RES_IRQ_NAMED(AXP2101_IRQ_BCUT, "bat untemp chg"),
1099 DEFINE_RES_IRQ_NAMED(AXP2101_IRQ_BCOT, "bat ovtemp chg"),
1100 DEFINE_RES_IRQ_NAMED(AXP2101_IRQ_NEWSOC, "CHG_NEWSOC"),
1101 DEFINE_RES_IRQ_NAMED(AXP2101_IRQ_GWDT, "CHG_GWDT"),
1102 DEFINE_RES_IRQ_NAMED(AXP2101_IRQ_SOCWL1, "low warning1"),
1103 DEFINE_RES_IRQ_NAMED(AXP2101_IRQ_SOCWL2, "low warning2"),
1104 DEFINE_RES_IRQ_NAMED(AXP2101_IRQ_BREMOV, "bat out"),
1105 DEFINE_RES_IRQ_NAMED(AXP2101_IRQ_BINSERT, "bat in"),
1106 DEFINE_RES_IRQ_NAMED(AXP2101_IRQ_VINSET, "usb in"),
1107 DEFINE_RES_IRQ_NAMED(AXP2101_IRQ_VREMOV, "usb out"),
1108 DEFINE_RES_IRQ_NAMED(AXP2101_IRQ_BOVP, "CHG_BOVP"),
1109 DEFINE_RES_IRQ_NAMED(AXP2101_IRQ_CHGTE, "CHG_CHGTE"),
1110 DEFINE_RES_IRQ_NAMED(AXP2101_IRQ_DOTL1, "CHG_DOTL1"),
1111 DEFINE_RES_IRQ_NAMED(AXP2101_IRQ_CHGST, "charging"),
1112 DEFINE_RES_IRQ_NAMED(AXP2101_IRQ_CHGDN, "charge over"),
1113 DEFINE_RES_IRQ_NAMED(AXP2101_IRQ_BOCP, "CHG_BOCP"),
1114 DEFINE_RES_IRQ_NAMED(AXP2101_IRQ_LDOOC, "CHG_LDOOC"),
1115 DEFINE_RES_IRQ_NAMED(AXP2101_IRQ_WDEXP, "CHG_WDEXP"),
1116 };
1117
1118 static struct resource axp2101_pek_resources[] = {
1119 DEFINE_RES_IRQ_NAMED(AXP2101_IRQ_PONN, "PEK_DBF"),
1120 DEFINE_RES_IRQ_NAMED(AXP2101_IRQ_PONP, "PEK_DBR"),
1121 };
1122 /*
1123 static struct resource axp15_power_supply_resources[] = {
1124 DEFINE_RES_IRQ_NAMED(AXP15_IRQ_ALDOIN_H2L, "aldoin H2L"),
1125 DEFINE_RES_IRQ_NAMED(AXP15_IRQ_ALDOIN_L2H, "aldoin L2H"),
1126 DEFINE_RES_IRQ_NAMED(AXP15_IRQ_LDO0IN_H2L, "ldoin H2L"),
1127 DEFINE_RES_IRQ_NAMED(AXP15_IRQ_LDO0IN_L2H, "ldoin L2H"),
1128 DEFINE_RES_IRQ_NAMED(AXP15_IRQ_PEKLO, "pek long"),
1129 DEFINE_RES_IRQ_NAMED(AXP15_IRQ_PEKSH, "pek short"),
1130 DEFINE_RES_IRQ_NAMED(AXP15_IRQ_DCDC4_V_LOW, "DCDC4 smaller"),
1131 DEFINE_RES_IRQ_NAMED(AXP15_IRQ_DCDC3_V_LOW, "DCDC3 smaller"),
1132 DEFINE_RES_IRQ_NAMED(AXP15_IRQ_DCDC2_V_LOW, "DCDC2 smaller"),
1133 DEFINE_RES_IRQ_NAMED(AXP15_IRQ_DCDC1_V_LOW, "DCDC1 smaller"),
1134 DEFINE_RES_IRQ_NAMED(AXP15_IRQ_EVENT_TIMEOUT, "envent timeout"),
1135 };
1136 */
1137 static struct resource axp15_pek_resources[] = {
1138 DEFINE_RES_IRQ_NAMED(AXP15_IRQ_PEKRE, "PEK_DBR"),
1139 DEFINE_RES_IRQ_NAMED(AXP15_IRQ_PEKFE, "PEK_DBF"),
1140 };
1141
1142 static struct resource axp15_gpio_resources[] = {
1143 DEFINE_RES_IRQ_NAMED(AXP15_IRQ_GPIO0, "GPIO0 input"),
1144 DEFINE_RES_IRQ_NAMED(AXP15_IRQ_GPIO1, "GPIO1 input"),
1145 DEFINE_RES_IRQ_NAMED(AXP15_IRQ_GPIO2, "GPIO2 input"),
1146 DEFINE_RES_IRQ_NAMED(AXP15_IRQ_GPIO3, "GPIO3 input"),
1147 };
1148
1149 static struct resource axp1530_pek_resources[] = {
1150 DEFINE_RES_IRQ_NAMED(AXP1530_IRQ_KEY_L2H_EN, "PEK_DBR"),
1151 DEFINE_RES_IRQ_NAMED(AXP1530_IRQ_KEY_H2L_EN, "PEK_DBF"),
1152 };
1153
1154 static struct resource axp858_pek_resources[] = {
1155 DEFINE_RES_IRQ_NAMED(AXP858_IRQ_POKNIRQ_EN, "PEK_DBF"),
1156 DEFINE_RES_IRQ_NAMED(AXP858_IRQ_POKPIRQ_EN, "PEK_DBR"),
1157 };
1158
1159 static struct resource axp803_ac_power_supply_resources[] = {
1160 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_ACIN, "ac in"),
1161 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_ACRE, "ac out"),
1162 };
1163
1164 static struct resource axp803_usb_power_supply_resources[] = {
1165 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_USBIN, "usb in"),
1166 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_USBRE, "usb out"),
1167 };
1168
1169 static struct resource axp803_bat_power_supply_resources[] = {
1170 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_BATINWORK, "bat untemp work"),
1171 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_BATOVWORK, "bat ovtemp work"),
1172 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_BATINCHG, "bat untemp chg"),
1173 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_BATOVCHG, "bat ovtemp chg"),
1174 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_LOWN1, "low warning1"),
1175 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_LOWN2, "low warning2"),
1176 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_BATRE, "bat out"),
1177 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_BATIN, "bat in"),
1178 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_CHAST, "charging"),
1179 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_CHAOV, "charge over"),
1180 };
1181
1182 static struct resource axp803_pek_resources[] = {
1183 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEKFE, "PEK_DBF"),
1184 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEKRE, "PEK_DBR"),
1185 };
1186
1187 static struct resource axp806_pek_resources[] = {
1188 DEFINE_RES_IRQ_NAMED(AXP806_IRQ_PWROK_FALL, "PEK_DBF"),
1189 DEFINE_RES_IRQ_NAMED(AXP806_IRQ_PWROK_RISE, "PEK_DBR"),
1190 };
1191
1192 static struct resource axp2202_pek_resources[] = {
1193 DEFINE_RES_IRQ_NAMED(AXP2202_IRQ_PONN, "PEK_DBF"),
1194 DEFINE_RES_IRQ_NAMED(AXP2202_IRQ_PONP, "PEK_DBR"),
1195 };
1196
1197 static struct resource axp2202_bat_power_supply_resources[] = {
1198 DEFINE_RES_IRQ_NAMED(AXP2202_IRQ_SOCWL1, "soc_drop_w1"),
1199 DEFINE_RES_IRQ_NAMED(AXP2202_IRQ_SOCWL2, "soc_drop_w2"),
1200 DEFINE_RES_IRQ_NAMED(AXP2202_IRQ_NEWSOC, "gauge_new_soc"),
1201 DEFINE_RES_IRQ_NAMED(AXP2202_IRQ_BINSERT, "battery_insert"),
1202 DEFINE_RES_IRQ_NAMED(AXP2202_IRQ_BREMOVE, "battery_remove"),
1203 DEFINE_RES_IRQ_NAMED(AXP2202_IRQ_CHGDN, "battery_charge_done"),
1204 DEFINE_RES_IRQ_NAMED(AXP2202_IRQ_CHGST, "battery_charge_start"),
1205 DEFINE_RES_IRQ_NAMED(AXP2202_IRQ_BOVP, "battery_over_voltage"),
1206 DEFINE_RES_IRQ_NAMED(AXP2202_IRQ_BCOT, "battery_over_temp_chg"),
1207 DEFINE_RES_IRQ_NAMED(AXP2202_IRQ_BCUT, "battery_under_temp_chg"),
1208 DEFINE_RES_IRQ_NAMED(AXP2202_IRQ_BWOT, "battery_over_temp_work"),
1209 DEFINE_RES_IRQ_NAMED(AXP2202_IRQ_BWUT, "battery_under_temp_work"),
1210 };
1211
1212 static struct resource axp2202_usb_power_supply_resources[] = {
1213 DEFINE_RES_IRQ_NAMED(AXP2202_IRQ_VBUS_OV, "vbus_over_volt"),
1214 DEFINE_RES_IRQ_NAMED(AXP2202_IRQ_VINSERT, "vbus_insert"),
1215 DEFINE_RES_IRQ_NAMED(AXP2202_IRQ_VREMOVE, "vbus_remove"),
1216 DEFINE_RES_IRQ_NAMED(AXP2202_IRQ_BC_DONE, "bc1_2_detected"),
1217 DEFINE_RES_IRQ_NAMED(AXP2202_IRQ_BC_CHNG, "bc1_2_detect_change"),
1218 DEFINE_RES_IRQ_NAMED(AXP2202_IRQ_RID_CHNG, "rid_detect_change"),
1219 DEFINE_RES_IRQ_NAMED(AXP2202_IRQ_CREMOVE, "type-c_remove"),
1220 DEFINE_RES_IRQ_NAMED(AXP2202_IRQ_CINSERT, "type-c_insert"),
1221 DEFINE_RES_IRQ_NAMED(AXP2202_IRQ_TOGGLE_DONE, "type-c_toggle"),
1222 DEFINE_RES_IRQ_NAMED(AXP2202_IRQ_VBUS_SAFE5V, "type-c_safe-5v"),
1223 DEFINE_RES_IRQ_NAMED(AXP2202_IRQ_VBUS_SAFE0V, "type-c_safe-0v"),
1224 DEFINE_RES_IRQ_NAMED(AXP2202_IRQ_PWR_CHNG, "type-c_state_change"),
1225 };
1226
1227 static struct resource axp288_extcon_resources[] = {
1228 {
1229 .start = AXP288_IRQ_VBUS_FALL,
1230 .end = AXP288_IRQ_VBUS_FALL,
1231 .flags = IORESOURCE_IRQ,
1232 },
1233 {
1234 .start = AXP288_IRQ_VBUS_RISE,
1235 .end = AXP288_IRQ_VBUS_RISE,
1236 .flags = IORESOURCE_IRQ,
1237 },
1238 {
1239 .start = AXP288_IRQ_MV_CHNG,
1240 .end = AXP288_IRQ_MV_CHNG,
1241 .flags = IORESOURCE_IRQ,
1242 },
1243 {
1244 .start = AXP288_IRQ_BC_USB_CHNG,
1245 .end = AXP288_IRQ_BC_USB_CHNG,
1246 .flags = IORESOURCE_IRQ,
1247 },
1248 };
1249
1250 static struct resource axp288_charger_resources[] = {
1251 {
1252 .start = AXP288_IRQ_OV,
1253 .end = AXP288_IRQ_OV,
1254 .flags = IORESOURCE_IRQ,
1255 },
1256 {
1257 .start = AXP288_IRQ_DONE,
1258 .end = AXP288_IRQ_DONE,
1259 .flags = IORESOURCE_IRQ,
1260 },
1261 {
1262 .start = AXP288_IRQ_CHARGING,
1263 .end = AXP288_IRQ_CHARGING,
1264 .flags = IORESOURCE_IRQ,
1265 },
1266 {
1267 .start = AXP288_IRQ_SAFE_QUIT,
1268 .end = AXP288_IRQ_SAFE_QUIT,
1269 .flags = IORESOURCE_IRQ,
1270 },
1271 {
1272 .start = AXP288_IRQ_SAFE_ENTER,
1273 .end = AXP288_IRQ_SAFE_ENTER,
1274 .flags = IORESOURCE_IRQ,
1275 },
1276 {
1277 .start = AXP288_IRQ_QCBTU,
1278 .end = AXP288_IRQ_QCBTU,
1279 .flags = IORESOURCE_IRQ,
1280 },
1281 {
1282 .start = AXP288_IRQ_CBTU,
1283 .end = AXP288_IRQ_CBTU,
1284 .flags = IORESOURCE_IRQ,
1285 },
1286 {
1287 .start = AXP288_IRQ_QCBTO,
1288 .end = AXP288_IRQ_QCBTO,
1289 .flags = IORESOURCE_IRQ,
1290 },
1291 {
1292 .start = AXP288_IRQ_CBTO,
1293 .end = AXP288_IRQ_CBTO,
1294 .flags = IORESOURCE_IRQ,
1295 },
1296 };
1297
1298 static struct mfd_cell axp288_cells[] = {
1299 {
1300 .name = "axp288_adc",
1301 .num_resources = ARRAY_SIZE(axp288_adc_resources),
1302 .resources = axp288_adc_resources,
1303 },
1304 {
1305 .name = "axp288_extcon",
1306 .num_resources = ARRAY_SIZE(axp288_extcon_resources),
1307 .resources = axp288_extcon_resources,
1308 },
1309 {
1310 .name = "axp288_charger",
1311 .num_resources = ARRAY_SIZE(axp288_charger_resources),
1312 .resources = axp288_charger_resources,
1313 },
1314 {
1315 .name = "axp288_fuel_gauge",
1316 .num_resources = ARRAY_SIZE(axp288_fuel_gauge_resources),
1317 .resources = axp288_fuel_gauge_resources,
1318 },
1319 {
1320 .name = "axp20x-pek",
1321 .num_resources = ARRAY_SIZE(axp288_power_button_resources),
1322 .resources = axp288_power_button_resources,
1323 },
1324 {
1325 .name = "axp288_pmic_acpi",
1326 },
1327 };
1328
1329 #define AXP806_DCDC1_NAME "dcdc1"
1330 #define AXP806_DCDC2_NAME "dcdc2"
1331 #define AXP806_DCDC3_NAME "dcdc3"
1332 #define AXP806_DCDC4_NAME "dcdc4"
1333 #define AXP806_DCDC5_NAME "dcdc5"
1334 #define AXP806_ALDO1_NAME "aldo1"
1335 #define AXP806_ALDO2_NAME "aldo2"
1336 #define AXP806_ALDO3_NAME "aldo3"
1337 #define AXP806_BLDO1_NAME "bldo1"
1338 #define AXP806_BLDO2_NAME "bldo2"
1339 #define AXP806_BLDO3_NAME "bldo3"
1340 #define AXP806_BLDO4_NAME "bldo4"
1341 #define AXP806_CLDO1_NAME "cldo1"
1342 #define AXP806_CLDO2_NAME "cldo2"
1343 #define AXP806_CLDO3_NAME "cldo3"
1344 static struct mfd_cell axp806_cells[] = {
1345 {
1346 .name = "axp2101-pek",
1347 .num_resources = ARRAY_SIZE(axp806_pek_resources),
1348 .resources = axp806_pek_resources,
1349 .of_compatible = "x-powers,axp2101-pek",
1350 },
1351 {
1352 .name = "axp2101-regulator",
1353 },
1354 {
1355 .of_compatible = "xpower-vregulator,dcdc1",
1356 .name = "reg-virt-consumer",
1357 .id = 1,
1358 .platform_data = AXP806_DCDC1_NAME,
1359 .pdata_size = sizeof(AXP806_DCDC1_NAME),
1360 },
1361 {
1362 .of_compatible = "xpower-vregulator,dcdc2",
1363 .name = "reg-virt-consumer",
1364 .id = 2,
1365 .platform_data = AXP806_DCDC2_NAME,
1366 .pdata_size = sizeof(AXP806_DCDC2_NAME),
1367 },
1368 {
1369 .of_compatible = "xpower-vregulator,dcdc3",
1370 .name = "reg-virt-consumer",
1371 .id = 3,
1372 .platform_data = AXP806_DCDC3_NAME,
1373 .pdata_size = sizeof(AXP806_DCDC3_NAME),
1374 },
1375 {
1376 .of_compatible = "xpower-vregulator,dcdc4",
1377 .name = "reg-virt-consumer",
1378 .id = 4,
1379 .platform_data = AXP806_DCDC4_NAME,
1380 .pdata_size = sizeof(AXP806_DCDC4_NAME),
1381 },
1382 {
1383 .of_compatible = "xpower-vregulator,dcdc5",
1384 .name = "reg-virt-consumer",
1385 .id = 5,
1386 .platform_data = AXP806_DCDC5_NAME,
1387 .pdata_size = sizeof(AXP806_DCDC5_NAME),
1388 },
1389 {
1390 .of_compatible = "xpower-vregulator,aldo1",
1391 .name = "reg-virt-consumer",
1392 .id = 6,
1393 .platform_data = AXP806_ALDO1_NAME,
1394 .pdata_size = sizeof(AXP806_ALDO1_NAME),
1395 },
1396 {
1397 .of_compatible = "xpower-vregulator,aldo2",
1398 .name = "reg-virt-consumer",
1399 .id = 7,
1400 .platform_data = AXP806_ALDO2_NAME,
1401 .pdata_size = sizeof(AXP806_ALDO2_NAME),
1402 },
1403 {
1404 .of_compatible = "xpower-vregulator,aldo3",
1405 .name = "reg-virt-consumer",
1406 .id = 8,
1407 .platform_data = AXP806_ALDO3_NAME,
1408 .pdata_size = sizeof(AXP806_ALDO3_NAME),
1409 },
1410 {
1411 .of_compatible = "xpower-vregulator,bldo1",
1412 .name = "reg-virt-consumer",
1413 .id = 9,
1414 .platform_data = AXP806_BLDO1_NAME,
1415 .pdata_size = sizeof(AXP806_BLDO1_NAME),
1416 },
1417 {
1418 .of_compatible = "xpower-vregulator,bldo2",
1419 .name = "reg-virt-consumer",
1420 .id = 10,
1421 .platform_data = AXP806_BLDO2_NAME,
1422 .pdata_size = sizeof(AXP806_BLDO2_NAME),
1423 },
1424 {
1425 .of_compatible = "xpower-vregulator,bldo3",
1426 .name = "reg-virt-consumer",
1427 .id = 11,
1428 .platform_data = AXP806_BLDO3_NAME,
1429 .pdata_size = sizeof(AXP806_BLDO3_NAME),
1430 },
1431 {
1432 .of_compatible = "xpower-vregulator,bldo4",
1433 .name = "reg-virt-consumer",
1434 .id = 12,
1435 .platform_data = AXP806_BLDO4_NAME,
1436 .pdata_size = sizeof(AXP806_BLDO4_NAME),
1437 },
1438 {
1439 .of_compatible = "xpower-vregulator,cldo1",
1440 .name = "reg-virt-consumer",
1441 .id = 13,
1442 .platform_data = AXP806_CLDO1_NAME,
1443 .pdata_size = sizeof(AXP806_CLDO1_NAME),
1444 },
1445 {
1446 .of_compatible = "xpower-vregulator,cldo2",
1447 .name = "reg-virt-consumer",
1448 .id = 14,
1449 .platform_data = AXP806_CLDO2_NAME,
1450 .pdata_size = sizeof(AXP806_CLDO2_NAME),
1451 },
1452 {
1453 .of_compatible = "xpower-vregulator,cldo3",
1454 .name = "reg-virt-consumer",
1455 .id = 15,
1456 .platform_data = AXP806_CLDO3_NAME,
1457 .pdata_size = sizeof(AXP806_CLDO3_NAME),
1458 },
1459 };
1460
1461 static struct mfd_cell axp809_cells[] = {
1462 {
1463 .name = "axp20x-pek",
1464 .num_resources = ARRAY_SIZE(axp809_pek_resources),
1465 .resources = axp809_pek_resources,
1466 }, {
1467 .id = 1,
1468 .name = "axp20x-regulator",
1469 },
1470 };
1471
1472
1473 #define AXP2101_DCDC1 "dcdc1"
1474 #define AXP2101_DCDC2 "dcdc2"
1475 #define AXP2101_DCDC3 "dcdc3"
1476 #define AXP2101_DCDC4 "dcdc4"
1477 #define AXP2101_DCDC5 "dcdc5"
1478 #define AXP2101_ALDO1 "aldo1"
1479 #define AXP2101_ALDO2 "aldo2"
1480 #define AXP2101_ALDO3 "aldo3"
1481 #define AXP2101_ALDO4 "aldo4"
1482 #define AXP2101_BLDO1 "bldo1"
1483 #define AXP2101_BLDO2 "bldo2"
1484 #define AXP2101_DLDO1 "dldo1"
1485 #define AXP2101_DLDO2 "dldo2"
1486
1487 static struct mfd_cell axp2101_cells[] = {
1488 /*{
1489 .name = "axp2101-gpio",
1490 .of_compatible = "x-powers,axp2101-gpio",
1491 }, */
1492 {
1493 .name = "axp2101-pek",
1494 .num_resources = ARRAY_SIZE(axp2101_pek_resources),
1495 .resources = axp2101_pek_resources,
1496 .of_compatible = "x-powers,axp2101-pek",
1497 },
1498 {
1499 .name = "axp2101-regulator",
1500 },
1501 {
1502 .name = "axp2101-power-supply",
1503 .of_compatible = "x-powers,axp2101-power-supply",
1504 .num_resources = ARRAY_SIZE(axp2101_power_supply_resources),
1505 .resources = axp2101_power_supply_resources,
1506 },
1507 {
1508 .name = "axp2xx-watchdog",
1509 .of_compatible = "x-powers,axp2xx-watchdog",
1510 },
1511 {
1512 .of_compatible = "xpower-vregulator,dcdc1",
1513 .name = "reg-virt-consumer",
1514 .id = 1,
1515 .platform_data = AXP2101_DCDC1,
1516 .pdata_size = sizeof(AXP2101_DCDC1),
1517
1518 },
1519 {
1520 .of_compatible = "xpower-vregulator,dcdc2",
1521 .name = "reg-virt-consumer",
1522 .id = 2,
1523 .platform_data = AXP2101_DCDC2,
1524 .pdata_size = sizeof(AXP2101_DCDC2),
1525 },
1526 {
1527 .of_compatible = "xpower-vregulator,dcdc3",
1528 .name = "reg-virt-consumer",
1529 .id = 3,
1530 .platform_data = AXP2101_DCDC3,
1531 .pdata_size = sizeof(AXP2101_DCDC3),
1532 },
1533 {
1534 .of_compatible = "xpower-vregulator,dcdc4",
1535 .name = "reg-virt-consumer",
1536 .id = 4,
1537 .platform_data = AXP2101_DCDC4,
1538 .pdata_size = sizeof(AXP2101_DCDC4),
1539 },
1540 {
1541 .of_compatible = "xpower-vregulator,dcdc5",
1542 .name = "reg-virt-consumer",
1543 .id = 5,
1544 .platform_data = AXP2101_DCDC5,
1545 .pdata_size = sizeof(AXP2101_DCDC5),
1546 },
1547
1548 {
1549 .of_compatible = "xpower-vregulator,aldo1",
1550 .name = "reg-virt-consumer",
1551 .id = 8,
1552 .platform_data = AXP2101_ALDO1,
1553 .pdata_size = sizeof(AXP2101_ALDO1),
1554 },
1555 {
1556 .of_compatible = "xpower-vregulator,aldo2",
1557 .name = "reg-virt-consumer",
1558 .id = 9,
1559 .platform_data = AXP2101_ALDO2,
1560 .pdata_size = sizeof(AXP2101_ALDO2),
1561 },
1562 {
1563 .of_compatible = "xpower-vregulator,aldo3",
1564 .name = "reg-virt-consumer",
1565 .id = 10,
1566 .platform_data = AXP2101_ALDO3,
1567 .pdata_size = sizeof(AXP2101_ALDO3),
1568 },
1569 {
1570 .of_compatible = "xpower-vregulator,aldo4",
1571 .name = "reg-virt-consumer",
1572 .id = 11,
1573 .platform_data = AXP2101_ALDO4,
1574 .pdata_size = sizeof(AXP2101_ALDO4),
1575 },
1576
1577 {
1578 .of_compatible = "xpower-vregulator,bldo1",
1579 .name = "reg-virt-consumer",
1580 .id = 12,
1581 .platform_data = AXP2101_BLDO1,
1582 .pdata_size = sizeof(AXP2101_BLDO1),
1583 },
1584 {
1585 .of_compatible = "xpower-vregulator,bldo2",
1586 .name = "reg-virt-consumer",
1587 .id = 13,
1588 .platform_data = AXP2101_BLDO2,
1589 .pdata_size = sizeof(AXP2101_BLDO2),
1590 },
1591
1592 {
1593 .of_compatible = "xpower-vregulator,dldo1",
1594 .name = "reg-virt-consumer",
1595 .id = 14,
1596 .platform_data = AXP2101_DLDO1,
1597 .pdata_size = sizeof(AXP2101_DLDO1),
1598 },
1599 {
1600 .of_compatible = "xpower-vregulator,dldo2",
1601 .name = "reg-virt-consumer",
1602 .id = 15,
1603 .platform_data = AXP2101_DLDO2,
1604 .pdata_size = sizeof(AXP2101_DLDO2),
1605 },
1606 };
1607 /***************************************/
1608 #define AXP15_DCDC1 "dcdc1"
1609 #define AXP15_DCDC2 "dcdc2"
1610 #define AXP15_DCDC3 "dcdc3"
1611 #define AXP15_DCDC4 "dcdc4"
1612 #define AXP15_DCDC5 "dcdc5"
1613 #define AXP15_ALDO1 "aldo1"
1614 #define AXP15_ALDO2 "aldo2"
1615 #define AXP15_ALDO3 "aldo3"
1616 #define AXP15_ALDO4 "aldo4"
1617 #define AXP15_BLDO1 "bldo1"
1618 #define AXP15_BLDO2 "bldo2"
1619 #define AXP15_DLDO1 "dldo1"
1620 #define AXP15_DLDO2 "dldo2"
1621
1622 static struct mfd_cell axp15_cells[] = {
1623 {
1624 .name = "axp15-gpio",
1625 .of_compatible = "x-powers,axp15-gpio",
1626 .num_resources = ARRAY_SIZE(axp15_gpio_resources),
1627 .resources = axp15_gpio_resources,
1628 },
1629 {
1630 .name = "axp15-pek",
1631 .num_resources = ARRAY_SIZE(axp15_pek_resources),
1632 .resources = axp15_pek_resources,
1633 .of_compatible = "x-powers,axp15-pek",
1634 },
1635 {
1636 .name = "axp15-regulator",
1637 },
1638 /* {
1639 .name = "axp15-power-supply",
1640 .of_compatible = "x-powers,axp15-power-supply",
1641 },*/
1642 {
1643 .of_compatible = "xpower-vregulator,dcdc1",
1644 .name = "reg-virt-consumer",
1645 .id = 1,
1646 .platform_data = AXP15_DCDC1,
1647 .pdata_size = sizeof(AXP15_DCDC1),
1648
1649 },
1650 {
1651 .of_compatible = "xpower-vregulator,dcdc2",
1652 .name = "reg-virt-consumer",
1653 .id = 2,
1654 .platform_data = AXP15_DCDC2,
1655 .pdata_size = sizeof(AXP15_DCDC2),
1656 },
1657 {
1658 .of_compatible = "xpower-vregulator,dcdc3",
1659 .name = "reg-virt-consumer",
1660 .id = 3,
1661 .platform_data = AXP15_DCDC3,
1662 .pdata_size = sizeof(AXP15_DCDC3),
1663 },
1664 {
1665 .of_compatible = "xpower-vregulator,dcdc4",
1666 .name = "reg-virt-consumer",
1667 .id = 4,
1668 .platform_data = AXP15_DCDC4,
1669 .pdata_size = sizeof(AXP15_DCDC4),
1670 },
1671 {
1672 .of_compatible = "xpower-vregulator,dcdc5",
1673 .name = "reg-virt-consumer",
1674 .id = 5,
1675 .platform_data = AXP15_DCDC5,
1676 .pdata_size = sizeof(AXP15_DCDC5),
1677 },
1678
1679 {
1680 .of_compatible = "xpower-vregulator,aldo1",
1681 .name = "reg-virt-consumer",
1682 .id = 8,
1683 .platform_data = AXP15_ALDO1,
1684 .pdata_size = sizeof(AXP15_ALDO1),
1685 },
1686 {
1687 .of_compatible = "xpower-vregulator,aldo2",
1688 .name = "reg-virt-consumer",
1689 .id = 9,
1690 .platform_data = AXP15_ALDO2,
1691 .pdata_size = sizeof(AXP15_ALDO2),
1692 },
1693 {
1694 .of_compatible = "xpower-vregulator,aldo3",
1695 .name = "reg-virt-consumer",
1696 .id = 10,
1697 .platform_data = AXP15_ALDO3,
1698 .pdata_size = sizeof(AXP15_ALDO3),
1699 },
1700 {
1701 .of_compatible = "xpower-vregulator,aldo4",
1702 .name = "reg-virt-consumer",
1703 .id = 11,
1704 .platform_data = AXP15_ALDO4,
1705 .pdata_size = sizeof(AXP15_ALDO4),
1706 },
1707
1708 {
1709 .of_compatible = "xpower-vregulator,bldo1",
1710 .name = "reg-virt-consumer",
1711 .id = 12,
1712 .platform_data = AXP15_BLDO1,
1713 .pdata_size = sizeof(AXP15_BLDO1),
1714 },
1715 {
1716 .of_compatible = "xpower-vregulator,bldo2",
1717 .name = "reg-virt-consumer",
1718 .id = 13,
1719 .platform_data = AXP15_BLDO2,
1720 .pdata_size = sizeof(AXP15_BLDO2),
1721 },
1722
1723 {
1724 .of_compatible = "xpower-vregulator,dldo1",
1725 .name = "reg-virt-consumer",
1726 .id = 14,
1727 .platform_data = AXP15_DLDO1,
1728 .pdata_size = sizeof(AXP15_DLDO1),
1729 },
1730 {
1731 .of_compatible = "xpower-vregulator,dldo2",
1732 .name = "reg-virt-consumer",
1733 .id = 15,
1734 .platform_data = AXP15_DLDO2,
1735 .pdata_size = sizeof(AXP15_DLDO2),
1736 },
1737 };
1738 /***************************************/
1739 #define AXP1530_DCDC1 "dcdc1"
1740 #define AXP1530_DCDC2 "dcdc2"
1741 #define AXP1530_DCDC3 "dcdc3"
1742 #define AXP1530_ALDO1 "aldo1"
1743 #define AXP1530_DLDO1 "dldo1"
1744
1745 static struct mfd_cell axp1530_cells[] = {
1746 {
1747 .name = "axp1530-gpio",
1748 .of_compatible = "x-powers,axp1530-gpio",
1749 /* .num_resources = ARRAY_SIZE(axp1530_gpio_resources),
1750 .resources = axp1530_gpio_resources,*/
1751 },
1752 {
1753 .name = "axp2101-pek",
1754 .num_resources = ARRAY_SIZE(axp1530_pek_resources),
1755 .resources = axp1530_pek_resources,
1756 .of_compatible = "x-powers,axp2101-pek",
1757 },
1758 {
1759 /* match drivers/regulator/axp2101.c */
1760 .name = "axp2101-regulator",
1761 },
1762 {
1763 .of_compatible = "xpower-vregulator,dcdc1",
1764 .name = "reg-virt-consumer",
1765 .id = 1,
1766 .platform_data = AXP1530_DCDC1,
1767 .pdata_size = sizeof(AXP1530_DCDC1),
1768
1769 },
1770 {
1771 .of_compatible = "xpower-vregulator,dcdc2",
1772 .name = "reg-virt-consumer",
1773 .id = 2,
1774 .platform_data = AXP1530_DCDC2,
1775 .pdata_size = sizeof(AXP1530_DCDC2),
1776 },
1777 {
1778 .of_compatible = "xpower-vregulator,dcdc3",
1779 .name = "reg-virt-consumer",
1780 .id = 3,
1781 .platform_data = AXP1530_DCDC3,
1782 .pdata_size = sizeof(AXP1530_DCDC3),
1783 },
1784 {
1785 .of_compatible = "xpower-vregulator,aldo1",
1786 .name = "reg-virt-consumer",
1787 .id = 4,
1788 .platform_data = AXP1530_ALDO1,
1789 .pdata_size = sizeof(AXP1530_ALDO1),
1790 },
1791 {
1792 .of_compatible = "xpower-vregulator,dldo1",
1793 .name = "reg-virt-consumer",
1794 .id = 5,
1795 .platform_data = AXP1530_DLDO1,
1796 .pdata_size = sizeof(AXP1530_DLDO1),
1797 },
1798 };
1799 /**************************************/
1800 #define AXP858_DCDC1 "dcdc1"
1801 #define AXP858_DCDC2 "dcdc2"
1802 #define AXP858_DCDC3 "dcdc3"
1803 #define AXP858_DCDC4 "dcdc4"
1804 #define AXP858_DCDC5 "dcdc5"
1805 #define AXP858_DCDC6 "dcdc6"
1806 #define AXP858_ALDO1 "aldo1"
1807 #define AXP858_ALDO2 "aldo2"
1808 #define AXP858_ALDO3 "aldo3"
1809 #define AXP858_ALDO4 "aldo4"
1810 #define AXP858_ALDO5 "aldo5"
1811 #define AXP858_BLDO1 "bldo1"
1812 #define AXP858_BLDO2 "bldo2"
1813 #define AXP858_BLDO3 "bldo3"
1814 #define AXP858_BLDO4 "bldo4"
1815 #define AXP858_BLDO5 "bldo5"
1816 #define AXP858_CLDO1 "cldo1"
1817 #define AXP858_CLDO2 "cldo2"
1818 #define AXP858_CLDO3 "cldo3"
1819 #define AXP858_CLDO4 "cldo4"
1820 #define AXP858_CPUSLDO "cpusldo"
1821 #define AXP858_SWOUT "swout"
1822
1823 static struct mfd_cell axp858_cells[] = {
1824 {
1825 .name = "axp858-gpio",
1826 .of_compatible = "x-powers,axp858-gpio",
1827 /* .num_resources = ARRAY_SIZE(axp1530_gpio_resources),
1828 .resources = axp1530_gpio_resources,*/
1829 },
1830 {
1831 .name = "axp2101-pek",
1832 .num_resources = ARRAY_SIZE(axp858_pek_resources),
1833 .resources = axp858_pek_resources,
1834 .of_compatible = "x-powers,axp2101-pek",
1835 },
1836 {
1837 .name = "axp2101-regulator",
1838 },
1839 /* {
1840 .name = "axp15-power-supply",
1841 .of_compatible = "x-powers,axp15-power-supply",
1842 },*/
1843 {
1844 .of_compatible = "xpower-vregulator,dcdc1",
1845 .name = "reg-virt-consumer",
1846 .id = 1,
1847 .platform_data = AXP858_DCDC1,
1848 .pdata_size = sizeof(AXP858_DCDC1),
1849
1850 },
1851 {
1852 .of_compatible = "xpower-vregulator,dcdc2",
1853 .name = "reg-virt-consumer",
1854 .id = 2,
1855 .platform_data = AXP858_DCDC2,
1856 .pdata_size = sizeof(AXP858_DCDC2),
1857 },
1858 {
1859 .of_compatible = "xpower-vregulator,dcdc3",
1860 .name = "reg-virt-consumer",
1861 .id = 3,
1862 .platform_data = AXP858_DCDC3,
1863 .pdata_size = sizeof(AXP858_DCDC3),
1864 },
1865 {
1866 .of_compatible = "xpower-vregulator,dcdc4",
1867 .name = "reg-virt-consumer",
1868 .id = 4,
1869 .platform_data = AXP858_DCDC4,
1870 .pdata_size = sizeof(AXP858_DCDC4),
1871 },
1872 {
1873 .of_compatible = "xpower-vregulator,dcdc5",
1874 .name = "reg-virt-consumer",
1875 .id = 5,
1876 .platform_data = AXP858_DCDC5,
1877 .pdata_size = sizeof(AXP858_DCDC5),
1878 },
1879 {
1880 .of_compatible = "xpower-vregulator,dcdc6",
1881 .name = "reg-virt-consumer",
1882 .id = 6,
1883 .platform_data = AXP858_DCDC6,
1884 .pdata_size = sizeof(AXP858_DCDC6),
1885 },
1886 {
1887 .of_compatible = "xpower-vregulator,aldo1",
1888 .name = "reg-virt-consumer",
1889 .id = 7,
1890 .platform_data = AXP858_ALDO1,
1891 .pdata_size = sizeof(AXP858_ALDO1),
1892 },
1893 {
1894 .of_compatible = "xpower-vregulator,aldo2",
1895 .name = "reg-virt-consumer",
1896 .id = 8,
1897 .platform_data = AXP858_ALDO2,
1898 .pdata_size = sizeof(AXP858_ALDO2),
1899 },
1900 {
1901 .of_compatible = "xpower-vregulator,aldo3",
1902 .name = "reg-virt-consumer",
1903 .id = 9,
1904 .platform_data = AXP858_ALDO3,
1905 .pdata_size = sizeof(AXP858_ALDO3),
1906 },
1907 {
1908 .of_compatible = "xpower-vregulator,aldo4",
1909 .name = "reg-virt-consumer",
1910 .id = 10,
1911 .platform_data = AXP858_ALDO4,
1912 .pdata_size = sizeof(AXP858_ALDO4),
1913 },
1914 {
1915 .of_compatible = "xpower-vregulator,aldo5",
1916 .name = "reg-virt-consumer",
1917 .id = 11,
1918 .platform_data = AXP858_ALDO5,
1919 .pdata_size = sizeof(AXP858_ALDO5),
1920 },
1921 {
1922 .of_compatible = "xpower-vregulator,bldo1",
1923 .name = "reg-virt-consumer",
1924 .id = 12,
1925 .platform_data = AXP858_BLDO1,
1926 .pdata_size = sizeof(AXP858_BLDO1),
1927 },
1928 {
1929 .of_compatible = "xpower-vregulator,bldo2",
1930 .name = "reg-virt-consumer",
1931 .id = 13,
1932 .platform_data = AXP858_BLDO2,
1933 .pdata_size = sizeof(AXP858_BLDO2),
1934 },
1935 {
1936 .of_compatible = "xpower-vregulator,bldo3",
1937 .name = "reg-virt-consumer",
1938 .id = 14,
1939 .platform_data = AXP858_BLDO3,
1940 .pdata_size = sizeof(AXP858_BLDO3),
1941 },
1942 {
1943 .of_compatible = "xpower-vregulator,bldo4",
1944 .name = "reg-virt-consumer",
1945 .id = 15,
1946 .platform_data = AXP858_BLDO4,
1947 .pdata_size = sizeof(AXP858_BLDO4),
1948 },
1949 {
1950 .of_compatible = "xpower-vregulator,bldo5",
1951 .name = "reg-virt-consumer",
1952 .id = 16,
1953 .platform_data = AXP858_BLDO5,
1954 .pdata_size = sizeof(AXP858_BLDO5),
1955 },
1956 {
1957 .of_compatible = "xpower-vregulator,cldo1",
1958 .name = "reg-virt-consumer",
1959 .id = 17,
1960 .platform_data = AXP858_CLDO1,
1961 .pdata_size = sizeof(AXP858_CLDO1),
1962 },
1963 {
1964 .of_compatible = "xpower-vregulator,cldo2",
1965 .name = "reg-virt-consumer",
1966 .id = 18,
1967 .platform_data = AXP858_CLDO2,
1968 .pdata_size = sizeof(AXP858_CLDO2),
1969 },
1970 {
1971 .of_compatible = "xpower-vregulator,cldo3",
1972 .name = "reg-virt-consumer",
1973 .id = 19,
1974 .platform_data = AXP858_CLDO3,
1975 .pdata_size = sizeof(AXP858_CLDO3),
1976 },
1977 {
1978 .of_compatible = "xpower-vregulator,cldo4",
1979 .name = "reg-virt-consumer",
1980 .id = 20,
1981 .platform_data = AXP858_CLDO4,
1982 .pdata_size = sizeof(AXP858_CLDO4),
1983 },
1984 {
1985 .of_compatible = "xpower-vregulator,cpusldo",
1986 .name = "reg-virt-consumer",
1987 .id = 21,
1988 .platform_data = AXP858_CPUSLDO,
1989 .pdata_size = sizeof(AXP858_CPUSLDO),
1990 },
1991 {
1992 .of_compatible = "xpower-vregulator,swout",
1993 .name = "reg-virt-consumer",
1994 .id = 22,
1995 .platform_data = AXP858_SWOUT,
1996 .pdata_size = sizeof(AXP858_SWOUT),
1997 },
1998
1999 };
2000
2001 #define AXP803_DCDC1 "dcdc1"
2002 #define AXP803_DCDC2 "dcdc2"
2003 #define AXP803_DCDC3 "dcdc3"
2004 #define AXP803_DCDC4 "dcdc4"
2005 #define AXP803_DCDC5 "dcdc5"
2006 #define AXP803_DCDC6 "dcdc6"
2007 #define AXP803_DCDC7 "dcdc7"
2008 #define AXP803_RTCLDO "rtcldo"
2009 #define AXP803_ALDO1 "aldo1"
2010 #define AXP803_ALDO2 "aldo2"
2011 #define AXP803_ALDO3 "aldo3"
2012 #define AXP803_DLDO1 "dldo1"
2013 #define AXP803_DLDO2 "dldo2"
2014 #define AXP803_DLDO3 "dldo3"
2015 #define AXP803_DLDO4 "dldo4"
2016 #define AXP803_ELDO1 "eldo1"
2017 #define AXP803_ELDO2 "eldo2"
2018 #define AXP803_ELDO3 "eldo3"
2019 #define AXP803_FLDO1 "fldo1"
2020 #define AXP803_FLDO2 "fldo2"
2021 #define AXP803_LDOIO0 "ldoio0"
2022 #define AXP803_LDOIO1 "ldoio1"
2023 #define AXP803_DC1SW "dc1sw"
2024 #define AXP803_DRIVEVBUS "drivevbus"
2025
2026 static struct mfd_cell axp803_cells[] = {
2027 {
2028 .name = "axp803-gpio",
2029 .of_compatible = "x-powers,axp803-gpio",
2030 },
2031 {
2032 .name = "axp2101-pek",
2033 .num_resources = ARRAY_SIZE(axp803_pek_resources),
2034 .resources = axp803_pek_resources,
2035 .of_compatible = "x-powers,axp2101-pek",
2036 },
2037 {
2038 .name = "axp2101-regulator",
2039 },
2040 {
2041 .name = "axp803-battery-power-supply",
2042 .of_compatible = "x-powers,axp803-battery-power-supply",
2043 .num_resources = ARRAY_SIZE(axp803_bat_power_supply_resources),
2044 .resources = axp803_bat_power_supply_resources,
2045 },
2046 {
2047 .name = "axp803-ac-power-supply",
2048 .of_compatible = "x-powers,axp803-ac-power-supply",
2049 .num_resources = ARRAY_SIZE(axp803_ac_power_supply_resources),
2050 .resources = axp803_ac_power_supply_resources,
2051 },
2052 {
2053 .name = "axp803-usb-power-supply",
2054 .of_compatible = "x-powers,axp803-usb-power-supply",
2055 .num_resources = ARRAY_SIZE(axp803_usb_power_supply_resources),
2056 .resources = axp803_usb_power_supply_resources,
2057 },
2058 {
2059 .of_compatible = "xpower-vregulator,dcdc1",
2060 .name = "reg-virt-consumer",
2061 .id = 1,
2062 .platform_data = AXP803_DCDC1,
2063 .pdata_size = sizeof(AXP803_DCDC1),
2064 },
2065 {
2066 .of_compatible = "xpower-vregulator,dcdc2",
2067 .name = "reg-virt-consumer",
2068 .id = 2,
2069 .platform_data = AXP803_DCDC2,
2070 .pdata_size = sizeof(AXP803_DCDC2),
2071 },
2072 {
2073 .of_compatible = "xpower-vregulator,dcdc3",
2074 .name = "reg-virt-consumer",
2075 .id = 3,
2076 .platform_data = AXP803_DCDC3,
2077 .pdata_size = sizeof(AXP803_DCDC3),
2078 },
2079 {
2080 .of_compatible = "xpower-vregulator,dcdc4",
2081 .name = "reg-virt-consumer",
2082 .id = 4,
2083 .platform_data = AXP803_DCDC4,
2084 .pdata_size = sizeof(AXP803_DCDC4),
2085 },
2086 {
2087 .of_compatible = "xpower-vregulator,dcdc5",
2088 .name = "reg-virt-consumer",
2089 .id = 5,
2090 .platform_data = AXP803_DCDC5,
2091 .pdata_size = sizeof(AXP803_DCDC5),
2092 },
2093 {
2094 .of_compatible = "xpower-vregulator,dcdc6",
2095 .name = "reg-virt-consumer",
2096 .id = 6,
2097 .platform_data = AXP803_DCDC6,
2098 .pdata_size = sizeof(AXP803_DCDC6),
2099 },
2100 {
2101 .of_compatible = "xpower-vregulator,dcdc7",
2102 .name = "reg-virt-consumer",
2103 .id = 7,
2104 .platform_data = AXP803_DCDC7,
2105 .pdata_size = sizeof(AXP803_DCDC6),
2106 },
2107 {
2108 .of_compatible = "xpower-vregulator,rtcldo",
2109 .name = "reg-virt-consumer",
2110 .id = 8,
2111 .platform_data = AXP803_RTCLDO,
2112 .pdata_size = sizeof(AXP803_RTCLDO),
2113 },
2114 {
2115 .of_compatible = "xpower-vregulator,aldo1",
2116 .name = "reg-virt-consumer",
2117 .id = 9,
2118 .platform_data = AXP803_ALDO1,
2119 .pdata_size = sizeof(AXP803_ALDO1),
2120 },
2121 {
2122 .of_compatible = "xpower-vregulator,aldo2",
2123 .name = "reg-virt-consumer",
2124 .id = 10,
2125 .platform_data = AXP803_ALDO2,
2126 .pdata_size = sizeof(AXP803_ALDO2),
2127 },
2128 {
2129 .of_compatible = "xpower-vregulator,aldo3",
2130 .name = "reg-virt-consumer",
2131 .id = 11,
2132 .platform_data = AXP803_ALDO3,
2133 .pdata_size = sizeof(AXP803_ALDO3),
2134 },
2135 {
2136 .of_compatible = "xpower-vregulator,dldo1",
2137 .name = "reg-virt-consumer",
2138 .id = 12,
2139 .platform_data = AXP803_DLDO1,
2140 .pdata_size = sizeof(AXP803_DLDO1),
2141 },
2142 {
2143 .of_compatible = "xpower-vregulator,dldo2",
2144 .name = "reg-virt-consumer",
2145 .id = 13,
2146 .platform_data = AXP803_DLDO2,
2147 .pdata_size = sizeof(AXP803_DLDO2),
2148 },
2149 {
2150 .of_compatible = "xpower-vregulator,dldo3",
2151 .name = "reg-virt-consumer",
2152 .id = 14,
2153 .platform_data = AXP803_DLDO3,
2154 .pdata_size = sizeof(AXP803_DLDO3),
2155 },
2156 {
2157 .of_compatible = "xpower-vregulator,dldo4",
2158 .name = "reg-virt-consumer",
2159 .id = 15,
2160 .platform_data = AXP803_DLDO4,
2161 .pdata_size = sizeof(AXP803_DLDO4),
2162 },
2163 {
2164 .of_compatible = "xpower-vregulator,eldo1",
2165 .name = "reg-virt-consumer",
2166 .id = 16,
2167 .platform_data = AXP803_ELDO1,
2168 .pdata_size = sizeof(AXP803_ELDO1),
2169 },
2170 {
2171 .of_compatible = "xpower-vregulator,eldo2",
2172 .name = "reg-virt-consumer",
2173 .id = 17,
2174 .platform_data = AXP803_ELDO2,
2175 .pdata_size = sizeof(AXP803_ELDO2),
2176 },
2177 {
2178 .of_compatible = "xpower-vregulator,eldo3",
2179 .name = "reg-virt-consumer",
2180 .id = 18,
2181 .platform_data = AXP803_ELDO3,
2182 .pdata_size = sizeof(AXP803_ELDO3),
2183 },
2184 {
2185 .of_compatible = "xpower-vregulator,fldo1",
2186 .name = "reg-virt-consumer",
2187 .id = 19,
2188 .platform_data = AXP803_FLDO1,
2189 .pdata_size = sizeof(AXP803_FLDO1),
2190 },
2191 {
2192 .of_compatible = "xpower-vregulator,fldo2",
2193 .name = "reg-virt-consumer",
2194 .id = 20,
2195 .platform_data = AXP803_FLDO2,
2196 .pdata_size = sizeof(AXP803_FLDO2),
2197 },
2198 {
2199 .of_compatible = "xpower-vregulator,ldoio0",
2200 .name = "reg-virt-consumer",
2201 .id = 21,
2202 .platform_data = AXP803_LDOIO0,
2203 .pdata_size = sizeof(AXP803_LDOIO0),
2204 },
2205 {
2206 .of_compatible = "xpower-vregulator,ldoio1",
2207 .name = "reg-virt-consumer",
2208 .id = 22,
2209 .platform_data = AXP803_LDOIO1,
2210 .pdata_size = sizeof(AXP803_LDOIO1),
2211 },
2212 {
2213 .of_compatible = "xpower-vregulator,dc1sw",
2214 .name = "reg-virt-consumer",
2215 .id = 23,
2216 .platform_data = AXP803_DC1SW,
2217 .pdata_size = sizeof(AXP803_DC1SW),
2218 },
2219 {
2220 .of_compatible = "xpower-vregulator,drivevbus",
2221 .name = "reg-virt-consumer",
2222 .id = 24,
2223 .platform_data = AXP803_DRIVEVBUS,
2224 .pdata_size = sizeof(AXP803_DRIVEVBUS),
2225 },
2226 };
2227
2228 #define AXP2202_DCDC1 "dcdc1"
2229 #define AXP2202_DCDC2 "dcdc2"
2230 #define AXP2202_DCDC3 "dcdc3"
2231 #define AXP2202_DCDC4 "dcdc4"
2232 #define AXP2202_ALDO1 "aldo1"
2233 #define AXP2202_ALDO2 "aldo2"
2234 #define AXP2202_ALDO3 "aldo3"
2235 #define AXP2202_ALDO4 "aldo4"
2236 #define AXP2202_BLDO1 "bldo1"
2237 #define AXP2202_BLDO2 "bldo2"
2238 #define AXP2202_BLDO3 "bldo3"
2239 #define AXP2202_BLDO4 "bldo4"
2240 #define AXP2202_CLDO1 "cldo1"
2241 #define AXP2202_CLDO2 "cldo2"
2242 #define AXP2202_CLDO3 "cldo3"
2243 #define AXP2202_CLDO4 "cldo4"
2244 #define AXP2202_RTCLDO "rtcldo"
2245 #define AXP2202_CPUSLDO "cpusldo"
2246 #define AXP2202_DRIVEVBUS "drivevbus"
2247
2248 static struct mfd_cell axp2202_cells[] = {
2249 {
2250 .name = "axp2202-gpio",
2251 .of_compatible = "x-powers,axp2202-gpio",
2252 },
2253 {
2254 .name = "axp2101-regulator",
2255 },
2256 {
2257 .name = "axp2101-pek",
2258 .of_compatible = "x-powers,axp2101-pek",
2259 .resources = axp2202_pek_resources,
2260 .num_resources = ARRAY_SIZE(axp2202_pek_resources),
2261
2262 },
2263 {
2264 .name = "axp2202-bat-power-supply",
2265 .of_compatible = "x-powers,axp2202-bat-power-supply",
2266 .resources = axp2202_bat_power_supply_resources,
2267 .num_resources = ARRAY_SIZE(axp2202_bat_power_supply_resources),
2268 },
2269 {
2270 .name = "axp2202-usb-power-supply",
2271 .of_compatible = "x-powers,axp2202-usb-power-supply",
2272 .resources = axp2202_usb_power_supply_resources,
2273 .num_resources = ARRAY_SIZE(axp2202_usb_power_supply_resources),
2274 },
2275 {
2276 .name = "gpio-supply",
2277 .of_compatible = "x-powers,gpio-supply",
2278 },
2279 {
2280 .of_compatible = "xpower-vregulator,dcdc1",
2281 .name = "reg-virt-consumer",
2282 .id = 1,
2283 .platform_data = AXP2202_DCDC1,
2284 .pdata_size = sizeof(AXP2202_DCDC1),
2285
2286 },
2287 {
2288 .of_compatible = "xpower-vregulator,dcdc2",
2289 .name = "reg-virt-consumer",
2290 .id = 2,
2291 .platform_data = AXP2202_DCDC2,
2292 .pdata_size = sizeof(AXP2202_DCDC2),
2293 },
2294 {
2295 .of_compatible = "xpower-vregulator,dcdc3",
2296 .name = "reg-virt-consumer",
2297 .id = 3,
2298 .platform_data = AXP2202_DCDC3,
2299 .pdata_size = sizeof(AXP2202_DCDC3),
2300 },
2301 {
2302 .of_compatible = "xpower-vregulator,dcdc4",
2303 .name = "reg-virt-consumer",
2304 .id = 4,
2305 .platform_data = AXP2202_DCDC4,
2306 .pdata_size = sizeof(AXP2202_DCDC4),
2307 },
2308 {
2309 .of_compatible = "xpower-vregulator,aldo1",
2310 .name = "reg-virt-consumer",
2311 .id = 5,
2312 .platform_data = AXP2202_ALDO1,
2313 .pdata_size = sizeof(AXP2202_ALDO1),
2314 },
2315 {
2316 .of_compatible = "xpower-vregulator,aldo2",
2317 .name = "reg-virt-consumer",
2318 .id = 6,
2319 .platform_data = AXP2202_ALDO2,
2320 .pdata_size = sizeof(AXP2202_ALDO2),
2321 },
2322 {
2323 .of_compatible = "xpower-vregulator,aldo3",
2324 .name = "reg-virt-consumer",
2325 .id = 7,
2326 .platform_data = AXP2202_ALDO3,
2327 .pdata_size = sizeof(AXP2202_ALDO3),
2328 },
2329 {
2330 .of_compatible = "xpower-vregulator,aldo4",
2331 .name = "reg-virt-consumer",
2332 .id = 8,
2333 .platform_data = AXP2202_ALDO4,
2334 .pdata_size = sizeof(AXP2202_ALDO4),
2335 },
2336 {
2337 .of_compatible = "xpower-vregulator,bldo1",
2338 .name = "reg-virt-consumer",
2339 .id = 9,
2340 .platform_data = AXP2202_BLDO1,
2341 .pdata_size = sizeof(AXP2202_BLDO1),
2342 },
2343 {
2344 .of_compatible = "xpower-vregulator,bldo2",
2345 .name = "reg-virt-consumer",
2346 .id = 10,
2347 .platform_data = AXP2202_BLDO2,
2348 .pdata_size = sizeof(AXP2202_BLDO2),
2349 },
2350 {
2351 .of_compatible = "xpower-vregulator,bldo3",
2352 .name = "reg-virt-consumer",
2353 .id = 11,
2354 .platform_data = AXP2202_BLDO3,
2355 .pdata_size = sizeof(AXP2202_BLDO3),
2356 },
2357 {
2358 .of_compatible = "xpower-vregulator,bldo4",
2359 .name = "reg-virt-consumer",
2360 .id = 12,
2361 .platform_data = AXP2202_BLDO4,
2362 .pdata_size = sizeof(AXP2202_BLDO4),
2363 },
2364 {
2365 .of_compatible = "xpower-vregulator,cldo1",
2366 .name = "reg-virt-consumer",
2367 .id = 13,
2368 .platform_data = AXP2202_CLDO1,
2369 .pdata_size = sizeof(AXP2202_CLDO1),
2370 },
2371 {
2372 .of_compatible = "xpower-vregulator,cldo2",
2373 .name = "reg-virt-consumer",
2374 .id = 14,
2375 .platform_data = AXP2202_CLDO2,
2376 .pdata_size = sizeof(AXP2202_CLDO2),
2377 },
2378 {
2379 .of_compatible = "xpower-vregulator,cldo3",
2380 .name = "reg-virt-consumer",
2381 .id = 15,
2382 .platform_data = AXP2202_CLDO3,
2383 .pdata_size = sizeof(AXP2202_CLDO3),
2384 },
2385 {
2386 .of_compatible = "xpower-vregulator,cldo4",
2387 .name = "reg-virt-consumer",
2388 .id = 16,
2389 .platform_data = AXP2202_CLDO4,
2390 .pdata_size = sizeof(AXP2202_CLDO4),
2391 },
2392 {
2393 .of_compatible = "xpower-vregulator,rtcldo",
2394 .name = "reg-virt-consumer",
2395 .id = 17,
2396 .platform_data = AXP2202_RTCLDO,
2397 .pdata_size = sizeof(AXP2202_RTCLDO),
2398 },
2399 {
2400 .of_compatible = "xpower-vregulator,cpusldo",
2401 .name = "reg-virt-consumer",
2402 .id = 18,
2403 .platform_data = AXP2202_CPUSLDO,
2404 .pdata_size = sizeof(AXP2202_CPUSLDO),
2405 },
2406
2407 };
2408
2409 /*----------------------*/
2410 static struct axp20x_dev *axp20x_pm_power_off;
axp20x_power_off(void)2411 static void axp20x_power_off(void)
2412 {
2413 if (axp20x_pm_power_off->variant == AXP288_ID)
2414 return;
2415
2416 regmap_write(axp20x_pm_power_off->regmap, AXP20X_OFF_CTRL,
2417 AXP20X_OFF);
2418
2419 /* Give capacitors etc. time to drain to avoid kernel panic msg. */
2420 msleep(500);
2421 }
2422
2423 /*
2424 * axp2101_dts_parse - axp2101 device tree parse
2425 */
axp2101_dts_parse(struct axp20x_dev * axp20x)2426 static void axp2101_dts_parse(struct axp20x_dev *axp20x)
2427 {
2428 struct device_node *node = axp20x->dev->of_node;
2429 struct regmap *map = axp20x->regmap;
2430 u32 val, tempval;
2431
2432 if (of_property_read_bool(axp20x->dev->of_node, "pmu_powerok_noreset")) {
2433 regmap_update_bits(axp20x->regmap, AXP2101_COMM_CFG, BIT(3), 0);
2434 } else {
2435 regmap_update_bits(axp20x->regmap, AXP2101_COMM_CFG, BIT(3),
2436 BIT(3));
2437 }
2438
2439 /* init 16's reset pmu en */
2440 if (of_property_read_u32(node, "pmu_reset", &val))
2441 val = 0;
2442 if (val) {
2443 regmap_update_bits(map, AXP2101_COMM_CFG, BIT(2), BIT(2));
2444 } else {
2445 regmap_update_bits(map, AXP2101_COMM_CFG, BIT(2), 0);
2446 }
2447
2448 /* enable pwrok pin pull low to restart the system */
2449 regmap_update_bits(map, AXP2101_COMM_CFG, BIT(3), BIT(3));
2450
2451 /* init pmu over temperature protection */
2452 if (of_property_read_u32(node, "pmu_hot_shutdown", &val))
2453 val = 0;
2454 if (val) {
2455 regmap_update_bits(map, AXP2101_PWROFF_EN, BIT(2), BIT(2));
2456 if (of_property_read_u32(node, "pmu_hot_shutdown_value", &tempval))
2457 tempval = 125;
2458 regmap_read(map, AXP2101_DIE_TEMP_CFG, &val);
2459 val &= 0xF9;
2460 if (tempval > 135)
2461 val |= 0x06;
2462 else if (tempval > 125)
2463 val |= 0x04;
2464 else if (tempval > 115)
2465 val |= 0x02;
2466 else
2467 val |= 0x00;
2468 regmap_write(map, AXP2101_DIE_TEMP_CFG, val);
2469 } else {
2470 regmap_update_bits(map, AXP2101_PWROFF_EN, BIT(2), 0);
2471 }
2472
2473 /* 85% low voltage turn off pmic function */
2474 /* axp_regmap_write(axp2101->regmap, axp2101_DCDC_PWROFF_EN, 0x3f); */
2475 /* set 2.6v for battery poweroff */
2476 regmap_write(map, AXP2101_VOFF_THLD, 0x00);
2477 /* set delay of powerok after all power output good to 8ms */
2478 regmap_update_bits(map, AXP2101_PWR_TIME_CTRL, 0x03, 0x00);
2479 }
2480
axp803_dts_parse(struct axp20x_dev * axp20x)2481 static void axp803_dts_parse(struct axp20x_dev *axp20x)
2482 {
2483 struct device_node *node = axp20x->dev->of_node;
2484 struct regmap *map = axp20x->regmap;
2485 u32 val, tempval;
2486
2487 /* init 16's reset pmu en */
2488 if (of_property_read_u32(node, "pmu_reset", &val))
2489 val = 0;
2490 if (val) {
2491 regmap_update_bits(map, AXP803_HOTOVER_CTL, BIT(3), BIT(3));
2492 } else {
2493 regmap_update_bits(map, AXP803_HOTOVER_CTL, BIT(3), 0);
2494 }
2495
2496 /* init irq wakeup en */
2497 if (of_property_read_u32(node, "pmu_irq_wakeup", &val))
2498 val = 0;
2499 if (val) {
2500 regmap_update_bits(map, AXP803_HOTOVER_CTL, BIT(7), BIT(7));
2501 } else {
2502 regmap_update_bits(map, AXP803_HOTOVER_CTL, BIT(7), 0);
2503 }
2504
2505 /* init pmu over temperature protection */
2506 if (of_property_read_u32(node, "pmu_hot_shutdown", &val))
2507 val = 1;
2508 if (val) {
2509 regmap_update_bits(map, AXP803_HOTOVER_CTL, BIT(2), BIT(2));
2510 /* default warning level 1 is 105 */
2511 /* level 2/3 add 6.4/12.8 */
2512 if (of_property_read_u32(node, "pmu_hot_shutdown_value", &tempval))
2513 tempval = 105;
2514 regmap_read(map, AXP803_HOTOVER_VAL, &val);
2515 val &= 0xF8;
2516 if (tempval > 135)
2517 val |= 0x07;
2518 else if (tempval > 125)
2519 val |= 0x06;
2520 else if (tempval > 115)
2521 val |= 0x05;
2522 else if (tempval > 105)
2523 val |= 0x04;
2524 else if (tempval > 95)
2525 val |= 0x03;
2526 else if (tempval > 85)
2527 val |= 0x02;
2528 else if (tempval > 75)
2529 val |= 0x01;
2530 else
2531 val |= 0x00;
2532 regmap_write(map, AXP803_HOTOVER_VAL, val);
2533 } else {
2534 regmap_update_bits(map, AXP803_HOTOVER_CTL, BIT(2), 0);
2535 }
2536
2537 /* init inshort status */
2538 if (of_property_read_u32(node, "pmu_inshort", &val))
2539 val = 0;
2540 if (val) {
2541 regmap_update_bits(map, AXP803_HOTOVER_CTL,
2542 BIT(5) | BIT(6), BIT(5) | BIT(6));
2543 } else {
2544 regmap_update_bits(map, AXP803_HOTOVER_CTL,
2545 BIT(5) | BIT(6), 0);
2546 }
2547 }
2548
axp2202_dts_parse(struct axp20x_dev * axp20x)2549 static void axp2202_dts_parse(struct axp20x_dev *axp20x)
2550 {
2551 struct device_node *node = axp20x->dev->of_node;
2552 struct regmap *map = axp20x->regmap;
2553 u32 val, tempval;
2554
2555 /* init powerok reset function */
2556 if (of_property_read_u32(node, "pmu_powerok_noreset", &val))
2557 val = 0;
2558 if (val) {
2559 regmap_update_bits(map, AXP2202_SOFT_PWROFF, BIT(3), 0);
2560 } else {
2561 regmap_update_bits(map, AXP2202_SOFT_PWROFF, BIT(3), BIT(3));
2562 }
2563
2564 /* init 16's por function */
2565 if (of_property_read_u32(node, "pmu_reset", &val))
2566 val = 0;
2567 if (val) {
2568 regmap_update_bits(map, AXP2202_SOFT_PWROFF, BIT(2), BIT(2));
2569 } else {
2570 regmap_update_bits(map, AXP2202_SOFT_PWROFF, BIT(2), 0);
2571 }
2572
2573 /* init irq wakeup en */
2574 if (of_property_read_u32(node, "pmu_irq_wakeup", &val))
2575 val = 0;
2576 if (val) {
2577 regmap_update_bits(map, AXP2202_SLEEP_CFG, BIT(5), BIT(5));
2578 } else {
2579 regmap_update_bits(map, AXP2202_SLEEP_CFG, BIT(5), 0);
2580 }
2581
2582 /* init pmu over temperature protection */
2583 if (of_property_read_u32(node, "pmu_hot_shutdown", &val))
2584 val = 1;
2585 if (val) {
2586 regmap_update_bits(map, AXP2202_PWROFF_EN, BIT(2), BIT(2));
2587 } else {
2588 regmap_update_bits(map, AXP2202_PWROFF_EN, BIT(2), 0);
2589 }
2590
2591 /* init pmu over temperature protection */
2592 if (of_property_read_u32(node, "pmu_hot_shutdown", &val))
2593 val = 0;
2594 if (val) {
2595 regmap_update_bits(map, AXP2202_PWROFF_EN, BIT(2), BIT(2));
2596 if (of_property_read_u32(node,
2597 "pmu_hot_shutdown_value", &tempval))
2598 tempval = 125;
2599 regmap_read(map, AXP2202_DIE_TEMP_CFG, &val);
2600 val &= 0xF9;
2601 if (tempval > 135)
2602 val |= 0x06;
2603 else if (tempval > 125)
2604 val |= 0x04;
2605 else if (tempval > 115)
2606 val |= 0x02;
2607 else
2608 val |= 0x00;
2609 regmap_write(map, AXP2202_DIE_TEMP_CFG, val);
2610 } else {
2611 regmap_update_bits(map, AXP2202_PWROFF_EN, BIT(1), 0);
2612 }
2613 }
2614
2615 /* AXP221/AXP223 AXP809*/
axp20x_dts_parse(struct axp20x_dev * axp20x)2616 static void axp20x_dts_parse(struct axp20x_dev *axp20x)
2617 {
2618 struct device_node *node = axp20x->dev->of_node;
2619 struct regmap *map = axp20x->regmap;
2620 u32 val, tempval;
2621
2622 /* init pmu over temperature protection */
2623 if (of_property_read_u32(node, "pmu_hot_shutdown", &val))
2624 val = 0;
2625 if (val) {
2626 regmap_update_bits(map, AXP20X_OVER_TMP, BIT(2), BIT(2));
2627 /* set overtmp to 105 */
2628 if (of_property_read_u32(node, "pmu_hot_shutdown_value", &tempval))
2629 tempval = 105;
2630 regmap_read(map, AXP20X_OVER_TMP_VAL, &val);
2631 val &= 0xF8;
2632 if (tempval > 135)
2633 val |= 0x07;
2634 else if (tempval > 125)
2635 val |= 0x06;
2636 else if (tempval > 115)
2637 val |= 0x05;
2638 else if (tempval > 105)
2639 val |= 0x04;
2640 else if (tempval > 95)
2641 val |= 0x03;
2642 else if (tempval > 85)
2643 val |= 0x02;
2644 else if (tempval > 75)
2645 val |= 0x01;
2646 else
2647 val |= 0x00;
2648 regmap_write(map, AXP20X_OVER_TMP_VAL, val);
2649 } else {
2650 regmap_update_bits(map, AXP20X_OVER_TMP, BIT(2), 0);
2651 }
2652 }
2653
2654 /* AXP202/AXP209 */
axp209_dts_parse(struct axp20x_dev * axp20x)2655 static void axp209_dts_parse(struct axp20x_dev *axp20x)
2656 {
2657 struct device_node *node = axp20x->dev->of_node;
2658 struct regmap *map = axp20x->regmap;
2659 u32 val, tempval;
2660
2661 /* init pmu over temperature protection */
2662 if (of_property_read_u32(node, "pmu_hot_shutdown", &val))
2663 val = 0;
2664 if (val) {
2665 regmap_update_bits(map, AXP20X_OVER_TMP, BIT(2), BIT(2));
2666 if (of_property_read_u32(node, "pmu_hot_shutdown_value", &tempval))
2667 tempval = 104;
2668 regmap_read(map, AXP20X_OVER_TMP_VAL, &val);
2669 val &= 0xF8;
2670 if (tempval > 124)
2671 val |= 0x07;
2672 else if (tempval > 117)
2673 val |= 0x06;
2674 else if (tempval > 111)
2675 val |= 0x05;
2676 else if (tempval > 104)
2677 val |= 0x04;
2678 else if (tempval > 98)
2679 val |= 0x03;
2680 else if (tempval > 92)
2681 val |= 0x02;
2682 else if (tempval > 85)
2683 val |= 0x01;
2684 else
2685 val |= 0x00;
2686 val |= tempval;
2687 regmap_write(map, AXP20X_OVER_TMP_VAL, val);
2688 } else {
2689 regmap_update_bits(map, AXP20X_OVER_TMP, BIT(2), 0);
2690 }
2691 }
2692
axp152_dts_parse(struct axp20x_dev * axp20x)2693 static void axp152_dts_parse(struct axp20x_dev *axp20x)
2694 {
2695 struct device_node *node = axp20x->dev->of_node;
2696 struct regmap *map = axp20x->regmap;
2697 u32 val, tempval;
2698
2699 /* init pmu over temperature protection */
2700 if (of_property_read_u32(node, "pmu_hot_shutdown", &val))
2701 val = 0;
2702 if (val) {
2703 regmap_update_bits(map, AXP20X_OVER_TMP, BIT(2), BIT(2));
2704 /* default tempval value: BIT(1) */
2705 if (of_property_read_u32(node,
2706 "pmu_hot_shutdown_value", &tempval))
2707 tempval = 125;
2708 regmap_read(map, AXP20X_OVER_TMP, &val);
2709 val &= 0xFC;
2710 if (tempval > 135)
2711 val |= 0x03;
2712 else if (tempval > 125)
2713 val |= 0x02;
2714 else if (tempval > 115)
2715 val |= 0x01;
2716 else
2717 val |= 0x00;
2718 regmap_write(map, AXP20X_OVER_TMP, val);
2719 } else {
2720 regmap_update_bits(map, AXP20X_OVER_TMP, BIT(2), 0);
2721 }
2722 }
2723
axp806_dts_parse(struct axp20x_dev * axp20x)2724 static void axp806_dts_parse(struct axp20x_dev *axp20x)
2725 {
2726 struct device_node *node = axp20x->dev->of_node;
2727 struct regmap *map = axp20x->regmap;
2728 u32 val, tempval;
2729
2730 /* init pmu over temperature protection */
2731 if (of_property_read_u32(node, "pmu_hot_shutdown", &val))
2732 val = 0;
2733 if (val) {
2734 regmap_update_bits(map, AXP806_OFF_CTL, BIT(1), BIT(1));
2735 if (of_property_read_u32(node,
2736 "pmu_hot_shutdown_value", &tempval))
2737 tempval = 125;
2738 regmap_read(map, AXP806_VREF_TEMP_WARN_L, &val);
2739 val &= 0xFC;
2740 if (tempval > 135)
2741 val |= 0x03;
2742 else if (tempval > 125)
2743 val |= 0x02;
2744 else if (tempval > 115)
2745 val |= 0x01;
2746 else
2747 val |= 0x00;
2748 regmap_write(map, AXP806_VREF_TEMP_WARN_L, val);
2749 } else {
2750 regmap_update_bits(map, AXP806_OFF_CTL, BIT(1), 0);
2751 }
2752 }
2753
axp1530_dts_parse(struct axp20x_dev * axp20x)2754 static void axp1530_dts_parse(struct axp20x_dev *axp20x)
2755 {
2756 struct device_node *node = axp20x->dev->of_node;
2757 struct regmap *map = axp20x->regmap;
2758 u32 val, tempval;
2759
2760 /* init pmu over temperature protection */
2761 if (of_property_read_u32(node, "pmu_hot_shutdown", &val))
2762 val = 0;
2763 if (val) {
2764 regmap_update_bits(map, AXP1530_POWER_STATUS, BIT(1), BIT(1));
2765 if (of_property_read_u32(node,
2766 "pmu_hot_shutdown_value", &tempval))
2767 tempval = 125;
2768 regmap_read(map, AXP1530_POWER_STATUS, &val);
2769 val &= 0xFE;
2770 if (tempval > 125)
2771 val |= 0x01;
2772 else
2773 val |= 0x00;
2774 regmap_write(map, AXP1530_POWER_STATUS, val);
2775 } else {
2776 regmap_update_bits(map, AXP1530_POWER_STATUS, BIT(1), 0);
2777 }
2778 }
2779
axp858_dts_parse(struct axp20x_dev * axp20x)2780 static void axp858_dts_parse(struct axp20x_dev *axp20x)
2781 {
2782 struct device_node *node = axp20x->dev->of_node;
2783 struct regmap *map = axp20x->regmap;
2784 u32 val, tempval;
2785
2786 /* init pmu over temperature protection */
2787 if (of_property_read_u32(node, "pmu_hot_shutdown", &val))
2788 val = 0;
2789 if (val) {
2790 regmap_update_bits(map, AXP858_POWER_DOWN_DIS, BIT(1), BIT(1));
2791 if (of_property_read_u32(node,
2792 "pmu_hot_shutdown_value", &tempval))
2793 tempval = 125;
2794 regmap_read(map, AXP858_VREF_TEM_SET, &val);
2795 val &= 0xFC;
2796 if (tempval > 135)
2797 val |= 0x03;
2798 else if (tempval > 125)
2799 val |= 0x02;
2800 else if (tempval > 115)
2801 val |= 0x01;
2802 else
2803 val |= 0x00;
2804 regmap_write(map, AXP858_VREF_TEM_SET, val);
2805 } else {
2806 regmap_update_bits(map, AXP858_POWER_DOWN_DIS, BIT(1), 0);
2807 }
2808 }
2809
axp20x_match_device(struct axp20x_dev * axp20x)2810 int axp20x_match_device(struct axp20x_dev *axp20x)
2811 {
2812 struct device *dev = axp20x->dev;
2813 const struct acpi_device_id *acpi_id;
2814 const struct of_device_id *of_id;
2815
2816 if (dev->of_node) {
2817 of_id = of_match_device(dev->driver->of_match_table, dev);
2818 if (!of_id) {
2819 dev_err(dev, "Unable to match OF ID\n");
2820 return -ENODEV;
2821 }
2822 axp20x->variant = (long)of_id->data;
2823 } else {
2824 acpi_id = acpi_match_device(dev->driver->acpi_match_table, dev);
2825 if (!acpi_id || !acpi_id->driver_data) {
2826 dev_err(dev, "Unable to match ACPI ID and data\n");
2827 return -ENODEV;
2828 }
2829 axp20x->variant = (long)acpi_id->driver_data;
2830 }
2831
2832 switch (axp20x->variant) {
2833 case AXP152_ID:
2834 axp20x->nr_cells = ARRAY_SIZE(axp152_cells);
2835 axp20x->cells = axp152_cells;
2836 axp20x->regmap_cfg = &axp152_regmap_config;
2837 axp20x->regmap_irq_chip = &axp152_regmap_irq_chip;
2838 axp20x->dts_parse = axp152_dts_parse;
2839 break;
2840 case AXP202_ID:
2841 case AXP209_ID:
2842 axp20x->nr_cells = ARRAY_SIZE(axp20x_cells);
2843 axp20x->cells = axp20x_cells;
2844 axp20x->regmap_cfg = &axp20x_regmap_config;
2845 axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip;
2846 axp20x->dts_parse = axp209_dts_parse;
2847 break;
2848 case AXP221_ID:
2849 case AXP223_ID:
2850 axp20x->nr_cells = ARRAY_SIZE(axp22x_cells);
2851 axp20x->cells = axp22x_cells;
2852 axp20x->regmap_cfg = &axp22x_regmap_config;
2853 axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip;
2854 axp20x->dts_parse = axp20x_dts_parse;
2855 break;
2856 case AXP288_ID:
2857 axp20x->cells = axp288_cells;
2858 axp20x->nr_cells = ARRAY_SIZE(axp288_cells);
2859 axp20x->regmap_cfg = &axp288_regmap_config;
2860 axp20x->regmap_irq_chip = &axp288_regmap_irq_chip;
2861 break;
2862 case AXP806_ID:
2863 axp20x->nr_cells = ARRAY_SIZE(axp806_cells);
2864 axp20x->cells = axp806_cells;
2865 axp20x->regmap_cfg = &axp806_regmap_config;
2866 axp20x->regmap_irq_chip = &axp806_regmap_irq_chip;
2867 axp20x->dts_parse = axp806_dts_parse;
2868 break;
2869 case AXP809_ID:
2870 axp20x->nr_cells = ARRAY_SIZE(axp809_cells);
2871 axp20x->cells = axp809_cells;
2872 axp20x->regmap_cfg = &axp22x_regmap_config;
2873 axp20x->regmap_irq_chip = &axp809_regmap_irq_chip;
2874 axp20x->dts_parse = axp20x_dts_parse;
2875 break;
2876 case AXP2101_ID:
2877 axp20x->nr_cells = ARRAY_SIZE(axp2101_cells);
2878 axp20x->cells = axp2101_cells;
2879 axp20x->regmap_cfg = &axp2101_regmap_config;
2880 axp20x->regmap_irq_chip = &axp2101_regmap_irq_chip;
2881 axp20x->dts_parse = axp2101_dts_parse;
2882 break;
2883 /**************************************/
2884 case AXP15_ID:
2885 axp20x->nr_cells = ARRAY_SIZE(axp15_cells);
2886 axp20x->cells = axp15_cells;
2887 axp20x->regmap_cfg = &axp15_regmap_config;
2888 axp20x->regmap_irq_chip = &axp15_regmap_irq_chip;
2889 break;
2890 /**************************************/
2891 case AXP1530_ID:
2892 axp20x->nr_cells = ARRAY_SIZE(axp1530_cells);
2893 axp20x->cells = axp1530_cells;
2894 axp20x->regmap_cfg = &axp1530_regmap_config;
2895 axp20x->regmap_irq_chip = &axp1530_regmap_irq_chip;
2896 axp20x->dts_parse = axp1530_dts_parse;
2897 break;
2898 /**************************************/
2899 case AXP858_ID:
2900 axp20x->nr_cells = ARRAY_SIZE(axp858_cells);
2901 axp20x->cells = axp858_cells;
2902 axp20x->regmap_cfg = &axp858_regmap_config;
2903 axp20x->regmap_irq_chip = &axp858_regmap_irq_chip;
2904 axp20x->dts_parse = axp858_dts_parse;
2905 break;
2906 case AXP803_ID:
2907 axp20x->nr_cells = ARRAY_SIZE(axp803_cells);
2908 axp20x->cells = axp803_cells;
2909 axp20x->regmap_cfg = &axp803_regmap_config;
2910 axp20x->regmap_irq_chip = &axp803_regmap_irq_chip;
2911 axp20x->dts_parse = axp803_dts_parse;
2912 break;
2913 case AXP2202_ID:
2914 axp20x->nr_cells = ARRAY_SIZE(axp2202_cells);
2915 axp20x->cells = axp2202_cells;
2916 axp20x->regmap_cfg = &axp2202_regmap_config;
2917 axp20x->regmap_irq_chip = &axp2202_regmap_irq_chip;
2918 axp20x->dts_parse = axp2202_dts_parse;
2919 break;
2920 /*-------------------*/
2921 default:
2922 dev_err(dev, "unsupported AXP20X ID %lu\n", axp20x->variant);
2923 return -EINVAL;
2924 }
2925 dev_info(dev, "AXP20x variant %s found\n",
2926 axp20x_model_names[axp20x->variant]);
2927
2928 return 0;
2929 }
2930 EXPORT_SYMBOL(axp20x_match_device);
2931
2932
2933 int axp_debug_mask;
2934 EXPORT_SYMBOL(axp_debug_mask);
2935
debug_mask_store(struct class * class,struct class_attribute * attr,const char * buf,size_t count)2936 static ssize_t debug_mask_store(struct class *class,
2937 struct class_attribute *attr,
2938 const char *buf, size_t count)
2939 {
2940 int val, err;
2941
2942 err = kstrtoint(buf, 16, &val);
2943 if (err)
2944 return err;
2945
2946 axp_debug_mask = val;
2947
2948 return count;
2949 }
2950
debug_mask_show(struct class * class,struct class_attribute * attr,char * buf)2951 static ssize_t debug_mask_show(struct class *class,
2952 struct class_attribute *attr, char *buf)
2953 {
2954 char *s = buf;
2955 char *end = (char *)((ptrdiff_t)buf + (ptrdiff_t)PAGE_SIZE);
2956
2957 s += scnprintf(s, end - s, "%s\n", "1: SPLY 2: REGU 4: INT 8: CHG");
2958 s += scnprintf(s, end - s, "debug_mask=%d\n", axp_debug_mask);
2959
2960 return s - buf;
2961 }
2962 static CLASS_ATTR_RW(debug_mask);
2963
2964 static u32 axp_reg_addr;
2965
axp_reg_show(struct class * class,struct class_attribute * attr,char * buf)2966 static ssize_t axp_reg_show(struct class *class,
2967 struct class_attribute *attr, char *buf)
2968 {
2969 u32 val;
2970
2971 regmap_read(axp20x_pm_power_off->regmap, axp_reg_addr, &val);
2972 return sprintf(buf, "REG[0x%x]=0x%x\n",
2973 axp_reg_addr, val);
2974 }
2975
axp_reg_store(struct class * class,struct class_attribute * attr,const char * buf,size_t count)2976 static ssize_t axp_reg_store(struct class *class,
2977 struct class_attribute *attr,
2978 const char *buf, size_t count)
2979 {
2980 s32 tmp;
2981 u32 val;
2982 int err;
2983
2984 err = kstrtoint(buf, 16, &tmp);
2985 if (err)
2986 return err;
2987
2988 if (tmp < 256) {
2989 axp_reg_addr = tmp;
2990 } else {
2991 val = tmp & 0x00FF;
2992 axp_reg_addr = (tmp >> 8) & 0x00FF;
2993 regmap_write(axp20x_pm_power_off->regmap, axp_reg_addr, val);
2994 }
2995
2996 return count;
2997 }
2998 static CLASS_ATTR_RW(axp_reg);
2999
3000 static struct attribute *axp_class_attrs[] = {
3001 &class_attr_axp_reg.attr,
3002 &class_attr_debug_mask.attr,
3003 NULL,
3004 };
3005 ATTRIBUTE_GROUPS(axp_class);
3006
3007 struct class axp_class = {
3008 .name = "axp",
3009 .class_groups = axp_class_groups,
3010 };
3011
axp_sysfs_init(void)3012 static int axp_sysfs_init(void)
3013 {
3014 int status;
3015
3016 status = class_register(&axp_class);
3017 if (status < 0)
3018 pr_err("%s,%d err, status:%d\n", __func__, __LINE__, status);
3019
3020 return status;
3021 }
3022
axp20x_device_probe(struct axp20x_dev * axp20x)3023 int axp20x_device_probe(struct axp20x_dev *axp20x)
3024 {
3025 int ret;
3026
3027 /*
3028 * on some board ex. qaqc test board, there's no interrupt for axp20x
3029 */
3030 if (axp20x->irq) {
3031 ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq,
3032 IRQF_ONESHOT | IRQF_SHARED, -1,
3033 axp20x->regmap_irq_chip,
3034 &axp20x->regmap_irqc);
3035 if (ret) {
3036 dev_err(axp20x->dev, "failed to add irq chip: %d\n", ret);
3037 return ret;
3038 }
3039 }
3040
3041 if (axp20x->dts_parse)
3042 axp20x->dts_parse(axp20x);
3043
3044 ret = mfd_add_devices(axp20x->dev, 0, axp20x->cells,
3045 axp20x->nr_cells, NULL, 0, NULL);
3046
3047 if (ret) {
3048 dev_err(axp20x->dev, "failed to add MFD devices: %d\n", ret);
3049
3050 if (axp20x->irq)
3051 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
3052
3053 return ret;
3054 }
3055
3056 axp20x_pm_power_off = axp20x;
3057 axp_sysfs_init();
3058 if (!pm_power_off) {
3059 pm_power_off = axp20x_power_off;
3060 }
3061
3062 dev_info(axp20x->dev, "AXP20X driver loaded\n");
3063
3064 return 0;
3065 }
3066 EXPORT_SYMBOL(axp20x_device_probe);
3067
axp20x_device_remove(struct axp20x_dev * axp20x)3068 int axp20x_device_remove(struct axp20x_dev *axp20x)
3069 {
3070 if (axp20x == axp20x_pm_power_off) {
3071 axp20x_pm_power_off = NULL;
3072 pm_power_off = NULL;
3073 }
3074
3075 mfd_remove_devices(axp20x->dev);
3076
3077 if (axp20x->irq)
3078 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
3079
3080 return 0;
3081 }
3082 EXPORT_SYMBOL(axp20x_device_remove);
3083
3084 MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X");
3085 MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");
3086 MODULE_LICENSE("GPL");
3087