1 /*
2 * AXP20x regulators driver.
3 *
4 * Copyright (C) 2013 Carlo Caione <carlo@caione.org>
5 *
6 * This file is subject to the terms and conditions of the GNU General
7 * Public License. See the file "COPYING" in the main directory of this
8 * archive for more details.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16 #include <linux/err.h>
17 #include <linux/init.h>
18 #include <linux/module.h>
19 #include <linux/of.h>
20 #include <linux/of_device.h>
21 #include <linux/platform_device.h>
22 #include <linux/regmap.h>
23 #include <power/axp2101.h>
24 #include <linux/regulator/driver.h>
25 #include <linux/regulator/of_regulator.h>
26
27 #define AXP20X_IO_ENABLED 0x03
28 #define AXP20X_IO_DISABLED 0x07
29
30 #define AXP22X_IO_ENABLED 0x03
31 #define AXP22X_IO_DISABLED 0x04
32
33 #define AXP20X_WORKMODE_DCDC2_MASK BIT(2)
34 #define AXP20X_WORKMODE_DCDC3_MASK BIT(1)
35 #define AXP22X_WORKMODE_DCDCX_MASK(x) BIT(x)
36
37 #define AXP20X_FREQ_DCDC_MASK 0x0f
38
39 #define AXP22X_MISC_N_VBUSEN_FUNC BIT(4)
40
41 #define AXP803_MISC_N_VBUSEN_FUNC BIT(4)
42
43 #define AXP2202_MISC_N_RBFETEN_FUNC BIT(0)
44
45 #define AXP_DESC_IO(_family, _id, _match, _supply, _min, _max, _step, _vreg, \
46 _vmask, _ereg, _emask, _enable_val, _disable_val) \
47 [_family##_##_id] = { \
48 .name = (_match), \
49 .supply_name = (_supply), \
50 .of_match = of_match_ptr(_match), \
51 .regulators_node = of_match_ptr("regulators"), \
52 .type = REGULATOR_VOLTAGE, \
53 .id = _family##_##_id, \
54 .n_voltages = (((_max) - (_min)) / (_step) + 1), \
55 .owner = THIS_MODULE, \
56 .min_uV = (_min) * 1000, \
57 .uV_step = (_step) * 1000, \
58 .vsel_reg = (_vreg), \
59 .vsel_mask = (_vmask), \
60 .enable_reg = (_ereg), \
61 .enable_mask = (_emask), \
62 .enable_val = (_enable_val), \
63 .disable_val = (_disable_val), \
64 .ops = &axp20x_ops, \
65 }
66
67 #define AXP_DESC(_family, _id, _match, _supply, _min, _max, _step, _vreg, \
68 _vmask, _ereg, _emask) \
69 [_family##_##_id] = { \
70 .name = (_match), \
71 .supply_name = (_supply), \
72 .of_match = of_match_ptr(_match), \
73 .regulators_node = of_match_ptr("regulators"), \
74 .type = REGULATOR_VOLTAGE, \
75 .id = _family##_##_id, \
76 .n_voltages = (((_max) - (_min)) / (_step) + 1), \
77 .owner = THIS_MODULE, \
78 .min_uV = (_min) * 1000, \
79 .uV_step = (_step) * 1000, \
80 .vsel_reg = (_vreg), \
81 .vsel_mask = (_vmask), \
82 .enable_reg = (_ereg), \
83 .enable_mask = (_emask), \
84 .ops = &axp20x_ops, \
85 }
86
87 #define AXP_DESC_SW(_family, _id, _match, _supply, _ereg, _emask) \
88 [_family##_##_id] = { \
89 .name = (_match), \
90 .supply_name = (_supply), \
91 .of_match = of_match_ptr(_match), \
92 .regulators_node = of_match_ptr("regulators"), \
93 .type = REGULATOR_VOLTAGE, \
94 .id = _family##_##_id, \
95 .owner = THIS_MODULE, \
96 .enable_reg = (_ereg), \
97 .enable_mask = (_emask), \
98 .ops = &axp20x_ops_sw, \
99 }
100
101 #define AXP_DESC_FIXED(_family, _id, _match, _supply, _volt) \
102 [_family##_##_id] = { \
103 .name = (_match), \
104 .supply_name = (_supply), \
105 .of_match = of_match_ptr(_match), \
106 .regulators_node = of_match_ptr("regulators"), \
107 .type = REGULATOR_VOLTAGE, \
108 .id = _family##_##_id, \
109 .n_voltages = 1, \
110 .owner = THIS_MODULE, \
111 .min_uV = (_volt) * 1000, \
112 .ops = &axp20x_ops_fixed \
113 }
114
115 #define AXP_DESC_RANGES(_family, _id, _match, _supply, _ranges, _n_voltages, \
116 _vreg, _vmask, _ereg, _emask) \
117 [_family##_##_id] = { \
118 .name = (_match), \
119 .supply_name = (_supply), \
120 .of_match = of_match_ptr(_match), \
121 .regulators_node = of_match_ptr("regulators"), \
122 .type = REGULATOR_VOLTAGE, \
123 .id = _family##_##_id, \
124 .n_voltages = (_n_voltages), \
125 .owner = THIS_MODULE, \
126 .vsel_reg = (_vreg), \
127 .vsel_mask = (_vmask), \
128 .enable_reg = (_ereg), \
129 .enable_mask = (_emask), \
130 .linear_ranges = (_ranges), \
131 .n_linear_ranges = ARRAY_SIZE(_ranges), \
132 .ops = &axp20x_ops_range, \
133 }
134
135 #define AXP_DESC_RANGES_VOL_DELAY(_family, _id, _match, _supply, _ranges, _n_voltages, \
136 _vreg, _vmask, _ereg, _emask) \
137 [_family##_##_id] = { \
138 .name = (_match), \
139 .supply_name = (_supply), \
140 .of_match = of_match_ptr(_match), \
141 .regulators_node = of_match_ptr("regulators"), \
142 .type = REGULATOR_VOLTAGE, \
143 .id = _family##_##_id, \
144 .n_voltages = (_n_voltages), \
145 .owner = THIS_MODULE, \
146 .vsel_reg = (_vreg), \
147 .vsel_mask = (_vmask), \
148 .enable_reg = (_ereg), \
149 .enable_mask = (_emask), \
150 .linear_ranges = (_ranges), \
151 .n_linear_ranges = ARRAY_SIZE(_ranges), \
152 .ops = &axp20x_ops_range_vol_delay, \
153 }
154
155 struct regulator_delay {
156 u32 step;
157 u32 final;
158 };
159
regulator_is_enabled_regmap_axp2202_c_drivevbus(struct regulator_dev * rdev)160 int regulator_is_enabled_regmap_axp2202_c_drivevbus(struct regulator_dev *rdev)
161 {
162 unsigned int val[2];
163 int ret;
164
165 ret = regmap_read(rdev->regmap, AXP2202_RBFET_CTRL, &val[0]);
166 if (ret)
167 return ret;
168
169 ret = regmap_read(rdev->regmap, AXP2202_MODULE_EN, &val[1]);
170 if (ret)
171 return ret;
172
173 return ((val[0] &= BIT(0)) && (val[1] &= BIT(4)));
174 }
175
regulator_enable_regmap_axp2202_c_drivevbus(struct regulator_dev * rdev)176 int regulator_enable_regmap_axp2202_c_drivevbus(struct regulator_dev *rdev)
177 {
178 int ret;
179
180 ret = regmap_update_bits(rdev->regmap, AXP2202_RBFET_CTRL, BIT(0), BIT(0));
181 if (ret)
182 return ret;
183
184 ret = regmap_update_bits(rdev->regmap, AXP2202_MODULE_EN, BIT(4), BIT(4));
185
186 return ret;
187 }
188
regulator_disable_regmap_axp2202_c_drivevbus(struct regulator_dev * rdev)189 int regulator_disable_regmap_axp2202_c_drivevbus(struct regulator_dev *rdev)
190 {
191 int ret;
192
193 ret = regmap_update_bits(rdev->regmap, AXP2202_RBFET_CTRL, BIT(0), 0);
194 if (ret)
195 return ret;
196
197 ret = regmap_update_bits(rdev->regmap, AXP2202_MODULE_EN, BIT(4), 0);
198
199 return ret;
200 }
201
axp2101_set_voltage_time_sel(struct regulator_dev * rdev,unsigned int old_selector,unsigned int new_selector)202 static int axp2101_set_voltage_time_sel(struct regulator_dev *rdev,
203 unsigned int old_selector, unsigned int new_selector)
204 {
205 struct regulator_delay *delay = (struct regulator_delay *)rdev->reg_data;
206
207 return abs(new_selector - old_selector) * delay->step + delay->final;
208 };
209
210 static struct regulator_ops axp20x_ops_fixed = {
211 .list_voltage = regulator_list_voltage_linear,
212 };
213
214 static struct regulator_ops axp20x_ops_range = {
215 .set_voltage_sel = regulator_set_voltage_sel_regmap,
216 .get_voltage_sel = regulator_get_voltage_sel_regmap,
217 .list_voltage = regulator_list_voltage_linear_range,
218 .enable = regulator_enable_regmap,
219 .disable = regulator_disable_regmap,
220 .is_enabled = regulator_is_enabled_regmap,
221 .set_voltage_time_sel = axp2101_set_voltage_time_sel,
222 };
223
224 static struct regulator_ops axp20x_ops_range_vol_delay = {
225 .set_voltage_sel = regulator_set_voltage_sel_regmap,
226 .get_voltage_sel = regulator_get_voltage_sel_regmap,
227 .list_voltage = regulator_list_voltage_linear_range,
228 .enable = regulator_enable_regmap,
229 .disable = regulator_disable_regmap,
230 .is_enabled = regulator_is_enabled_regmap,
231 };
232
233 static struct regulator_ops axp20x_ops = {
234 .set_voltage_sel = regulator_set_voltage_sel_regmap,
235 .get_voltage_sel = regulator_get_voltage_sel_regmap,
236 .list_voltage = regulator_list_voltage_linear,
237 .enable = regulator_enable_regmap,
238 .disable = regulator_disable_regmap,
239 .is_enabled = regulator_is_enabled_regmap,
240 .set_voltage_time_sel = axp2101_set_voltage_time_sel,
241 };
242
243 static struct regulator_ops axp20x_ops_sw = {
244 .enable = regulator_enable_regmap,
245 .disable = regulator_disable_regmap,
246 .is_enabled = regulator_is_enabled_regmap,
247 };
248
249 static struct regulator_ops axp2202_c_ops_drivevbus = {
250 .enable = regulator_enable_regmap_axp2202_c_drivevbus,
251 .disable = regulator_disable_regmap_axp2202_c_drivevbus,
252 .is_enabled = regulator_is_enabled_regmap_axp2202_c_drivevbus,
253 };
254
255 static struct regulator_ops axp2202_c_ops_vmid;
256
257 static const struct linear_range axp152_dcdc1_ranges[] = {
258 REGULATOR_LINEAR_RANGE(1700000, 0x0, 0x4, 100000),
259 REGULATOR_LINEAR_RANGE(2400000, 0x5, 0x9, 100000),
260 REGULATOR_LINEAR_RANGE(3000000, 0xa, 0xf, 100000),
261 };
262
263 static const struct linear_range axp152_aldo1_ranges[] = {
264 REGULATOR_LINEAR_RANGE(1200000, 0x0, 0x8, 100000),
265 REGULATOR_LINEAR_RANGE(2500000, 0x9, 0x9, 0),
266 REGULATOR_LINEAR_RANGE(2700000, 0xa, 0xb, 100000),
267 REGULATOR_LINEAR_RANGE(3000000, 0xc, 0xf, 100000),
268 };
269
270 static const struct linear_range axp152_aldo2_ranges[] = {
271 REGULATOR_LINEAR_RANGE(1200000, 0x0, 0x8, 100000),
272 REGULATOR_LINEAR_RANGE(2500000, 0x9, 0x9, 0),
273 REGULATOR_LINEAR_RANGE(2700000, 0xa, 0xb, 100000),
274 REGULATOR_LINEAR_RANGE(3000000, 0xc, 0xf, 100000),
275 };
276
277 static const struct linear_range axp152_ldo0_ranges[] = {
278 REGULATOR_LINEAR_RANGE(5000000, 0x0, 0x0, 0),
279 REGULATOR_LINEAR_RANGE(3300000, 0x1, 0x1, 0),
280 REGULATOR_LINEAR_RANGE(2800000, 0x2, 0x2, 0),
281 REGULATOR_LINEAR_RANGE(2500000, 0x3, 0x3, 0),
282 };
283
284 static const struct regulator_desc axp152_regulators[] = {
285 AXP_DESC_RANGES(AXP152, DCDC1, "dcdc1", "vin1", axp152_dcdc1_ranges,
286 0x10, AXP152_DCDC1_V_OUT, 0xf, AXP152_LDO3456_DC1234_CTRL, BIT(7)),
287 AXP_DESC(AXP152, DCDC2, "dcdc2", "vin2", 700, 2275, 25,
288 AXP152_DCDC2_V_OUT, 0x3f, AXP152_LDO3456_DC1234_CTRL, BIT(6)),
289 AXP_DESC(AXP152, DCDC3, "dcdc3", "vin3", 700, 3500, 50,
290 AXP152_DCDC3_V_OUT, 0x3f, AXP152_LDO3456_DC1234_CTRL, BIT(5)),
291 AXP_DESC(AXP152, DCDC4, "dcdc4", "vin4", 700, 3500, 25,
292 AXP152_DCDC4_V_OUT, 0x7f, AXP152_LDO3456_DC1234_CTRL, BIT(4)),
293 AXP_DESC_RANGES(AXP152, ALDO1, "aldo1", "aldoin", axp152_aldo1_ranges,
294 0x10, AXP152_ALDO12_V_OUT, 0xf0, AXP152_LDO3456_DC1234_CTRL, BIT(3)),
295 AXP_DESC_RANGES(AXP152, ALDO2, "aldo2", "aldoin", axp152_aldo2_ranges,
296 0x10, AXP152_ALDO12_V_OUT, 0xf, AXP152_LDO3456_DC1234_CTRL, BIT(2)),
297 AXP_DESC(AXP152, DLDO1, "dldo1", "dldoin", 700, 3500, 100,
298 AXP152_DLDO1_V_OUT, 0x1f, AXP152_LDO3456_DC1234_CTRL, BIT(1)),
299 AXP_DESC(AXP152, DLDO2, "dldo2", "dldoin", 700, 3500, 100,
300 AXP152_DLDO2_V_OUT, 0x1f, AXP152_LDO3456_DC1234_CTRL, BIT(0)),
301 AXP_DESC_RANGES(AXP152, LDO0, "ldo0", "ldoin", axp152_ldo0_ranges,
302 0x4, AXP152_LDO0_CTRL, 0x30, AXP152_LDO0_CTRL, BIT(7)),
303 AXP_DESC_IO(AXP152, GPIO2_LDO, "gpio2_ldo", "gpio_ldo", 1800, 3300, 100,
304 AXP152_LDOGPIO2_V_OUT, 0xf, AXP152_GPIO2_CTRL, 0x7, 0x2, 0x7),
305 AXP_DESC_FIXED(AXP152, RTC13, "rtcldo13", "rtcldo13in", 1300),
306 AXP_DESC_FIXED(AXP152, RTC18, "rtcldo18", "rtcldo18in", 1800),
307 };
308
309 static const struct linear_range axp20x_ldo4_ranges[] = {
310 REGULATOR_LINEAR_RANGE(1250000, 0x0, 0x0, 0),
311 REGULATOR_LINEAR_RANGE(1300000, 0x1, 0x8, 100000),
312 REGULATOR_LINEAR_RANGE(2500000, 0x9, 0x9, 0),
313 REGULATOR_LINEAR_RANGE(2700000, 0xa, 0xb, 100000),
314 REGULATOR_LINEAR_RANGE(3000000, 0xc, 0xf, 100000),
315 };
316
317 static const struct regulator_desc axp20x_regulators[] = {
318 AXP_DESC(AXP20X, DCDC2, "dcdc2", "vin2", 700, 2275, 25,
319 AXP20X_DCDC2_V_OUT, 0x3f, AXP20X_PWR_OUT_CTRL, 0x10),
320 AXP_DESC(AXP20X, DCDC3, "dcdc3", "vin3", 700, 3500, 25,
321 AXP20X_DCDC3_V_OUT, 0x7f, AXP20X_PWR_OUT_CTRL, 0x02),
322 AXP_DESC_FIXED(AXP20X, LDO1, "ldo1", "acin", 1300),
323 AXP_DESC(AXP20X, LDO2, "ldo2", "ldo24in", 1800, 3300, 100,
324 AXP20X_LDO24_V_OUT, 0xf0, AXP20X_PWR_OUT_CTRL, 0x04),
325 AXP_DESC(AXP20X, LDO3, "ldo3", "ldo3in", 700, 3500, 25,
326 AXP20X_LDO3_V_OUT, 0x7f, AXP20X_PWR_OUT_CTRL, 0x40),
327 AXP_DESC_RANGES(AXP20X, LDO4, "ldo4", "ldo24in", axp20x_ldo4_ranges,
328 16, AXP20X_LDO24_V_OUT, 0x0f, AXP20X_PWR_OUT_CTRL,
329 0x08),
330 AXP_DESC_IO(AXP20X, LDO5, "ldo5", "ldo5in", 1800, 3300, 100,
331 AXP20X_LDO5_V_OUT, 0xf0, AXP20X_GPIO0_CTRL, 0x07,
332 AXP20X_IO_ENABLED, AXP20X_IO_DISABLED),
333 };
334
335 static const struct regulator_desc axp22x_regulators[] = {
336 AXP_DESC(AXP22X, DCDC1, "dcdc1", "vin1", 1600, 3400, 100,
337 AXP22X_DCDC1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(1)),
338 AXP_DESC(AXP22X, DCDC2, "dcdc2", "vin2", 600, 1540, 20,
339 AXP22X_DCDC2_V_OUT, 0x3f, AXP22X_PWR_OUT_CTRL1, BIT(2)),
340 AXP_DESC(AXP22X, DCDC3, "dcdc3", "vin3", 600, 1860, 20,
341 AXP22X_DCDC3_V_OUT, 0x3f, AXP22X_PWR_OUT_CTRL1, BIT(3)),
342 AXP_DESC(AXP22X, DCDC4, "dcdc4", "vin4", 600, 1540, 20,
343 AXP22X_DCDC4_V_OUT, 0x3f, AXP22X_PWR_OUT_CTRL1, BIT(4)),
344 AXP_DESC(AXP22X, DCDC5, "dcdc5", "vin5", 1000, 2550, 50,
345 AXP22X_DCDC5_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(5)),
346 /* secondary switchable output of DCDC1 */
347 AXP_DESC_SW(AXP22X, DC1SW, "dc1sw", NULL, AXP22X_PWR_OUT_CTRL2,
348 BIT(7)),
349 /* LDO regulator internally chained to DCDC5 */
350 AXP_DESC(AXP22X, DC5LDO, "dc5ldo", NULL, 700, 1400, 100,
351 AXP22X_DC5LDO_V_OUT, 0x7, AXP22X_PWR_OUT_CTRL1, BIT(0)),
352 AXP_DESC(AXP22X, ALDO1, "aldo1", "aldoin", 700, 3300, 100,
353 AXP22X_ALDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(6)),
354 AXP_DESC(AXP22X, ALDO2, "aldo2", "aldoin", 700, 3300, 100,
355 AXP22X_ALDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(7)),
356 AXP_DESC(AXP22X, ALDO3, "aldo3", "aldoin", 700, 3300, 100,
357 AXP22X_ALDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL3, BIT(7)),
358 AXP_DESC(AXP22X, DLDO1, "dldo1", "dldoin", 700, 3300, 100,
359 AXP22X_DLDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(3)),
360 AXP_DESC(AXP22X, DLDO2, "dldo2", "dldoin", 700, 3300, 100,
361 AXP22X_DLDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(4)),
362 AXP_DESC(AXP22X, DLDO3, "dldo3", "dldoin", 700, 3300, 100,
363 AXP22X_DLDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(5)),
364 AXP_DESC(AXP22X, DLDO4, "dldo4", "dldoin", 700, 3300, 100,
365 AXP22X_DLDO4_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(6)),
366 AXP_DESC(AXP22X, ELDO1, "eldo1", "eldoin", 700, 3300, 100,
367 AXP22X_ELDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(0)),
368 AXP_DESC(AXP22X, ELDO2, "eldo2", "eldoin", 700, 3300, 100,
369 AXP22X_ELDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(1)),
370 AXP_DESC(AXP22X, ELDO3, "eldo3", "eldoin", 700, 3300, 100,
371 AXP22X_ELDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(2)),
372 /* Note the datasheet only guarantees reliable operation up to
373 * 3.3V, this needs to be enforced via dts provided constraints */
374 AXP_DESC_IO(AXP22X, LDO_IO0, "ldo_io0", "ips", 700, 3800, 100,
375 AXP22X_LDO_IO0_V_OUT, 0x1f, AXP20X_GPIO0_CTRL, 0x07,
376 AXP22X_IO_ENABLED, AXP22X_IO_DISABLED),
377 /* Note the datasheet only guarantees reliable operation up to
378 * 3.3V, this needs to be enforced via dts provided constraints */
379 AXP_DESC_IO(AXP22X, LDO_IO1, "ldo_io1", "ips", 700, 3800, 100,
380 AXP22X_LDO_IO1_V_OUT, 0x1f, AXP20X_GPIO1_CTRL, 0x07,
381 AXP22X_IO_ENABLED, AXP22X_IO_DISABLED),
382 AXP_DESC_FIXED(AXP22X, RTC_LDO, "rtc_ldo", "ips", 3000),
383 };
384
385 static const struct regulator_desc axp22x_drivevbus_regulator = {
386 .name = "drivevbus",
387 .supply_name = "drivevbusin",
388 .of_match = of_match_ptr("drivevbus"),
389 .regulators_node = of_match_ptr("regulators"),
390 .type = REGULATOR_VOLTAGE,
391 .owner = THIS_MODULE,
392 .enable_reg = AXP20X_VBUS_IPSOUT_MGMT,
393 .enable_mask = BIT(2),
394 .ops = &axp20x_ops_sw,
395 };
396
397 static const struct linear_range axp806_dcdca_ranges[] = {
398 REGULATOR_LINEAR_RANGE(600000, 0x0, 0x32, 10000),
399 REGULATOR_LINEAR_RANGE(1120000, 0x33, 0x47, 20000),
400 };
401
402 static const struct linear_range axp806_dcdcd_ranges[] = {
403 REGULATOR_LINEAR_RANGE(600000, 0x0, 0x2d, 20000),
404 REGULATOR_LINEAR_RANGE(1600000, 0x2e, 0x3f, 100000),
405 };
406
407 static const struct linear_range axp806_cldo2_ranges[] = {
408 REGULATOR_LINEAR_RANGE(700000, 0x0, 0x1a, 100000),
409 REGULATOR_LINEAR_RANGE(3400000, 0x1b, 0x1f, 200000),
410 };
411
412 static const struct regulator_desc axp806_regulators[] = {
413 AXP_DESC_RANGES(AXP806, DCDCA, "dcdca", "vina", axp806_dcdca_ranges,
414 72, AXP806_DCDCA_V_CTRL, 0x7f, AXP806_PWR_OUT_CTRL1,
415 BIT(0)),
416 AXP_DESC(AXP806, DCDCB, "dcdcb", "vinb", 1000, 2550, 50,
417 AXP806_DCDCB_V_CTRL, 0x1f, AXP806_PWR_OUT_CTRL1, BIT(1)),
418 AXP_DESC_RANGES(AXP806, DCDCC, "dcdcc", "vinc", axp806_dcdca_ranges,
419 72, AXP806_DCDCC_V_CTRL, 0x7f, AXP806_PWR_OUT_CTRL1,
420 BIT(2)),
421 AXP_DESC_RANGES(AXP806, DCDCD, "dcdcd", "vind", axp806_dcdcd_ranges,
422 64, AXP806_DCDCD_V_CTRL, 0x3f, AXP806_PWR_OUT_CTRL1,
423 BIT(3)),
424 AXP_DESC(AXP806, DCDCE, "dcdce", "vine", 1100, 3400, 100,
425 AXP806_DCDCE_V_CTRL, 0x1f, AXP806_PWR_OUT_CTRL1, BIT(4)),
426 AXP_DESC(AXP806, ALDO1, "aldo1", "aldoin", 700, 3300, 100,
427 AXP806_ALDO1_V_CTRL, 0x1f, AXP806_PWR_OUT_CTRL1, BIT(5)),
428 AXP_DESC(AXP806, ALDO2, "aldo2", "aldoin", 700, 3400, 100,
429 AXP806_ALDO2_V_CTRL, 0x1f, AXP806_PWR_OUT_CTRL1, BIT(6)),
430 AXP_DESC(AXP806, ALDO3, "aldo3", "aldoin", 700, 3300, 100,
431 AXP806_ALDO3_V_CTRL, 0x1f, AXP806_PWR_OUT_CTRL1, BIT(7)),
432 AXP_DESC(AXP806, BLDO1, "bldo1", "bldoin", 700, 1900, 100,
433 AXP806_BLDO1_V_CTRL, 0x0f, AXP806_PWR_OUT_CTRL2, BIT(0)),
434 AXP_DESC(AXP806, BLDO2, "bldo2", "bldoin", 700, 1900, 100,
435 AXP806_BLDO2_V_CTRL, 0x0f, AXP806_PWR_OUT_CTRL2, BIT(1)),
436 AXP_DESC(AXP806, BLDO3, "bldo3", "bldoin", 700, 1900, 100,
437 AXP806_BLDO3_V_CTRL, 0x0f, AXP806_PWR_OUT_CTRL2, BIT(2)),
438 AXP_DESC(AXP806, BLDO4, "bldo4", "bldoin", 700, 1900, 100,
439 AXP806_BLDO4_V_CTRL, 0x0f, AXP806_PWR_OUT_CTRL2, BIT(3)),
440 AXP_DESC(AXP806, CLDO1, "cldo1", "cldoin", 700, 3300, 100,
441 AXP806_CLDO1_V_CTRL, 0x1f, AXP806_PWR_OUT_CTRL2, BIT(4)),
442 AXP_DESC_RANGES(AXP806, CLDO2, "cldo2", "cldoin", axp806_cldo2_ranges,
443 32, AXP806_CLDO2_V_CTRL, 0x1f, AXP806_PWR_OUT_CTRL2,
444 BIT(5)),
445 AXP_DESC(AXP806, CLDO3, "cldo3", "cldoin", 700, 3300, 100,
446 AXP806_CLDO3_V_CTRL, 0x1f, AXP806_PWR_OUT_CTRL2, BIT(6)),
447 AXP_DESC_SW(AXP806, SW, "sw", "swin", AXP806_PWR_OUT_CTRL2, BIT(7)),
448 };
449
450 static const struct linear_range axp809_dcdc4_ranges[] = {
451 REGULATOR_LINEAR_RANGE(600000, 0x0, 0x2f, 20000),
452 REGULATOR_LINEAR_RANGE(1800000, 0x30, 0x38, 100000),
453 };
454
455 static const struct regulator_desc axp809_regulators[] = {
456 AXP_DESC(AXP809, DCDC1, "dcdc1", "vin1", 1600, 3400, 100,
457 AXP22X_DCDC1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(1)),
458 AXP_DESC(AXP809, DCDC2, "dcdc2", "vin2", 600, 1540, 20,
459 AXP22X_DCDC2_V_OUT, 0x3f, AXP22X_PWR_OUT_CTRL1, BIT(2)),
460 AXP_DESC(AXP809, DCDC3, "dcdc3", "vin3", 600, 1860, 20,
461 AXP22X_DCDC3_V_OUT, 0x3f, AXP22X_PWR_OUT_CTRL1, BIT(3)),
462 AXP_DESC_RANGES(AXP809, DCDC4, "dcdc4", "vin4", axp809_dcdc4_ranges,
463 57, AXP22X_DCDC4_V_OUT, 0x3f, AXP22X_PWR_OUT_CTRL1,
464 BIT(4)),
465 AXP_DESC(AXP809, DCDC5, "dcdc5", "vin5", 1000, 2550, 50,
466 AXP22X_DCDC5_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(5)),
467 /* secondary switchable output of DCDC1 */
468 AXP_DESC_SW(AXP809, DC1SW, "dc1sw", NULL, AXP22X_PWR_OUT_CTRL2,
469 BIT(7)),
470 /* LDO regulator internally chained to DCDC5 */
471 AXP_DESC(AXP809, DC5LDO, "dc5ldo", NULL, 700, 1400, 100,
472 AXP22X_DC5LDO_V_OUT, 0x7, AXP22X_PWR_OUT_CTRL1, BIT(0)),
473 AXP_DESC(AXP809, ALDO1, "aldo1", "aldoin", 700, 3300, 100,
474 AXP22X_ALDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(6)),
475 AXP_DESC(AXP809, ALDO2, "aldo2", "aldoin", 700, 3300, 100,
476 AXP22X_ALDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(7)),
477 AXP_DESC(AXP809, ALDO3, "aldo3", "aldoin", 700, 3300, 100,
478 AXP22X_ALDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(5)),
479 AXP_DESC_RANGES(AXP809, DLDO1, "dldo1", "dldoin", axp806_cldo2_ranges,
480 32, AXP22X_DLDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2,
481 BIT(3)),
482 AXP_DESC(AXP809, DLDO2, "dldo2", "dldoin", 700, 3300, 100,
483 AXP22X_DLDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(4)),
484 AXP_DESC(AXP809, ELDO1, "eldo1", "eldoin", 700, 3300, 100,
485 AXP22X_ELDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(0)),
486 AXP_DESC(AXP809, ELDO2, "eldo2", "eldoin", 700, 3300, 100,
487 AXP22X_ELDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(1)),
488 AXP_DESC(AXP809, ELDO3, "eldo3", "eldoin", 700, 3300, 100,
489 AXP22X_ELDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(2)),
490 /*
491 * Note the datasheet only guarantees reliable operation up to
492 * 3.3V, this needs to be enforced via dts provided constraints
493 */
494 AXP_DESC_IO(AXP809, LDO_IO0, "ldo_io0", "ips", 700, 3800, 100,
495 AXP22X_LDO_IO0_V_OUT, 0x1f, AXP20X_GPIO0_CTRL, 0x07,
496 AXP22X_IO_ENABLED, AXP22X_IO_DISABLED),
497 /*
498 * Note the datasheet only guarantees reliable operation up to
499 * 3.3V, this needs to be enforced via dts provided constraints
500 */
501 AXP_DESC_IO(AXP809, LDO_IO1, "ldo_io1", "ips", 700, 3800, 100,
502 AXP22X_LDO_IO1_V_OUT, 0x1f, AXP20X_GPIO1_CTRL, 0x07,
503 AXP22X_IO_ENABLED, AXP22X_IO_DISABLED),
504 AXP_DESC_FIXED(AXP809, RTC_LDO, "rtc_ldo", "ips", 1800),
505 AXP_DESC_SW(AXP809, SW, "sw", "swin", AXP22X_PWR_OUT_CTRL2, BIT(6)),
506 };
507
508 static const struct linear_range axp2101_dcdc2_ranges[] = {
509 REGULATOR_LINEAR_RANGE(500000, 0x0, 0x46, 10000),
510 REGULATOR_LINEAR_RANGE(1220000, 0x47, 0x57, 20000),
511 };
512
513 static const struct linear_range axp2101_dcdc3_ranges[] = {
514 REGULATOR_LINEAR_RANGE(500000, 0x0, 0x46, 10000),
515 REGULATOR_LINEAR_RANGE(1220000, 0x47, 0x57, 20000),
516 REGULATOR_LINEAR_RANGE(1600000, 0x58, 0x6a, 100000),
517 };
518
519 static const struct linear_range axp2101_dcdc4_ranges[] = {
520 REGULATOR_LINEAR_RANGE(500000, 0x0, 0x46, 10000),
521 REGULATOR_LINEAR_RANGE(1220000, 0x47, 0x66, 20000),
522 };
523
524 static const struct linear_range axp2101_rtcldo_ranges[] = {
525 REGULATOR_LINEAR_RANGE(1800000, 0x0, 0x0, 0),
526 REGULATOR_LINEAR_RANGE(2500000, 0x1, 0x1, 0),
527 REGULATOR_LINEAR_RANGE(2800000, 0x2, 0x2, 0),
528 REGULATOR_LINEAR_RANGE(3300000, 0x3, 0x3, 0),
529 };
530
531 static const struct linear_range axp2101_dcdc5_ranges[] = {
532 REGULATOR_LINEAR_RANGE(1400000, 0x0, 0x17, 100000),
533 REGULATOR_LINEAR_RANGE(1200000, 0x19, 0x19, 0),
534 };
535
536 static const struct regulator_desc axp2101_regulators[] = {
537 AXP_DESC(AXP2101, DCDC1, "dcdc1", "vin1", 1500, 3400, 100,
538 AXP2101_DCDC1_CFG, 0x1f, AXP2101_DCDC_CFG0, BIT(0)),
539 AXP_DESC_RANGES(AXP2101, DCDC2, "dcdc2", "vin2", axp2101_dcdc2_ranges,
540 0x58, AXP2101_DCDC2_CFG, 0x7f, AXP2101_DCDC_CFG0,
541 BIT(1)),
542 AXP_DESC_RANGES(AXP2101, DCDC3, "dcdc3", "vin3", axp2101_dcdc3_ranges,
543 0x6b, AXP2101_DCDC3_CFG, 0x7f, AXP2101_DCDC_CFG0,
544 BIT(2)),
545 AXP_DESC_RANGES(AXP2101, DCDC4, "dcdc4", "vin4", axp2101_dcdc4_ranges,
546 0x67, AXP2101_DCDC4_CFG, 0x7f, AXP2101_DCDC_CFG0,
547 BIT(3)),
548 AXP_DESC_RANGES(AXP2101, DCDC5, "dcdc5", "vin5", axp2101_dcdc5_ranges,
549 0x19, AXP2101_DCDC5_CFG, 0x1f, AXP2101_DCDC_CFG0,
550 BIT(4)),
551 AXP_DESC_FIXED(AXP2101, LDO1, "rtcldo", "rtcldoin", 1800),
552 AXP_DESC_FIXED(AXP2101, LDO2, "rtcldo1", "rtcldo1in", 1800),
553 AXP_DESC(AXP2101, LDO3, "aldo1", "aldoin", 500, 3500, 100,
554 AXP2101_ALDO1_CFG, 0x1f, AXP2101_LDO_EN_CFG0, BIT(0)),
555 AXP_DESC(AXP2101, LDO4, "aldo2", "aldoin", 500, 3500, 100,
556 AXP2101_ALDO2_CFG, 0x1f, AXP2101_LDO_EN_CFG0, BIT(1)),
557 AXP_DESC(AXP2101, LDO5, "aldo3", "aldoin", 500, 3500, 100,
558 AXP2101_ALDO3_CFG, 0x1f, AXP2101_LDO_EN_CFG0, BIT(2)),
559 AXP_DESC(AXP2101, LDO6, "aldo4", "aldoin", 500, 3500, 100,
560 AXP2101_ALDO4_CFG, 0x1f, AXP2101_LDO_EN_CFG0, BIT(3)),
561 AXP_DESC(AXP2101, LDO7, "bldo1", "bldoin", 500, 3500, 100,
562 AXP2101_BLDO1_CFG, 0x1f, AXP2101_LDO_EN_CFG0, BIT(4)),
563 AXP_DESC(AXP2101, LDO8, "bldo2", "bldoin", 500, 3500, 100,
564 AXP2101_BLDO2_CFG, 0x1f, AXP2101_LDO_EN_CFG0, BIT(5)),
565 AXP_DESC(AXP2101, LDO9, "dldo1", "dldoin", 500, 3500, 100,
566 AXP2101_DLDO1_CFG, 0x1f, AXP2101_LDO_EN_CFG0, BIT(7)),
567 AXP_DESC(AXP2101, LDO10, "dldo2", "dldoin", 500, 1400, 50,
568 AXP2101_DLDO2_CFG, 0x1f, AXP2101_LDO_EN_CFG1, BIT(0)),
569 AXP_DESC(AXP2101, LDO11, "cpusldo", "cpusldoin", 500, 1400, 50,
570 AXP2101_CPUSLD_CFG, 0x1f, AXP2101_LDO_EN_CFG0, BIT(6)),
571 };
572
573 static const struct linear_range axp15_dcdc1_ranges[] = {
574 REGULATOR_LINEAR_RANGE(1700000, 0x0, 0x4, 100000),
575 REGULATOR_LINEAR_RANGE(2400000, 0x5, 0x9, 100000),
576 REGULATOR_LINEAR_RANGE(3000000, 0xA, 0xF, 100000),
577 };
578
579 static const struct linear_range axp15_aldo2_ranges[] = {
580 REGULATOR_LINEAR_RANGE(1200000, 0x0, 0x8, 100000),
581 REGULATOR_LINEAR_RANGE(2500000, 0x9, 0x9, 0),
582 REGULATOR_LINEAR_RANGE(2700000, 0xA, 0xB, 100000),
583 REGULATOR_LINEAR_RANGE(3000000, 0xC, 0xF, 100000),
584 };
585
586 static const struct linear_range axp15_ldo0_ranges[] = {
587 REGULATOR_LINEAR_RANGE(5000000, 0x0, 0x0, 0),
588 REGULATOR_LINEAR_RANGE(3300000, 0x1, 0x1, 0),
589 REGULATOR_LINEAR_RANGE(2800000, 0x2, 0x2, 0),
590 REGULATOR_LINEAR_RANGE(2500000, 0x3, 0x3, 0),
591 };
592
593 static const struct regulator_desc axp15_regulators[] = {
594 AXP_DESC_RANGES(AXP15, DCDC1, "dcdc1", "vin1", axp15_dcdc1_ranges,
595 0x10, AXP15_DC1OUT_VOL, 0xf, AXP15_LDO3456_DC1234_CTL, BIT(7)),
596 AXP_DESC(AXP15, DCDC2, "dcdc2", "vin2", 700, 2275, 25,
597 AXP15_DC2OUT_VOL, 0x3f, AXP15_LDO3456_DC1234_CTL, BIT(6)),
598 AXP_DESC(AXP15, DCDC3, "dcdc3", "vin3", 700, 3500, 25,
599 AXP15_DC3OUT_VOL, 0x3f, AXP15_LDO3456_DC1234_CTL, BIT(5)),
600 AXP_DESC(AXP15, DCDC4, "dcdc4", "vin4", 700, 3500, 50,
601 AXP15_DC4OUT_VOL, 0x7f, AXP15_LDO3456_DC1234_CTL, BIT(4)),
602
603 AXP_DESC_RANGES(AXP15, LDO1, "ldo0", "ldo0in", axp15_ldo0_ranges,
604 0x4, AXP15_LDO0OUT_VOL, 0x30, AXP15_LDO0OUT_VOL, BIT(7)),
605 AXP_DESC_FIXED(AXP15, LDO2, "rtcldo", "rtcldoin", 3100),
606 AXP_DESC(AXP15, LDO3, "aldo1", "aldoin", 1200, 3300, 100,
607 AXP15_LDO34OUT_VOL, 0xf0, AXP15_LDO3456_DC1234_CTL, BIT(3)),
608 AXP_DESC_RANGES(AXP15, LDO4, "aldo2", "aldoin", axp15_aldo2_ranges,
609 0x10, AXP15_LDO34OUT_VOL, 0xf, AXP15_LDO3456_DC1234_CTL, BIT(3)),
610 AXP_DESC(AXP15, LDO5, "dldo1", "dldoin", 700, 3500, 100,
611 AXP15_LDO5OUT_VOL, 0x1f, AXP15_LDO3456_DC1234_CTL, BIT(1)),
612 AXP_DESC(AXP15, LDO6, "dldo2", "dldoin", 700, 3500, 100,
613 AXP15_LDO6OUT_VOL, 0x1f, AXP15_LDO3456_DC1234_CTL, BIT(0)),
614 AXP_DESC_IO(AXP15, LDO7, "gpio", "gpioin", 1800, 3300, 100,
615 AXP15_GPIO0_VOL, 0xf, AXP15_GPIO2_CTL, 0x7, 0x2, 0x7),
616 };
617
618 static const struct linear_range axp1530_dcdc1_ranges[] = {
619 REGULATOR_LINEAR_RANGE(500000, 0x0, 0x46, 10000),
620 REGULATOR_LINEAR_RANGE(1220000, 0x47, 0x57, 20000),
621 REGULATOR_LINEAR_RANGE(1600000, 0x58, 0x6A, 100000),
622 };
623
624 static const struct linear_range axp1530_dcdc2_ranges[] = {
625 REGULATOR_LINEAR_RANGE(500000, 0x0, 0x46, 10000),
626 REGULATOR_LINEAR_RANGE(1220000, 0x47, 0x57, 20000),
627 };
628
629 static const struct linear_range axp1530_dcdc3_ranges[] = {
630 REGULATOR_LINEAR_RANGE(500000, 0x0, 0x46, 10000),
631 REGULATOR_LINEAR_RANGE(1220000, 0x47, 0x66, 20000),
632 };
633
634 static const struct regulator_desc axp1530_regulators[] = {
635 AXP_DESC_RANGES(AXP1530, DCDC1, "dcdc1", "vin1", axp1530_dcdc1_ranges,
636 0x6B, AXP1530_DCDC1_CONRTOL, 0x7f, AXP1530_OUTPUT_CONTROL, BIT(0)),
637 AXP_DESC_RANGES(AXP1530, DCDC2, "dcdc2", "vin2", axp1530_dcdc2_ranges,
638 0x58, AXP1530_DCDC2_CONRTOL, 0x7f, AXP1530_OUTPUT_CONTROL, BIT(1)),
639 AXP_DESC_RANGES(AXP1530, DCDC3, "dcdc3", "vin3", axp1530_dcdc3_ranges,
640 0x58, AXP1530_DCDC3_CONRTOL, 0x7f, AXP1530_OUTPUT_CONTROL, BIT(2)),
641 AXP_DESC(AXP1530, LDO1, "ldo1", "ldo1in", 500, 3500, 100,
642 AXP1530_ALDO1_CONRTOL, 0x1f, AXP1530_OUTPUT_CONTROL, BIT(3)),
643 AXP_DESC(AXP1530, LDO2, "ldo2", "ldo2in", 500, 3500, 100,
644 AXP1530_DLDO1_CONRTOL, 0x1f, AXP1530_OUTPUT_CONTROL, BIT(4)),
645 };
646
647 static const struct linear_range axp858_dcdc2_ranges[] = {
648 REGULATOR_LINEAR_RANGE(500000, 0x0, 0x46, 10000),
649 REGULATOR_LINEAR_RANGE(1220000, 0x47, 0x57, 20000),
650 };
651
652 static const struct linear_range axp858_dcdc3_ranges[] = {
653 REGULATOR_LINEAR_RANGE(500000, 0x0, 0x46, 10000),
654 REGULATOR_LINEAR_RANGE(1220000, 0x47, 0x57, 20000),
655 };
656
657 static const struct linear_range axp858_dcdc4_ranges[] = {
658 REGULATOR_LINEAR_RANGE(500000, 0x0, 0x46, 10000),
659 REGULATOR_LINEAR_RANGE(1220000, 0x47, 0x57, 20000),
660 };
661
662 static const struct linear_range axp858_dcdc5_ranges[] = {
663 REGULATOR_LINEAR_RANGE(800000, 0x0, 0x20, 10000),
664 REGULATOR_LINEAR_RANGE(1140000, 0x21, 0x44, 20000),
665 };
666
667
668 static const struct regulator_desc axp858_regulators[] = {
669 AXP_DESC(AXP858, DCDC1, "dcdc1", "vin1", 1500, 3400, 100,
670 AXP858_DCDC1_CONTROL, 0x1f, AXP858_OUTPUT_CONTROL1, BIT(0)),
671 AXP_DESC_RANGES(AXP858, DCDC2, "dcdc2", "vin2", axp858_dcdc2_ranges,
672 0x58, AXP858_DCDC2_CONTROL, 0x7f, AXP858_OUTPUT_CONTROL1, BIT(1)),
673 AXP_DESC_RANGES(AXP858, DCDC3, "dcdc3", "vin3", axp858_dcdc3_ranges,
674 0x58, AXP858_DCDC3_CONTROL, 0x7f, AXP858_OUTPUT_CONTROL1, BIT(2)),
675 AXP_DESC_RANGES(AXP858, DCDC4, "dcdc4", "vin4", axp858_dcdc4_ranges,
676 0x58, AXP858_DCDC4_CONTROL, 0x7f, AXP858_OUTPUT_CONTROL1, BIT(3)),
677 AXP_DESC_RANGES(AXP858, DCDC5, "dcdc5", "vin5", axp858_dcdc5_ranges,
678 0x45, AXP858_DCDC5_CONTROL, 0x7f, AXP858_OUTPUT_CONTROL1, BIT(4)),
679 AXP_DESC(AXP858, DCDC6, "dcdc6", "vin6", 500, 3400, 100,
680 AXP858_DCDC6_CONTROL, 0x1f, AXP858_OUTPUT_CONTROL1, BIT(5)),
681 AXP_DESC(AXP858, ALDO1, "aldo1", "aldoin", 700, 3300, 100,
682 AXP858_ALDO1_CONTROL, 0x1f, AXP858_OUTPUT_CONTROL2, BIT(0)),
683 AXP_DESC(AXP858, ALDO2, "aldo2", "aldoin", 700, 3300, 100,
684 AXP858_ALDO2_CTL, 0x1f, AXP858_OUTPUT_CONTROL2, BIT(1)),
685 AXP_DESC(AXP858, ALDO3, "aldo3", "aldoin", 700, 3300, 100,
686 AXP858_ALDO3_CTL, 0x1f, AXP858_OUTPUT_CONTROL2, BIT(2)),
687 AXP_DESC(AXP858, ALDO4, "aldo4", "aldoin", 700, 3300, 100,
688 AXP858_ALDO4_CTL, 0x1f, AXP858_OUTPUT_CONTROL2, BIT(3)),
689 AXP_DESC(AXP858, ALDO5, "aldo5", "aldoin", 700, 3300, 100,
690 AXP858_ALDO5_CTL, 0x1f, AXP858_OUTPUT_CONTROL2, BIT(4)),
691 AXP_DESC(AXP858, BLDO1, "bldo1", "bldoin", 700, 3300, 100,
692 AXP858_BLDO1_CTL, 0x1f, AXP858_OUTPUT_CONTROL2, BIT(5)),
693 AXP_DESC(AXP858, BLDO2, "bldo2", "bldoin", 700, 3300, 100,
694 AXP858_BLDO2_CTL, 0x1f, AXP858_OUTPUT_CONTROL2, BIT(6)),
695 AXP_DESC(AXP858, BLDO3, "bldo3", "bldoin", 700, 3300, 100,
696 AXP858_BLDO3_CTL, 0x1f, AXP858_OUTPUT_CONTROL2, BIT(7)),
697 AXP_DESC(AXP858, BLDO4, "bldo4", "bldoin", 700, 3300, 100,
698 AXP858_BLDO4_CTL, 0x1f, AXP858_OUTPUT_CONTROL3, BIT(0)),
699 AXP_DESC(AXP858, BLDO5, "bldo5", "bldoin", 700, 3300, 100,
700 AXP858_BLDO5_CTL, 0x1f, AXP858_OUTPUT_CONTROL3, BIT(1)),
701 AXP_DESC(AXP858, CLDO1, "cldo1", "cldoin", 700, 3300, 100,
702 AXP858_CLDO1_CTL, 0x1f, AXP858_OUTPUT_CONTROL3, BIT(2)),
703 AXP_DESC(AXP858, CLDO2, "cldo2", "cldoin", 700, 3300, 100,
704 AXP858_CLDO2_CTL, 0x1f, AXP858_OUTPUT_CONTROL3, BIT(3)),
705 AXP_DESC(AXP858, CLDO3, "cldo3", "cldoin", 700, 3300, 100,
706 AXP858_CLDO3_GPIO1_CTL, 0x1f, AXP858_OUTPUT_CONTROL3, BIT(4)),
707 AXP_DESC(AXP858, CLDO4, "cldo4", "cldoin", 700, 4200, 100,
708 AXP858_CLDO4_CTL, 0x3f, AXP858_OUTPUT_CONTROL3, BIT(5)),
709 AXP_DESC(AXP858, CPUSLDO, "cpusldo", "cpusldoin", 700, 1400, 50,
710 AXP858_CPUSLDO_CTL, 0x1f, AXP858_OUTPUT_CONTROL3, BIT(6)),
711 AXP_DESC_SW(AXP858, DC1SW, "swout", "swin", AXP858_OUTPUT_CONTROL3, BIT(7)),
712 };
713
714 static const struct linear_range axp803_dcdc1_ranges[] = {
715 REGULATOR_LINEAR_RANGE(1600000, 0x0, 0x12, 100000),
716 };
717
718 static const struct linear_range axp803_dcdc2_ranges[] = {
719 REGULATOR_LINEAR_RANGE(500000, 0x0, 0x46, 10000),
720 REGULATOR_LINEAR_RANGE(1220000, 0x47, 0x4b, 20000),
721 };
722
723 static const struct linear_range axp803_dcdc3_ranges[] = {
724 REGULATOR_LINEAR_RANGE(500000, 0x0, 0x46, 10000),
725 REGULATOR_LINEAR_RANGE(1220000, 0x47, 0x4b, 20000),
726 };
727
728 static const struct linear_range axp803_dcdc4_ranges[] = {
729 REGULATOR_LINEAR_RANGE(500000, 0x0, 0x46, 10000),
730 REGULATOR_LINEAR_RANGE(1220000, 0x47, 0x4b, 20000),
731 };
732
733 static const struct linear_range axp803_dcdc5_ranges[] = {
734 REGULATOR_LINEAR_RANGE(800000, 0x0, 0x20, 10000),
735 REGULATOR_LINEAR_RANGE(1140000, 0x21, 0x44, 20000),
736 };
737
738 static const struct linear_range axp803_dcdc6_ranges[] = {
739 REGULATOR_LINEAR_RANGE(600000, 0x0, 0x32, 10000),
740 REGULATOR_LINEAR_RANGE(1120000, 0x33, 0x47, 20000),
741 };
742
743 static const struct linear_range axp803_dcdc7_ranges[] = {
744 REGULATOR_LINEAR_RANGE(600000, 0x0, 0x32, 10000),
745 REGULATOR_LINEAR_RANGE(1120000, 0x33, 0x47, 20000),
746 };
747
748 static const struct linear_range axp803_aldo3_ranges[] = {
749 REGULATOR_LINEAR_RANGE(700000, 0x0, 0x1a, 100000),
750 REGULATOR_LINEAR_RANGE(3300000, 0x1b, 0x1f, 0),
751 };
752
753 static const struct linear_range axp803_dldo2_ranges[] = {
754 REGULATOR_LINEAR_RANGE(700000, 0x0, 0x1b, 100000),
755 REGULATOR_LINEAR_RANGE(3600000, 0x1c, 0x1f, 200000),
756 };
757
758 static const struct regulator_desc axp803_regulators[] = {
759 AXP_DESC_RANGES_VOL_DELAY
760 (AXP803, DCDC1, "dcdc1", "vin1", axp803_dcdc1_ranges,
761 0x13, AXP803_DC1OUT_VOL, 0x1f, AXP803_LDO_DC_EN1, BIT(0)),
762 AXP_DESC_RANGES_VOL_DELAY
763 (AXP803, DCDC2, "dcdc2", "vin2", axp803_dcdc2_ranges,
764 0x4c, AXP803_DC2OUT_VOL, 0x7f, AXP803_LDO_DC_EN1, BIT(1)),
765 AXP_DESC_RANGES_VOL_DELAY
766 (AXP803, DCDC3, "dcdc3", "vin3", axp803_dcdc3_ranges,
767 0x4c, AXP803_DC3OUT_VOL, 0x7f, AXP803_LDO_DC_EN1, BIT(2)),
768 AXP_DESC_RANGES_VOL_DELAY
769 (AXP803, DCDC4, "dcdc4", "vin4", axp803_dcdc4_ranges,
770 0x4c, AXP803_DC4OUT_VOL, 0x7f, AXP803_LDO_DC_EN1, BIT(3)),
771 AXP_DESC_RANGES_VOL_DELAY
772 (AXP803, DCDC5, "dcdc5", "vin5", axp803_dcdc5_ranges,
773 0x45, AXP803_DC5OUT_VOL, 0x7f, AXP803_LDO_DC_EN1, BIT(4)),
774 AXP_DESC_RANGES_VOL_DELAY
775 (AXP803, DCDC6, "dcdc6", "vin6", axp803_dcdc6_ranges,
776 0x48, AXP803_DC6OUT_VOL, 0x7f, AXP803_LDO_DC_EN1, BIT(5)),
777 AXP_DESC_RANGES_VOL_DELAY
778 (AXP803, DCDC7, "dcdc7", "vin7", axp803_dcdc5_ranges,
779 0x48, AXP803_DC7OUT_VOL, 0x7f, AXP803_LDO_DC_EN1, BIT(6)),
780 AXP_DESC_FIXED(AXP803, RTCLDO, "rtcldo", "rtcldoin", 1800),
781 AXP_DESC(AXP803, ALDO1, "aldo1", "aldoin", 700, 3300, 100,
782 AXP803_ALDO1OUT_VOL, 0x1f, AXP803_LDO_DC_EN3, BIT(5)),
783 AXP_DESC(AXP803, ALDO2, "aldo2", "aldoin", 700, 3300, 100,
784 AXP803_ALDO2OUT_VOL, 0x1f, AXP803_LDO_DC_EN3, BIT(6)),
785 AXP_DESC_RANGES(AXP803, ALDO3, "aldo3", "aldoin", axp803_aldo3_ranges,
786 0x20, AXP803_ALDO3OUT_VOL, 0x1f, AXP803_LDO_DC_EN3, BIT(7)),
787 AXP_DESC(AXP803, DLDO1, "dldo1", "dldoin", 700, 3300, 100,
788 AXP803_DLDO1OUT_VOL, 0x1f, AXP803_LDO_DC_EN2, BIT(3)),
789 AXP_DESC_RANGES(AXP803, DLDO2, "dldo2", "dldoin", axp803_dldo2_ranges,
790 0x20, AXP803_DLDO2OUT_VOL, 0x1f, AXP803_LDO_DC_EN2, BIT(4)),
791 AXP_DESC(AXP803, DLDO3, "dldo3", "dldoin", 700, 3300, 100,
792 AXP803_DLDO3OUT_VOL, 0x1f, AXP803_LDO_DC_EN2, BIT(5)),
793 AXP_DESC(AXP803, DLDO4, "dldo4", "dldoin", 700, 3300, 100,
794 AXP803_DLDO4OUT_VOL, 0x1f, AXP803_LDO_DC_EN2, BIT(6)),
795 AXP_DESC(AXP803, ELDO1, "eldo1", "eldoin", 700, 1900, 50,
796 AXP803_ELDO1OUT_VOL, 0x1f, AXP803_LDO_DC_EN2, BIT(0)),
797 AXP_DESC(AXP803, ELDO2, "eldo2", "eldoin", 700, 1900, 50,
798 AXP803_ELDO2OUT_VOL, 0x1f, AXP803_LDO_DC_EN2, BIT(1)),
799 AXP_DESC(AXP803, ELDO3, "eldo3", "eldoin", 700, 1900, 50,
800 AXP803_ELDO3OUT_VOL, 0x1f, AXP803_LDO_DC_EN2, BIT(2)),
801 AXP_DESC(AXP803, FLDO1, "fldo1", "fldoin", 700, 1450, 50,
802 AXP803_FLDO1OUT_VOL, 0x0f, AXP803_LDO_DC_EN3, BIT(2)),
803 AXP_DESC(AXP803, FLDO2, "fldo2", "fldoin", 700, 1450, 50,
804 AXP803_FLDO2OUT_VOL, 0x0f, AXP803_LDO_DC_EN3, BIT(3)),
805 AXP_DESC_IO(AXP803, LDOIO0, "ldoio0", "ips", 700, 3300, 100,
806 AXP803_GPIO0LDOOUT_VOL, 0x1f, AXP803_GPIO0_CTL, 0x07,
807 0x3, 0x4),
808 AXP_DESC_IO(AXP803, LDOIO1, "ldoio1", "ips", 700, 3300, 100,
809 AXP803_GPIO1LDOOUT_VOL, 0x1f, AXP803_GPIO1_CTL, 0x07,
810 0x3, 0x4),
811 AXP_DESC_SW(AXP803, DC1SW, "dc1sw", "swin", AXP803_LDO_DC_EN2, BIT(7)),
812 };
813
814 static struct linear_range axp2202_dcdc1_ranges[] = {
815 REGULATOR_LINEAR_RANGE(500000, 0x0, 0x46, 10000),
816 REGULATOR_LINEAR_RANGE(1220000, 0x47, 0x57, 20000),
817 };
818
819 static struct linear_range axp2202_dcdc2_ranges[] = {
820 REGULATOR_LINEAR_RANGE(500000, 0, 0x46, 10000),
821 REGULATOR_LINEAR_RANGE(1220000, 0x47, 0x57, 20000),
822 REGULATOR_LINEAR_RANGE(1600000, 0x58, 0x6b, 100000),
823 };
824
825 static struct linear_range axp2202_dcdc3_ranges[] = {
826 REGULATOR_LINEAR_RANGE(500000, 0, 0x46, 10000),
827 REGULATOR_LINEAR_RANGE(1220000, 0x47, 0x66, 20000),
828 };
829
830 static const struct regulator_desc axp2202_regulators[] = {
831 AXP_DESC_RANGES_VOL_DELAY
832 (AXP2202, DCDC1, "dcdc1", "vin-ps", axp2202_dcdc1_ranges,
833 0x58, AXP2202_DCDC1_CFG, GENMASK(6, 0),
834 AXP2202_DCDC_CFG0, BIT(0)),
835 AXP_DESC_RANGES_VOL_DELAY
836 (AXP2202, DCDC2, "dcdc2", "vin-ps", axp2202_dcdc2_ranges,
837 0x6c, AXP2202_DCDC2_CFG, GENMASK(6, 0),
838 AXP2202_DCDC_CFG0, BIT(1)),
839 AXP_DESC_RANGES_VOL_DELAY
840 (AXP2202, DCDC3, "dcdc3", "vin-ps", axp2202_dcdc3_ranges,
841 0x67, AXP2202_DCDC3_CFG, GENMASK(6, 0),
842 AXP2202_DCDC_CFG0, BIT(2)),
843 AXP_DESC(AXP2202, DCDC4, "dcdc4", "vin-ps", 1000, 3700, 100,
844 AXP2202_DCDC4_CFG, GENMASK(4, 0), AXP2202_DCDC_CFG0,
845 BIT(3)),
846 AXP_DESC(AXP2202, ALDO1, "aldo1", "aldo", 500, 3500, 100,
847 AXP2202_ALDO1_CFG, GENMASK(4, 0), AXP2202_LDO_EN_CFG0,
848 BIT(0)),
849 AXP_DESC(AXP2202, ALDO2, "aldo2", "aldo", 500, 3500, 100,
850 AXP2202_ALDO2_CFG, GENMASK(4, 0), AXP2202_LDO_EN_CFG0,
851 BIT(1)),
852 AXP_DESC(AXP2202, ALDO3, "aldo3", "aldo", 500, 3500, 100,
853 AXP2202_ALDO3_CFG, GENMASK(4, 0), AXP2202_LDO_EN_CFG0,
854 BIT(2)),
855 AXP_DESC(AXP2202, ALDO4, "aldo4", "aldo", 500, 3500, 100,
856 AXP2202_ALDO4_CFG, GENMASK(4, 0), AXP2202_LDO_EN_CFG0,
857 BIT(3)),
858 AXP_DESC(AXP2202, BLDO1, "bldo1", "bldo", 500, 3500, 100,
859 AXP2202_BLDO1_CFG, GENMASK(4, 0), AXP2202_LDO_EN_CFG0,
860 BIT(4)),
861 AXP_DESC(AXP2202, BLDO2, "bldo2", "bldo", 500, 3500, 100,
862 AXP2202_BLDO2_CFG, GENMASK(4, 0), AXP2202_LDO_EN_CFG0,
863 BIT(5)),
864 AXP_DESC(AXP2202, BLDO3, "bldo3", "bldo", 500, 3500, 100,
865 AXP2202_BLDO3_CFG, GENMASK(4, 0), AXP2202_LDO_EN_CFG0,
866 BIT(6)),
867 AXP_DESC(AXP2202, BLDO4, "bldo4", "bldo", 500, 3500, 100,
868 AXP2202_BLDO4_CFG, GENMASK(4, 0), AXP2202_LDO_EN_CFG0,
869 BIT(7)),
870 AXP_DESC(AXP2202, CLDO1, "cldo1", "cldo", 500, 3500, 100,
871 AXP2202_CLDO1_CFG, GENMASK(4, 0), AXP2202_LDO_EN_CFG1,
872 BIT(0)),
873 AXP_DESC(AXP2202, CLDO2, "cldo2", "cldo", 500, 3500, 100,
874 AXP2202_CLDO2_CFG, GENMASK(4, 0), AXP2202_LDO_EN_CFG1,
875 BIT(1)),
876 AXP_DESC(AXP2202, CLDO3, "cldo3", "cldo", 500, 3500, 100,
877 AXP2202_CLDO3_CFG, GENMASK(4, 0), AXP2202_LDO_EN_CFG1,
878 BIT(2)),
879 AXP_DESC(AXP2202, CLDO4, "cldo4", "cldo", 500, 3500, 100,
880 AXP2202_CLDO4_CFG, GENMASK(4, 0), AXP2202_LDO_EN_CFG1,
881 BIT(3)),
882 AXP_DESC_FIXED(AXP2202, RTCLDO, "rtcldo", "vin-ps", 1800),
883 AXP_DESC(AXP2202, CPUSLDO, "cpusldo", "vin-ps", 500, 1400, 50,
884 AXP2202_CPUSLDO_CFG, GENMASK(4, 0), AXP2202_LDO_EN_CFG1,
885 BIT(4)),
886 };
887
888 static const struct regulator_desc axp803_drivevbus_regulator = {
889 .name = "drivevbus",
890 .supply_name = "drivevbusin",
891 .of_match = of_match_ptr("drivevbus"),
892 .regulators_node = of_match_ptr("regulators"),
893 .type = REGULATOR_VOLTAGE,
894 .owner = THIS_MODULE,
895 .enable_reg = AXP803_IPS_SET,
896 .enable_mask = BIT(2),
897 .ops = &axp20x_ops_sw,
898 };
899
900 static const struct regulator_desc axp2202_vmid_regulator = {
901 .name = "vmid",
902 .supply_name = "vin-ps",
903 .of_match = of_match_ptr("vmid"),
904 .regulators_node = of_match_ptr("regulators"),
905 .type = REGULATOR_VOLTAGE,
906 .owner = THIS_MODULE,
907 .enable_reg = AXP2202_MODULE_EN,
908 .enable_mask = BIT(4),
909 .ops = &axp20x_ops_sw,
910 };
911
912 static const struct regulator_desc axp2202_drivevbus_regulator = {
913 .name = "drivevbus",
914 .supply_name = "drivevbus",
915 .of_match = of_match_ptr("drivevbus"),
916 .regulators_node = of_match_ptr("regulators"),
917 .type = REGULATOR_VOLTAGE,
918 .owner = THIS_MODULE,
919 .enable_reg = AXP2202_RBFET_CTRL,
920 .enable_mask = BIT(0),
921 .ops = &axp20x_ops_sw,
922 };
923
924 static const struct regulator_desc axp2202_c_vmid_regulator = {
925 .name = "vmid",
926 .supply_name = "vin-ps",
927 .of_match = of_match_ptr("vmid"),
928 .regulators_node = of_match_ptr("regulators"),
929 .type = REGULATOR_VOLTAGE,
930 .owner = THIS_MODULE,
931 .ops = &axp2202_c_ops_vmid,
932 };
933
934 static const struct regulator_desc axp2202_c_drivevbus_regulator = {
935 .name = "drivevbus",
936 .supply_name = "drivevbusin",
937 .of_match = of_match_ptr("drivevbus"),
938 .regulators_node = of_match_ptr("regulators"),
939 .type = REGULATOR_VOLTAGE,
940 .owner = THIS_MODULE,
941 .ops = &axp2202_c_ops_drivevbus,
942 };
943
axp20x_set_dcdc_freq(struct platform_device * pdev,u32 dcdcfreq)944 static int axp20x_set_dcdc_freq(struct platform_device *pdev, u32 dcdcfreq)
945 {
946 struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent);
947 unsigned int reg = AXP20X_DCDC_FREQ;
948 u32 min, max, def, step;
949
950 switch (axp20x->variant) {
951 case AXP202_ID:
952 case AXP209_ID:
953 min = 750;
954 max = 1875;
955 def = 1500;
956 step = 75;
957 break;
958 case AXP806_ID:
959 /*
960 * AXP806 DCDC work frequency setting has the same range and
961 * step as AXP22X, but at a different register.
962 * Fall through to the check below.
963 * (See include/linux/mfd/axp20x.h)
964 */
965 reg = AXP806_DCDC_FREQ_CTRL;
966 case AXP221_ID:
967 case AXP223_ID:
968 case AXP809_ID:
969 min = 1800;
970 max = 4050;
971 def = 3000;
972 step = 150;
973 break;
974 default:
975 dev_err(&pdev->dev,
976 "Setting DCDC frequency for unsupported AXP variant\n");
977 return -EINVAL;
978 }
979
980 if (dcdcfreq == 0)
981 dcdcfreq = def;
982
983 if (dcdcfreq < min) {
984 dcdcfreq = min;
985 dev_warn(&pdev->dev, "DCDC frequency too low. Set to %ukHz\n",
986 min);
987 }
988
989 if (dcdcfreq > max) {
990 dcdcfreq = max;
991 dev_warn(&pdev->dev, "DCDC frequency too high. Set to %ukHz\n",
992 max);
993 }
994
995 dcdcfreq = (dcdcfreq - min) / step;
996
997 return regmap_update_bits(axp20x->regmap, reg,
998 AXP20X_FREQ_DCDC_MASK, dcdcfreq);
999 }
1000
axp20x_regulator_parse_dt(struct platform_device * pdev)1001 static int axp20x_regulator_parse_dt(struct platform_device *pdev)
1002 {
1003 struct device_node *np, *regulators;
1004 int ret;
1005 u32 dcdcfreq = 0;
1006
1007 np = of_node_get(pdev->dev.parent->of_node);
1008 if (!np)
1009 return 0;
1010
1011 regulators = of_get_child_by_name(np, "regulators");
1012 if (!regulators) {
1013 dev_warn(&pdev->dev, "regulators node not found\n");
1014 } else {
1015 of_property_read_u32(regulators, "x-powers,dcdc-freq", &dcdcfreq);
1016 ret = axp20x_set_dcdc_freq(pdev, dcdcfreq);
1017 if (ret < 0) {
1018 dev_err(&pdev->dev, "Error setting dcdc frequency: %d\n", ret);
1019 return ret;
1020 }
1021
1022 of_node_put(regulators);
1023 }
1024
1025 return 0;
1026 }
1027
axp20x_set_dcdc_workmode(struct regulator_dev * rdev,int id,u32 workmode)1028 static int axp20x_set_dcdc_workmode(struct regulator_dev *rdev, int id, u32 workmode)
1029 {
1030 struct axp20x_dev *axp20x = rdev_get_drvdata(rdev);
1031 unsigned int reg = AXP20X_DCDC_MODE;
1032 unsigned int mask;
1033
1034 switch (axp20x->variant) {
1035 case AXP202_ID:
1036 case AXP209_ID:
1037 if ((id != AXP20X_DCDC2) && (id != AXP20X_DCDC3))
1038 return -EINVAL;
1039
1040 mask = AXP20X_WORKMODE_DCDC2_MASK;
1041 if (id == AXP20X_DCDC3)
1042 mask = AXP20X_WORKMODE_DCDC3_MASK;
1043
1044 workmode <<= ffs(mask) - 1;
1045 break;
1046
1047 case AXP806_ID:
1048 reg = AXP806_DCDC_MODE_CTRL2;
1049 /*
1050 * AXP806 DCDC regulator IDs have the same range as AXP22X.
1051 * Fall through to the check below.
1052 * (See include/linux/mfd/axp20x.h)
1053 */
1054 case AXP221_ID:
1055 case AXP223_ID:
1056 case AXP809_ID:
1057 if (id < AXP22X_DCDC1 || id > AXP22X_DCDC5)
1058 return -EINVAL;
1059
1060 mask = AXP22X_WORKMODE_DCDCX_MASK(id - AXP22X_DCDC1);
1061 workmode <<= id - AXP22X_DCDC1;
1062 break;
1063
1064 default:
1065 /* should not happen */
1066 WARN_ON(1);
1067 return -EINVAL;
1068 }
1069
1070 return regmap_update_bits(rdev->regmap, reg, mask, workmode);
1071 }
1072
1073 /*
1074 * This function checks whether a regulator is part of a poly-phase
1075 * output setup based on the registers settings. Returns true if it is.
1076 */
axp20x_is_polyphase_slave(struct axp20x_dev * axp20x,int id)1077 static bool axp20x_is_polyphase_slave(struct axp20x_dev *axp20x, int id)
1078 {
1079 u32 reg = 0;
1080
1081 /* Only AXP806 has poly-phase outputs */
1082 if (axp20x->variant != AXP806_ID)
1083 return false;
1084
1085 regmap_read(axp20x->regmap, AXP806_DCDC_MODE_CTRL2, ®);
1086
1087 switch (id) {
1088 case AXP806_DCDCB:
1089 return (((reg & GENMASK(7, 6)) == BIT(6)) ||
1090 ((reg & GENMASK(7, 6)) == BIT(7)));
1091 case AXP806_DCDCC:
1092 return ((reg & GENMASK(7, 6)) == BIT(7));
1093 case AXP806_DCDCE:
1094 return !!(reg & BIT(5));
1095 }
1096
1097 return false;
1098 }
1099
axp2101_regulator_probe(struct platform_device * pdev)1100 static int axp2101_regulator_probe(struct platform_device *pdev)
1101 {
1102 struct regulator_dev *rdev;
1103 struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent);
1104 const struct regulator_desc *regulators;
1105 struct regulator_config config = {
1106 .dev = pdev->dev.parent,
1107 .regmap = axp20x->regmap,
1108 .driver_data = axp20x,
1109 };
1110 int ret, i, nregulators;
1111 u32 reg;
1112 u32 workmode;
1113 const char *dcdc1_name = axp22x_regulators[AXP22X_DCDC1].name;
1114 const char *dcdc5_name = axp22x_regulators[AXP22X_DCDC5].name;
1115 bool drivevbus = false;
1116 u32 dval;
1117 struct regulator_delay *rdev_delay;
1118
1119 switch (axp20x->variant) {
1120 case AXP152_ID:
1121 regulators = axp152_regulators;
1122 nregulators = AXP152_REG_ID_MAX;
1123 break;
1124 case AXP202_ID:
1125 case AXP209_ID:
1126 regulators = axp20x_regulators;
1127 nregulators = AXP20X_REG_ID_MAX;
1128 break;
1129 case AXP221_ID:
1130 case AXP223_ID:
1131 regulators = axp22x_regulators;
1132 nregulators = AXP22X_REG_ID_MAX;
1133 drivevbus = of_property_read_bool(pdev->dev.parent->of_node,
1134 "x-powers,drive-vbus-en");
1135 break;
1136 case AXP806_ID:
1137 regulators = axp806_regulators;
1138 nregulators = AXP806_REG_ID_MAX;
1139 break;
1140 case AXP809_ID:
1141 regulators = axp809_regulators;
1142 nregulators = AXP809_REG_ID_MAX;
1143 break;
1144 case AXP2101_ID:
1145 regulators = axp2101_regulators;
1146 nregulators = AXP2101_REG_ID_MAX;
1147 break;
1148 case AXP15_ID:
1149 regulators = axp15_regulators;
1150 nregulators = AXP15_REG_ID_MAX;
1151 break;
1152 case AXP1530_ID:
1153 regulators = axp1530_regulators;
1154 nregulators = AXP1530_REG_ID_MAX;
1155 break;
1156 case AXP858_ID:
1157 regulators = axp858_regulators;
1158 nregulators = AXP858_REG_ID_MAX;
1159 break;
1160 case AXP803_ID:
1161 regulators = axp803_regulators;
1162 nregulators = AXP803_REG_ID_MAX;
1163 drivevbus = of_property_read_bool(pdev->dev.parent->of_node,
1164 "x-powers,drive-vbus-en");
1165 break;
1166 case AXP2202_ID:
1167 regulators = axp2202_regulators;
1168 nregulators = AXP2202_REG_ID_MAX;
1169 drivevbus = of_property_read_bool(pdev->dev.parent->of_node,
1170 "x-powers,drive-vbus-en");
1171 break;
1172 default:
1173 dev_err(&pdev->dev, "Unsupported AXP variant: %ld\n",
1174 axp20x->variant);
1175 return -EINVAL;
1176 }
1177
1178 /* This only sets the dcdc freq. Ignore any errors */
1179 axp20x_regulator_parse_dt(pdev);
1180
1181 for (i = 0; i < nregulators; i++) {
1182 const struct regulator_desc *desc = ®ulators[i];
1183 struct regulator_desc *new_desc;
1184
1185 /*
1186 * If this regulator is a slave in a poly-phase setup,
1187 * skip it, as its controls are bound to the master
1188 * regulator and won't work.
1189 */
1190 if (axp20x_is_polyphase_slave(axp20x, i))
1191 continue;
1192
1193 /*
1194 * Regulators DC1SW and DC5LDO are connected internally,
1195 * so we have to handle their supply names separately.
1196 *
1197 * We always register the regulators in proper sequence,
1198 * so the supply names are correctly read. See the last
1199 * part of this loop to see where we save the DT defined
1200 * name.
1201 */
1202 if ((regulators == axp22x_regulators && i == AXP22X_DC1SW) ||
1203 (regulators == axp809_regulators && i == AXP809_DC1SW)) {
1204 new_desc = devm_kzalloc(&pdev->dev, sizeof(*desc),
1205 GFP_KERNEL);
1206 *new_desc = regulators[i];
1207 new_desc->supply_name = dcdc1_name;
1208 desc = new_desc;
1209 }
1210
1211 if ((regulators == axp22x_regulators && i == AXP22X_DC5LDO) ||
1212 (regulators == axp809_regulators && i == AXP809_DC5LDO)) {
1213 new_desc = devm_kzalloc(&pdev->dev, sizeof(*desc),
1214 GFP_KERNEL);
1215 *new_desc = regulators[i];
1216 new_desc->supply_name = dcdc5_name;
1217 desc = new_desc;
1218 }
1219
1220 rdev = devm_regulator_register(&pdev->dev, desc, &config);
1221 if (IS_ERR(rdev)) {
1222 dev_err(&pdev->dev, "Failed to register %s\n",
1223 regulators[i].name);
1224
1225 return PTR_ERR(rdev);
1226 }
1227
1228 rdev_delay = devm_kzalloc(&pdev->dev, sizeof(*rdev_delay), GFP_KERNEL);
1229 if (!of_property_read_u32(rdev->dev.of_node,
1230 "regulator-step-delay-us", &dval))
1231 rdev_delay->step = dval;
1232 else
1233 rdev_delay->step = 0;
1234
1235 if (!of_property_read_u32(rdev->dev.of_node,
1236 "regulator-final-delay-us", &dval))
1237 rdev_delay->final = dval;
1238 else
1239 rdev_delay->final = 0;
1240
1241 rdev->reg_data = rdev_delay;
1242
1243 ret = of_property_read_u32(rdev->dev.of_node,
1244 "x-powers,dcdc-workmode",
1245 &workmode);
1246 if (!ret) {
1247 if (axp20x_set_dcdc_workmode(rdev, i, workmode))
1248 dev_err(&pdev->dev, "Failed to set workmode on %s\n",
1249 rdev->desc->name);
1250 }
1251
1252 /*
1253 * Save AXP22X DCDC1 / DCDC5 regulator names for later.
1254 */
1255 if ((regulators == axp22x_regulators && i == AXP22X_DCDC1) ||
1256 (regulators == axp809_regulators && i == AXP809_DCDC1))
1257 of_property_read_string(rdev->dev.of_node,
1258 "regulator-name",
1259 &dcdc1_name);
1260
1261 if ((regulators == axp22x_regulators && i == AXP22X_DCDC5) ||
1262 (regulators == axp809_regulators && i == AXP809_DCDC5))
1263 of_property_read_string(rdev->dev.of_node,
1264 "regulator-name",
1265 &dcdc5_name);
1266 }
1267
1268 if (drivevbus) {
1269 switch (axp20x->variant) {
1270 case AXP221_ID:
1271 case AXP223_ID:
1272 /* Change N_VBUSEN sense pin to DRIVEVBUS output pin */
1273 regmap_update_bits(axp20x->regmap, AXP20X_OVER_TMP,
1274 AXP22X_MISC_N_VBUSEN_FUNC, 0);
1275 rdev = devm_regulator_register(&pdev->dev,
1276 &axp22x_drivevbus_regulator,
1277 &config);
1278 break;
1279 case AXP803_ID:
1280 /* Change N_VBUSEN sense pin to DRIVEVBUS output pin */
1281 regmap_update_bits(axp20x->regmap, AXP803_HOTOVER_CTL,
1282 AXP803_MISC_N_VBUSEN_FUNC, 0);
1283 rdev = devm_regulator_register(&pdev->dev,
1284 &axp803_drivevbus_regulator,
1285 &config);
1286 break;
1287 case AXP2202_ID:
1288 regmap_read(axp20x->regmap, AXP2202_VBUS_TYPE, ®);
1289 if (!reg) {
1290 rdev = devm_regulator_register(&pdev->dev,
1291 &axp2202_c_vmid_regulator,
1292 &config);
1293
1294 rdev = devm_regulator_register(&pdev->dev,
1295 &axp2202_c_drivevbus_regulator,
1296 &config);
1297 } else {
1298 /* except version c, use real vmid regulator */
1299 rdev = devm_regulator_register(&pdev->dev,
1300 &axp2202_vmid_regulator,
1301 &config);
1302
1303 rdev = devm_regulator_register(&pdev->dev,
1304 &axp2202_drivevbus_regulator,
1305 &config);
1306 }
1307 break;
1308 default:
1309 dev_err(&pdev->dev, "AXP variant: %ld unsupported drivevbus\n",
1310 axp20x->variant);
1311 return -EINVAL;
1312 }
1313
1314 if (IS_ERR(rdev)) {
1315 dev_err(&pdev->dev, "Failed to register drivevbus\n");
1316 return PTR_ERR(rdev);
1317 }
1318 }
1319
1320 return 0;
1321 }
1322
axp2101_regulator_remove(struct platform_device * pdev)1323 static int axp2101_regulator_remove(struct platform_device *pdev)
1324 {
1325 return 0;
1326 }
1327
1328 static struct of_device_id axp_regulator_id_tab[] = {
1329 { .compatible = "x-powers,axp2202-regulator" },
1330 { /* sentinel */ },
1331 };
1332
1333 static struct platform_driver axp2101_regulator_driver = {
1334 .probe = axp2101_regulator_probe,
1335 .remove = axp2101_regulator_remove,
1336 .driver = {
1337 .of_match_table = axp_regulator_id_tab,
1338 .name = "axp2101-regulator",
1339 },
1340 };
1341
axp2101_regulator_init(void)1342 static int __init axp2101_regulator_init(void)
1343 {
1344 return platform_driver_register(&axp2101_regulator_driver);
1345 }
1346
axp2101_regulator_exit(void)1347 static void __exit axp2101_regulator_exit(void)
1348 {
1349 platform_driver_unregister(&axp2101_regulator_driver);
1350 }
1351
1352 subsys_initcall(axp2101_regulator_init);
1353 module_exit(axp2101_regulator_exit);
1354
1355 MODULE_LICENSE("GPL v2");
1356 MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");
1357 MODULE_DESCRIPTION("Regulator Driver for AXP20X PMIC");
1358 MODULE_ALIAS("platform:axp20x-regulator");
1359