1 /* 2 * linux-5.4/drivers/media/platform/sunxi-vin/vin-tdm/tdm_reg.h 3 * 4 * Copyright (c) 2007-2019Allwinnertech Co., Ltd. 5 * 6 * Authors: Zheng Zequn <zequnzheng@allwinnertech.com> 7 * 8 * This software is licensed under the terms of the GNU General Public 9 * License version 2, as published by the Free Software Foundation, and 10 * may be copied, distributed, and modified under those terms. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 */ 18 19 #ifndef __CSIC__TDM__REG__H__ 20 #define __CSIC__TDM__REG__H__ 21 22 #include <media/sunxi_camera_v2.h> 23 #include <linux/types.h> 24 #include <media/v4l2-mediabus.h> 25 #include "tdm_reg_i.h" 26 27 #define TDM_RX_NUM 2 28 29 enum tdm_int_sel { 30 RX_FRM_LOST_INT_EN = 0X1, 31 RX_FRM_ERR_INT_EN = 0X2, 32 RX_BTYPE_ERR_INT_EN = 0X4, 33 RX_BUF_FULL_INT_EN = 0X8, 34 RX_COMP_ERR_INT_EN = 0X10, 35 RX_HB_SHORT_INT_EN = 0X20, 36 RX_FIFO_FULL_INT_EN = 0X40, 37 RX0_FRM_DONE_INT_EN = 0X10000, 38 RX1_TDM_DINE_INT_EN = 0X20000, 39 TDM_INT_ALL = 0X307F, 40 }; 41 42 enum min_ddr_size_sel { 43 DDRSIZE_256b = 0, 44 DDRSIZE_512b, 45 DDRSIZE_1024b, 46 DDRSIZE_2048b, 47 }; 48 49 enum input_image_type_sel { 50 INPUTTPYE_8BIT = 0, 51 INPUTTPYE_10BIT, 52 INPUTTPYE_12BIT, 53 }; 54 55 struct tdm_int_status { 56 bool rx_frm_lost; 57 bool rx_frm_err; 58 bool rx_btype_err; 59 bool rx_buf_full; 60 bool rx_comp_err; 61 bool rx_hb_short; 62 bool rx_fifo_full; 63 bool rx0_frm_done; 64 bool rx1_frm_done; 65 }; 66 67 int csic_tdm_set_base_addr(unsigned int sel, unsigned long addr); 68 void csic_tdm_top_enable(unsigned int sel); 69 void csic_tdm_top_disable(unsigned int sel); 70 void csic_tdm_enable(unsigned int sel); 71 void csic_tdm_disable(unsigned int sel); 72 void csic_tdm_fifo_max_layer_en(unsigned int sel, unsigned int en); 73 void csic_tdm_int_enable(unsigned int sel, enum tdm_int_sel interrupt); 74 void csic_tdm_int_disable(unsigned int sel, enum tdm_int_sel interrupt); 75 void csic_tdm_int_get_status(unsigned int sel, struct tdm_int_status *status); 76 void csic_tdm_int_clear_status(unsigned int sel, enum tdm_int_sel interrupt); 77 unsigned int csic_tdm_internal_get_status0(unsigned int sel, unsigned int status); 78 void csic_tdm_internal_clear_status0(unsigned int sel, unsigned int status); 79 unsigned int csic_tdm_internal_get_status1(unsigned int sel, unsigned int status); 80 void csic_tdm_internal_clear_status1(unsigned int sel, unsigned int status); 81 82 void csic_tdm_tx_cap_enable(unsigned int sel); 83 void csic_tdm_tx_cap_disable(unsigned int sel); 84 void csic_tdm_omode(unsigned int sel, unsigned int mode); 85 void csic_tdm_set_hblank(unsigned int sel, unsigned int hblank); 86 void csic_tdm_set_bblank_fe(unsigned int sel, unsigned int bblank_fe); 87 void csic_tdm_set_bblank_be(unsigned int sel, unsigned int bblank_be); 88 89 void csic_tdm_rx_enable(unsigned int sel, unsigned int ch); 90 void csic_tdm_rx_disable(unsigned int sel, unsigned int ch); 91 void csic_tdm_rx_cap_enable(unsigned int sel, unsigned int ch); 92 void csic_tdm_rx_cap_disable(unsigned int sel, unsigned int ch); 93 void csic_tdm_rx_set_buf_num(unsigned int sel, unsigned int ch, unsigned int num); 94 void csic_tdm_rx_ch0_en(unsigned int sel, unsigned int ch, unsigned int en); 95 void csic_tdm_rx_set_min_ddr_size(unsigned int sel, unsigned int ch, enum min_ddr_size_sel ddr_size); 96 void csic_tdm_rx_input_bit(unsigned int sel, unsigned int ch, enum input_image_type_sel input_tpye); 97 void csic_tdm_rx_input_size(unsigned int sel, unsigned int ch, unsigned int width, unsigned int height); 98 void csic_tdm_rx_set_address(unsigned int sel, unsigned int ch, unsigned long address); 99 void csic_tdm_rx_get_size(unsigned int sel, unsigned int ch, unsigned int *width, unsigned int *heigth); 100 void csic_tdm_rx_get_hblank(unsigned int sel, unsigned int ch, unsigned int *hb_min, unsigned int *hb_max); 101 102 #endif /* __CSIC__TDM__REG__H__ */ 103