1 /****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2017 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * The full GNU General Public License is included in this distribution in the 15 * file called LICENSE. 16 * 17 * Contact Information: 18 * wlanfae <wlanfae@realtek.com> 19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, 20 * Hsinchu 300, Taiwan. 21 * 22 * Larry Finger <Larry.Finger@lwfinger.net> 23 * 24 *****************************************************************************/ 25 26 #ifndef __HALRF_H__ 27 #define __HALRF_H__ 28 29 /*@============================================================*/ 30 /*@include files*/ 31 /*@============================================================*/ 32 #include "halrf/halrf_psd.h" 33 #if (RTL8822B_SUPPORT == 1) 34 #include "halrf/rtl8822b/halrf_rfk_init_8822b.h" 35 #endif 36 #if (RTL8822C_SUPPORT == 1) 37 #include "halrf/rtl8822c/halrf_rfk_init_8822c.h" 38 #include "halrf/rtl8822c/halrf_iqk_8822c.h" 39 #include "halrf/rtl8822c/halrf_tssi_8822c.h" 40 #include "halrf/rtl8822c/halrf_dpk_8822c.h" 41 #include "halrf/rtl8822c/halrf_txgapk_8822c.h" 42 #endif 43 44 #if (DM_ODM_SUPPORT_TYPE & ODM_AP) 45 #if (RTL8197G_SUPPORT == 1) 46 #include "halrf/rtl8197g/halrf_rfk_init_8197g.h" 47 #endif 48 #if (RTL8198F_SUPPORT == 1) 49 #include "halrf/rtl8198f/halrf_rfk_init_8198f.h" 50 #endif 51 #if (RTL8812F_SUPPORT == 1) 52 #include "halrf/rtl8812f/halrf_rfk_init_8812f.h" 53 #endif 54 55 #endif 56 57 #if (RTL8814B_SUPPORT == 1) 58 #include "halrf/rtl8814b/halrf_rfk_init_8814b.h" 59 #include "halrf/rtl8814b/halrf_iqk_8814b.h" 60 #include "halrf/rtl8814b/halrf_dpk_8814b.h" 61 #include "halrf/rtl8814b/halrf_txgapk_8814b.h" 62 #endif 63 64 #if (RTL8814C_SUPPORT == 1) 65 #include "halrf/rtl8814c/halrf_rfk_init_8814c.h" 66 #include "halrf/rtl8814c/halrf_iqk_8814c.h" 67 #include "halrf/rtl8814c/halrf_dpk_8814c.h" 68 #include "halrf/rtl8814c/halrf_txgapk_8814c.h" 69 #endif 70 71 72 /*@============================================================*/ 73 /*@Definition */ 74 /*@============================================================*/ 75 /*IQK version*/ 76 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) 77 #define IQK_VER_8188E "0x14" 78 #define IQK_VER_8192E "0x01" 79 #define IQK_VER_8192F "0x01" 80 #define IQK_VER_8723B "0x1e" 81 #define IQK_VER_8812A "0x02" 82 #define IQK_VER_8821A "0x02" 83 #elif (DM_ODM_SUPPORT_TYPE & (ODM_CE)) 84 #define IQK_VER_8188E "0x01" 85 #define IQK_VER_8192E "0x01" 86 #define IQK_VER_8192F "0x01" 87 #define IQK_VER_8723B "0x1f" 88 #define IQK_VER_8812A "0x01" 89 #define IQK_VER_8821A "0x01" 90 #elif (DM_ODM_SUPPORT_TYPE & (ODM_AP)) 91 #define IQK_VER_8188E "0x01" 92 #define IQK_VER_8192E "0x01" 93 #define IQK_VER_8192F "0x01" 94 #define IQK_VER_8723B "0x1e" 95 #define IQK_VER_8812A "0x01" 96 #define IQK_VER_8821A "0x01" 97 #elif (DM_ODM_SUPPORT_TYPE & (ODM_IOT)) 98 #define IQK_VER_8188E "0x01" 99 #define IQK_VER_8192E "0x01" 100 #define IQK_VER_8192F "0x01" 101 #define IQK_VER_8723B "0x1e" 102 #define IQK_VER_8812A "0x01" 103 #define IQK_VER_8821A "0x01" 104 #endif 105 #define IQK_VER_8814A "0x0f" 106 #define IQK_VER_8188F "0x01" 107 #define IQK_VER_8197F "0x1d" 108 #define IQK_VER_8703B "0x05" 109 #define IQK_VER_8710B "0x01" 110 #define IQK_VER_8723D "0x02" 111 #define IQK_VER_8822B "0x32" 112 #define IQK_VER_8822C "0x14" 113 #define IQK_VER_8821C "0x23" 114 #define IQK_VER_8198F "0x0b" 115 #define IQK_VER_8814B "0x15" 116 #define IQK_VER_8812F "0x0c" 117 #define IQK_VER_8710C "0x0a" 118 #define IQK_VER_8197G "0x03" 119 #define IQK_VER_8723F "0x00" 120 #define IQK_VER_8814C "0x00" 121 122 /*LCK version*/ 123 #define LCK_VER_8188E "0x02" 124 #define LCK_VER_8192E "0x02" 125 #define LCK_VER_8192F "0x01" 126 #define LCK_VER_8723B "0x02" 127 #define LCK_VER_8812A "0x01" 128 #define LCK_VER_8821A "0x01" 129 #define LCK_VER_8814A "0x01" 130 #define LCK_VER_8188F "0x01" 131 #define LCK_VER_8197F "0x01" 132 #define LCK_VER_8703B "0x01" 133 #define LCK_VER_8710B "0x01" 134 #define LCK_VER_8723D "0x01" 135 #define LCK_VER_8822B "0x02" 136 #define LCK_VER_8822C "0x00" 137 #define LCK_VER_8821C "0x03" 138 #define LCK_VER_8814B "0x02" 139 #define LCK_VER_8195B "0x02" 140 #define LCK_VER_8710C "0x02" 141 #define LCK_VER_8197G "0x01" 142 #define LCK_VER_8198F "0x01" 143 #define LCK_VER_8814C "0x00" 144 145 /*power tracking version*/ 146 #define PWRTRK_VER_8188E "0x01" 147 #define PWRTRK_VER_8192E "0x01" 148 #define PWRTRK_VER_8192F "0x01" 149 #define PWRTRK_VER_8723B "0x01" 150 #define PWRTRK_VER_8812A "0x01" 151 #define PWRTRK_VER_8821A "0x01" 152 #define PWRTRK_VER_8814A "0x01" 153 #define PWRTRK_VER_8188F "0x01" 154 #define PWRTRK_VER_8197F "0x01" 155 #define PWRTRK_VER_8703B "0x01" 156 #define PWRTRK_VER_8710B "0x01" 157 #define PWRTRK_VER_8723D "0x01" 158 #define PWRTRK_VER_8822B "0x01" 159 #define PWRTRK_VER_8822C "0x00" 160 #define PWRTRK_VER_8821C "0x01" 161 #define PWRTRK_VER_8814B "0x00" 162 #define PWRTRK_VER_8197G "0x00" 163 #define PWRTRK_VER_8814C "0x00" 164 165 /*DPK version*/ 166 #define DPK_VER_8188E "NONE" 167 #define DPK_VER_8192E "NONE" 168 #define DPK_VER_8723B "NONE" 169 #define DPK_VER_8812A "NONE" 170 #define DPK_VER_8821A "NONE" 171 #define DPK_VER_8814A "NONE" 172 #define DPK_VER_8188F "NONE" 173 #define DPK_VER_8197F "0x08" 174 #define DPK_VER_8703B "NONE" 175 #define DPK_VER_8710B "NONE" 176 #define DPK_VER_8723D "NONE" 177 #define DPK_VER_8822B "NONE" 178 #define DPK_VER_8822C "0x20" 179 #define DPK_VER_8821C "NONE" 180 #define DPK_VER_8192F "0x13" 181 #define DPK_VER_8198F "0x0e" 182 #define DPK_VER_8814B "0x0f" 183 #define DPK_VER_8195B "0x0c" 184 #define DPK_VER_8812F "0x0a" 185 #define DPK_VER_8197G "0x09" 186 #define DPK_VER_8814C "0x01" 187 188 /*RFK_INIT version*/ 189 #define RFK_INIT_VER_8822B "0x8" 190 #define RFK_INIT_VER_8822C "0x8" 191 #define RFK_INIT_VER_8195B "0x1" 192 #define RFK_INIT_VER_8198F "0x8" 193 #define RFK_INIT_VER_8814B "0xa" 194 #define RFK_INIT_VER_8812F "0x4" 195 #define RFK_INIT_VER_8197G "0x4" 196 #define RFK_INIT_VER_8814C "0x0" 197 198 /*DACK version*/ 199 #define DACK_VER_8822C "0xa" 200 #define DACK_VER_8814B "0x4" 201 #define DACK_VER_8814C "0x0" 202 203 /*TXGAPK version*/ 204 #define TXGAPK_VER_8814B "0x1" 205 #define TXGAPK_VER_8195B "0x2" 206 207 /*Kfree tracking version*/ 208 #define KFREE_VER_8188E \ 209 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 210 #define KFREE_VER_8192E \ 211 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 212 #define KFREE_VER_8192F \ 213 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 214 #define KFREE_VER_8723B \ 215 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 216 #define KFREE_VER_8812A \ 217 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 218 #define KFREE_VER_8821A \ 219 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 220 #define KFREE_VER_8814A \ 221 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 222 #define KFREE_VER_8188F \ 223 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 224 #define KFREE_VER_8197F \ 225 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 226 #define KFREE_VER_8703B \ 227 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 228 #define KFREE_VER_8710B \ 229 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 230 #define KFREE_VER_8723D \ 231 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 232 #define KFREE_VER_8822B \ 233 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 234 #define KFREE_VER_8822C \ 235 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 236 #define KFREE_VER_8821C \ 237 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 238 #define KFREE_VER_8814B \ 239 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 240 #define KFREE_VER_8197G \ 241 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 242 243 #define TSSI_VER_8812F "0x1" 244 #define TSSI_VER_8822C "0x1" 245 #define TSSI_VER_8821C "0x1" 246 #define TSSI_VER_8814B "0x1" 247 #define TSSI_VER_8197G "0x1" 248 #define TSSI_VER_8723F "0x1" 249 250 /*PA Bias Calibration version*/ 251 #define PABIASK_VER_8188E \ 252 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 253 #define PABIASK_VER_8192E \ 254 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 255 #define PABIASK_VER_8192F \ 256 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 257 #define PABIASK_VER_8723B \ 258 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 259 #define PABIASK_VER_8812A \ 260 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 261 #define PABIASK_VER_8821A \ 262 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 263 #define PABIASK_VER_8814A \ 264 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 265 #define PABIASK_VER_8188F \ 266 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 267 #define PABIASK_VER_8197F \ 268 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 269 #define PABIASK_VER_8703B \ 270 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 271 #define PABIASK_VER_8710B \ 272 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 273 #define PABIASK_VER_8723D \ 274 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 275 #define PABIASK_VER_8822B \ 276 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 277 #define PABIASK_VER_8822C \ 278 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 279 #define PABIASK_VER_8821C \ 280 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 281 #define PABIASK_VER_8814B \ 282 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 283 #define PABIASK_VER_8197G \ 284 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 285 286 #define HALRF_IQK_VER \ 287 (dm->support_ic_type == ODM_RTL8188E) ? IQK_VER_8188E : \ 288 (dm->support_ic_type == ODM_RTL8192E) ? IQK_VER_8192E : \ 289 (dm->support_ic_type == ODM_RTL8192F) ? IQK_VER_8192F : \ 290 (dm->support_ic_type == ODM_RTL8723B) ? IQK_VER_8723B : \ 291 (dm->support_ic_type == ODM_RTL8812) ? IQK_VER_8812A : \ 292 (dm->support_ic_type == ODM_RTL8821) ? IQK_VER_8821A : \ 293 (dm->support_ic_type == ODM_RTL8814A) ? IQK_VER_8814A : \ 294 (dm->support_ic_type == ODM_RTL8188F) ? IQK_VER_8188F : \ 295 (dm->support_ic_type == ODM_RTL8197F) ? IQK_VER_8197F : \ 296 (dm->support_ic_type == ODM_RTL8703B) ? IQK_VER_8703B : \ 297 (dm->support_ic_type == ODM_RTL8710B) ? IQK_VER_8710B : \ 298 (dm->support_ic_type == ODM_RTL8723D) ? IQK_VER_8723D : \ 299 (dm->support_ic_type == ODM_RTL8822B) ? IQK_VER_8822B : \ 300 (dm->support_ic_type == ODM_RTL8822C) ? IQK_VER_8822C : \ 301 (dm->support_ic_type == ODM_RTL8821C) ? IQK_VER_8821C : \ 302 (dm->support_ic_type == ODM_RTL8814B) ? IQK_VER_8814B : \ 303 (dm->support_ic_type == ODM_RTL8710C) ? IQK_VER_8710C : \ 304 (dm->support_ic_type == ODM_RTL8723F) ? IQK_VER_8723F : \ 305 (dm->support_ic_type == ODM_RTL8197G) ? IQK_VER_8197G : "unknown" 306 307 #define HALRF_LCK_VER \ 308 (dm->support_ic_type == ODM_RTL8188E) ? LCK_VER_8188E : \ 309 (dm->support_ic_type == ODM_RTL8192E) ? LCK_VER_8192E : \ 310 (dm->support_ic_type == ODM_RTL8192F) ? LCK_VER_8192F : \ 311 (dm->support_ic_type == ODM_RTL8723B) ? LCK_VER_8723B : \ 312 (dm->support_ic_type == ODM_RTL8812) ? LCK_VER_8812A : \ 313 (dm->support_ic_type == ODM_RTL8821) ? LCK_VER_8821A : \ 314 (dm->support_ic_type == ODM_RTL8814A) ? LCK_VER_8814A : \ 315 (dm->support_ic_type == ODM_RTL8188F) ? LCK_VER_8188F : \ 316 (dm->support_ic_type == ODM_RTL8197F) ? LCK_VER_8197F : \ 317 (dm->support_ic_type == ODM_RTL8703B) ? LCK_VER_8703B : \ 318 (dm->support_ic_type == ODM_RTL8710B) ? LCK_VER_8710B : \ 319 (dm->support_ic_type == ODM_RTL8723D) ? LCK_VER_8723D : \ 320 (dm->support_ic_type == ODM_RTL8822B) ? LCK_VER_8822B : \ 321 (dm->support_ic_type == ODM_RTL8822C) ? LCK_VER_8822C : \ 322 (dm->support_ic_type == ODM_RTL8821C) ? LCK_VER_8821C : \ 323 (dm->support_ic_type == ODM_RTL8814B) ? LCK_VER_8814B : \ 324 (dm->support_ic_type == ODM_RTL8710C) ? LCK_VER_8710C : \ 325 (dm->support_ic_type == ODM_RTL8710C) ? LCK_VER_8710C : "unknown" 326 #define HALRF_POWRTRACKING_VER \ 327 (dm->support_ic_type == ODM_RTL8188E) ? PWRTRK_VER_8188E : \ 328 (dm->support_ic_type == ODM_RTL8192E) ? PWRTRK_VER_8192E : \ 329 (dm->support_ic_type == ODM_RTL8192F) ? PWRTRK_VER_8192F : \ 330 (dm->support_ic_type == ODM_RTL8723B) ? PWRTRK_VER_8723B : \ 331 (dm->support_ic_type == ODM_RTL8812) ? PWRTRK_VER_8812A : \ 332 (dm->support_ic_type == ODM_RTL8821) ? PWRTRK_VER_8821A : \ 333 (dm->support_ic_type == ODM_RTL8814A) ? PWRTRK_VER_8814A : \ 334 (dm->support_ic_type == ODM_RTL8188F) ? PWRTRK_VER_8188F : \ 335 (dm->support_ic_type == ODM_RTL8197F) ? PWRTRK_VER_8197F : \ 336 (dm->support_ic_type == ODM_RTL8703B) ? PWRTRK_VER_8703B : \ 337 (dm->support_ic_type == ODM_RTL8710B) ? PWRTRK_VER_8710B : \ 338 (dm->support_ic_type == ODM_RTL8723D) ? PWRTRK_VER_8723D : \ 339 (dm->support_ic_type == ODM_RTL8822B) ? PWRTRK_VER_8822B : \ 340 (dm->support_ic_type == ODM_RTL8822C) ? PWRTRK_VER_8822C : \ 341 (dm->support_ic_type == ODM_RTL8821C) ? PWRTRK_VER_8821C : \ 342 (dm->support_ic_type == ODM_RTL8197G) ? PWRTRK_VER_8197G : "unknown" 343 344 #define HALRF_DPK_VER \ 345 (dm->support_ic_type == ODM_RTL8188E) ? DPK_VER_8188E : \ 346 (dm->support_ic_type == ODM_RTL8192E) ? DPK_VER_8192E : \ 347 (dm->support_ic_type == ODM_RTL8192F) ? DPK_VER_8192F : \ 348 (dm->support_ic_type == ODM_RTL8723B) ? DPK_VER_8723B : \ 349 (dm->support_ic_type == ODM_RTL8812) ? DPK_VER_8812A : \ 350 (dm->support_ic_type == ODM_RTL8821) ? DPK_VER_8821A : \ 351 (dm->support_ic_type == ODM_RTL8814A) ? DPK_VER_8814A : \ 352 (dm->support_ic_type == ODM_RTL8188F) ? DPK_VER_8188F : \ 353 (dm->support_ic_type == ODM_RTL8197F) ? DPK_VER_8197F : \ 354 (dm->support_ic_type == ODM_RTL8198F) ? DPK_VER_8198F : \ 355 (dm->support_ic_type == ODM_RTL8703B) ? DPK_VER_8703B : \ 356 (dm->support_ic_type == ODM_RTL8710B) ? DPK_VER_8710B : \ 357 (dm->support_ic_type == ODM_RTL8723D) ? DPK_VER_8723D : \ 358 (dm->support_ic_type == ODM_RTL8822B) ? DPK_VER_8822B : \ 359 (dm->support_ic_type == ODM_RTL8822C) ? DPK_VER_8822C : \ 360 (dm->support_ic_type == ODM_RTL8812F) ? DPK_VER_8812F : \ 361 (dm->support_ic_type == ODM_RTL8821C) ? DPK_VER_8821C : \ 362 (dm->support_ic_type == ODM_RTL8814B) ? DPK_VER_8814B : \ 363 (dm->support_ic_type == ODM_RTL8197G) ? DPK_VER_8197G : "unknown" 364 365 #define HALRF_KFREE_VER \ 366 (dm->support_ic_type == ODM_RTL8188E) ? KFREE_VER_8188E : \ 367 (dm->support_ic_type == ODM_RTL8192E) ? KFREE_VER_8192E : \ 368 (dm->support_ic_type == ODM_RTL8192F) ? KFREE_VER_8192F : \ 369 (dm->support_ic_type == ODM_RTL8723B) ? KFREE_VER_8723B : \ 370 (dm->support_ic_type == ODM_RTL8812) ? KFREE_VER_8812A : \ 371 (dm->support_ic_type == ODM_RTL8821) ? KFREE_VER_8821A : \ 372 (dm->support_ic_type == ODM_RTL8814A) ? KFREE_VER_8814A : \ 373 (dm->support_ic_type == ODM_RTL8188F) ? KFREE_VER_8188F : \ 374 (dm->support_ic_type == ODM_RTL8197F) ? KFREE_VER_8197F : \ 375 (dm->support_ic_type == ODM_RTL8703B) ? KFREE_VER_8703B : \ 376 (dm->support_ic_type == ODM_RTL8710B) ? KFREE_VER_8710B : \ 377 (dm->support_ic_type == ODM_RTL8723D) ? KFREE_VER_8723D : \ 378 (dm->support_ic_type == ODM_RTL8822B) ? KFREE_VER_8822B : \ 379 (dm->support_ic_type == ODM_RTL8822C) ? KFREE_VER_8822C : \ 380 (dm->support_ic_type == ODM_RTL8821C) ? KFREE_VER_8821C : \ 381 (dm->support_ic_type == ODM_RTL8814B) ? KFREE_VER_8814B : \ 382 (dm->support_ic_type == ODM_RTL8197G) ? KFREE_VER_8197G : "unknown" 383 384 #define HALRF_TSSI_VER \ 385 (dm->support_ic_type == ODM_RTL8812F) ? TSSI_VER_8812F : \ 386 (dm->support_ic_type == ODM_RTL8822C) ? TSSI_VER_8822C : \ 387 (dm->support_ic_type == ODM_RTL8821C) ? TSSI_VER_8821C : \ 388 (dm->support_ic_type == ODM_RTL8814B) ? TSSI_VER_8814B : \ 389 (dm->support_ic_type == ODM_RTL8197G) ? TSSI_VER_8197G : \ 390 (dm->support_ic_type == ODM_RTL8723F) ? TSSI_VER_8723F : "unknown" 391 392 #define HALRF_PABIASK_VER \ 393 (dm->support_ic_type == ODM_RTL8188E) ? PABIASK_VER_8188E : \ 394 (dm->support_ic_type == ODM_RTL8192E) ? PABIASK_VER_8192E : \ 395 (dm->support_ic_type == ODM_RTL8192F) ? PABIASK_VER_8192F : \ 396 (dm->support_ic_type == ODM_RTL8723B) ? PABIASK_VER_8723B : \ 397 (dm->support_ic_type == ODM_RTL8812) ? PABIASK_VER_8812A : \ 398 (dm->support_ic_type == ODM_RTL8821) ? PABIASK_VER_8821A : \ 399 (dm->support_ic_type == ODM_RTL8814A) ? PABIASK_VER_8814A : \ 400 (dm->support_ic_type == ODM_RTL8188F) ? PABIASK_VER_8188F : \ 401 (dm->support_ic_type == ODM_RTL8197F) ? PABIASK_VER_8197F : \ 402 (dm->support_ic_type == ODM_RTL8703B) ? PABIASK_VER_8703B : \ 403 (dm->support_ic_type == ODM_RTL8710B) ? PABIASK_VER_8710B : \ 404 (dm->support_ic_type == ODM_RTL8723D) ? PABIASK_VER_8723D : \ 405 (dm->support_ic_type == ODM_RTL8822B) ? PABIASK_VER_8822B : \ 406 (dm->support_ic_type == ODM_RTL8822C) ? PABIASK_VER_8822C : \ 407 (dm->support_ic_type == ODM_RTL8821C) ? PABIASK_VER_8821C : \ 408 (dm->support_ic_type == ODM_RTL8814B) ? PABIASK_VER_8814B : \ 409 (dm->support_ic_type == ODM_RTL8197G) ? PABIASK_VER_8197G : "unknown" 410 411 #define HALRF_RFK_INIT_VER \ 412 (dm->support_ic_type == ODM_RTL8822B) ? RFK_INIT_VER_8822B : \ 413 (dm->support_ic_type == ODM_RTL8822C) ? RFK_INIT_VER_8822C : \ 414 (dm->support_ic_type == ODM_RTL8812F) ? RFK_INIT_VER_8812F : \ 415 (dm->support_ic_type == ODM_RTL8198F) ? RFK_INIT_VER_8198F : \ 416 (dm->support_ic_type == ODM_RTL8814B) ? RFK_INIT_VER_8814B : \ 417 (dm->support_ic_type == ODM_RTL8197G) ? RFK_INIT_VER_8197G : "unknown" 418 419 #define HALRF_DACK_VER \ 420 (dm->support_ic_type == ODM_RTL8822C) ? DACK_VER_8822C : \ 421 (dm->support_ic_type == ODM_RTL8814B) ? DACK_VER_8814B : "unknown" 422 423 #define IQK_THRESHOLD 8 424 #define DPK_THRESHOLD 4 425 #define HALRF_ABS(a,b) ((a>b) ? (a-b) : (b-a)) 426 #define SN 100 427 428 #define CCK_TSSI_NUM 6 429 #define OFDM_2G_TSSI_NUM 5 430 #define OFDM_5G_TSSI_NUM 14 431 432 433 434 /*@===========================================================*/ 435 /*AGC RX High Power mode*/ 436 /*@===========================================================*/ 437 #define lna_low_gain_1 0x64 438 #define lna_low_gain_2 0x5A 439 #define lna_low_gain_3 0x58 440 441 /*@============================================================*/ 442 /*@ enumeration */ 443 /*@============================================================*/ 444 445 enum halrf_func_idx { /*F_XXX = PHYDM XXX function*/ 446 RF00_PWR_TRK = 0, /*Pow_trk, TSSI_trk*/ 447 RF01_IQK = 1, /*LOK, IQK*/ 448 RF02_LCK = 2, 449 RF03_DPK = 3, 450 RF04_TXGAPK = 4, 451 RF05_DACK = 5, 452 RF06_DPK_TRK = 6, 453 RF07_2GBAND_SHIFT = 7, 454 RF08_RXDCK = 8, 455 RF09_RFK = 9 456 }; 457 458 enum halrf_ability { 459 HAL_RF_TX_PWR_TRACK = BIT(RF00_PWR_TRK), 460 HAL_RF_IQK = BIT(RF01_IQK), 461 HAL_RF_LCK = BIT(RF02_LCK), 462 HAL_RF_DPK = BIT(RF03_DPK), 463 HAL_RF_TXGAPK = BIT(RF04_TXGAPK), 464 HAL_RF_DACK = BIT(RF05_DACK), 465 HAL_RF_DPK_TRACK = BIT(RF06_DPK_TRK), 466 HAL_2GBAND_SHIFT = BIT(RF07_2GBAND_SHIFT), 467 HAL_RF_RXDCK = BIT(RF08_RXDCK) 468 }; 469 470 enum halrf_shift_band { 471 HAL_RF_2P4 = 0, 472 HAL_RF_2P3 = 1, 473 HAL_RF_2P5 = 2 474 }; 475 476 enum halrf_dbg_comp { 477 DBG_RF_TX_PWR_TRACK = BIT(RF00_PWR_TRK), 478 DBG_RF_IQK = BIT(RF01_IQK), 479 DBG_RF_LCK = BIT(RF02_LCK), 480 DBG_RF_DPK = BIT(RF03_DPK), 481 DBG_RF_TXGAPK = BIT(RF04_TXGAPK), 482 DBG_RF_DACK = BIT(RF05_DACK), 483 DBG_RF_DPK_TRACK = BIT(RF06_DPK_TRK), 484 DBG_RF_RFK = BIT(RF09_RFK), 485 DBG_RF_MP = BIT(29), 486 DBG_RF_TMP = BIT(30), 487 DBG_RF_INIT = BIT(31) 488 }; 489 490 enum halrf_cmninfo_init { 491 HALRF_CMNINFO_ABILITY = 0, 492 HALRF_CMNINFO_DPK_EN = 1, 493 HALRF_CMNINFO_EEPROM_THERMAL_VALUE, 494 HALRF_CMNINFO_RFK_FORBIDDEN, 495 HALRF_CMNINFO_IQK_SEGMENT, 496 HALRF_CMNINFO_RATE_INDEX, 497 HALRF_CMNINFO_PWT_TYPE, 498 HALRF_CMNINFO_MP_PSD_POINT, 499 HALRF_CMNINFO_MP_PSD_START_POINT, 500 HALRF_CMNINFO_MP_PSD_STOP_POINT, 501 HALRF_CMNINFO_MP_PSD_AVERAGE, 502 HALRF_CMNINFO_IQK_TIMES, 503 HALRF_CMNINFO_MP_POWER_TRACKING_TYPE, 504 HALRF_CMNINFO_POWER_TRACK_CONTROL 505 }; 506 507 enum halrf_cmninfo_hook { 508 HALRF_CMNINFO_CON_TX, 509 HALRF_CMNINFO_SINGLE_TONE, 510 HALRF_CMNINFO_CARRIER_SUPPRESSION, 511 HALRF_CMNINFO_MP_RATE_INDEX, 512 HALRF_CMNINFO_MANUAL_RF_SUPPORTABILITY 513 }; 514 515 enum halrf_lna_set { 516 HALRF_LNA_DISABLE = 0, 517 HALRF_LNA_ENABLE = 1, 518 }; 519 520 enum halrf_k_segment_time { 521 SEGMENT_FREE = 0, 522 SEGMENT_10MS = 10, /*10ms*/ 523 SEGMENT_30MS = 30, /*30ms*/ 524 SEGMENT_50MS = 50, /*50ms*/ 525 }; 526 527 #define POWER_INDEX_DIFF 4 528 #define TSSI_TXAGC_DIFF 2 529 530 #define TSSI_CODE_NUM 84 531 532 #define TSSI_SLOPE_2G 8 533 #define TSSI_SLOPE_5G 5 534 535 #define TSSI_EFUSE_NUM 25 536 #define TSSI_EFUSE_KFREE_NUM 4 537 #define TSSI_DE_DIFF_EFUSE_NUM 10 538 539 struct _halrf_tssi_data { 540 s32 cck_offset_patha; 541 s32 cck_offset_pathb; 542 s32 tssi_trk_txagc_offset[PHYDM_MAX_RF_PATH]; 543 s32 delta_tssi_txagc_offset[PHYDM_MAX_RF_PATH]; 544 s16 txagc_codeword[TSSI_CODE_NUM]; 545 u16 tssi_codeword[TSSI_CODE_NUM]; 546 s8 tssi_efuse[PHYDM_MAX_RF_PATH][TSSI_EFUSE_NUM]; 547 s8 tssi_de_diff_efuse[PHYDM_MAX_RF_PATH][TSSI_DE_DIFF_EFUSE_NUM]; 548 s8 tssi_kfree_efuse[PHYDM_MAX_RF_PATH][TSSI_EFUSE_KFREE_NUM]; 549 u8 thermal[PHYDM_MAX_RF_PATH]; 550 u32 index[PHYDM_MAX_RF_PATH][14]; 551 u8 do_tssi; 552 u8 get_thermal; 553 u8 tssi_finish_bit[PHYDM_MAX_RF_PATH]; 554 u8 thermal_trigger; 555 s8 tssi_de; 556 #if (RTL8723F_SUPPORT == 1) 557 s8 txagc_offset_thermaltrack[MAX_PATH_NUM_8723F]; 558 u8 thermal_cal; 559 #endif 560 }; 561 562 struct _halrf_txgapk_info { 563 u32 txgapk_rf3f_bp[5][12][PHYDM_MAX_RF_PATH]; /* band(2Gcck/2GOFDM/5GL/5GM/5GH)/idx/path */ 564 boolean txgapk_bp_done; 565 s8 offset[12][PHYDM_MAX_RF_PATH]; 566 s8 fianl_offset[12][PHYDM_MAX_RF_PATH]; 567 u8 read_txgain; 568 }; 569 570 571 /*@============================================================*/ 572 /*@ structure */ 573 /*@============================================================*/ 574 575 struct _hal_rf_ { 576 /*hook*/ 577 u8 *test1; 578 579 /*update*/ 580 u32 rf_supportability; 581 u8 rf_shift_band; 582 /*u32 halrf_tssi_data;*/ 583 584 u8 eeprom_thermal; 585 u8 dpk_en; /*Enable Function DPK OFF/ON = 0/1*/ 586 boolean dpk_done; 587 u64 dpk_progressing_time; 588 u64 iqk_progressing_time; 589 u32 fw_ver; 590 591 boolean *is_con_tx; 592 boolean *is_single_tone; 593 boolean *is_carrier_suppresion; 594 boolean is_dpk_in_progress; 595 boolean is_tssi_in_progress; 596 boolean is_bt_iqk_timeout; 597 boolean is_rfk_h2c_timeout; 598 boolean aac_checked; 599 boolean is_txgapk_in_progress; 600 601 u8 *mp_rate_index; 602 u32 *manual_rf_supportability; 603 u32 p_rate_index; 604 u8 pwt_type; 605 u32 rf_dbg_comp; 606 u8 rfk_type; 607 u32 gnt_control; 608 609 u8 ext_lna; /*@with 2G external LNA NO/Yes = 0/1*/ 610 u8 ext_lna_5g; /*@with 5G external LNA NO/Yes = 0/1*/ 611 u8 ext_pa; /*@with 2G external PNA NO/Yes = 0/1*/ 612 u8 ext_pa_5g; /*@with 5G external PNA NO/Yes = 0/1*/ 613 #if !(DM_ODM_SUPPORT_TYPE & ODM_IOT) 614 struct _halrf_psd_data halrf_psd_data; 615 struct _halrf_tssi_data halrf_tssi_data; 616 #endif 617 struct _halrf_txgapk_info halrf_txgapk_info; 618 u8 power_track_type; 619 u8 mp_pwt_type; 620 u8 pre_band_type; 621 }; 622 623 /*@============================================================*/ 624 /*@ function prototype */ 625 /*@============================================================*/ 626 627 #if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\ 628 RTL8195B_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\ 629 RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ||\ 630 RTL8812F_SUPPORT == 1 || RTL8710C_SUPPORT == 1 ||\ 631 RTL8197G_SUPPORT == 1) 632 void halrf_iqk_info_dump(void *dm_void, u32 *_used, char *output, 633 u32 *_out_len); 634 635 void halrf_iqk_hwtx_check(void *dm_void, boolean is_check); 636 #endif 637 638 u8 halrf_match_iqk_version(void *dm_void); 639 640 void halrf_support_ability_debug(void *dm_void, char input[][16], u32 *_used, 641 char *output, u32 *_out_len); 642 #ifdef CONFIG_2G_BAND_SHIFT 643 void halrf_support_band_shift_debug(void *dm_void, char input[][16], u32 *_used, 644 char *output, u32 *_out_len); 645 #endif 646 void halrf_cmn_info_init(void *dm_void, enum halrf_cmninfo_init cmn_info, 647 u32 value); 648 649 void halrf_cmn_info_hook(void *dm_void, enum halrf_cmninfo_hook cmn_info, 650 void *value); 651 652 void halrf_cmn_info_set(void *dm_void, u32 cmn_info, u64 value); 653 654 u64 halrf_cmn_info_get(void *dm_void, u32 cmn_info); 655 656 void halrf_watchdog(void *dm_void); 657 658 void halrf_supportability_init(void *dm_void); 659 660 void halrf_init(void *dm_void); 661 662 void halrf_iqk_trigger(void *dm_void, boolean is_recovery); 663 664 void halrf_rfk_handshake(void *dm_void, boolean is_before_k); 665 666 void halrf_rf_k_connect_trigger(void *dm_void, boolean is_recovery, 667 enum halrf_k_segment_time seg_time); 668 669 void halrf_segment_iqk_trigger(void *dm_void, boolean clear, 670 boolean segment_iqk); 671 672 void halrf_lck_trigger(void *dm_void); 673 674 void halrf_iqk_debug(void *dm_void, u32 *const dm_value, u32 *_used, 675 char *output, u32 *_out_len); 676 677 void phydm_get_iqk_cfir(void *dm_void, u8 idx, u8 path, boolean debug); 678 679 void halrf_iqk_xym_read(void *dm_void, u8 path, u8 xym_type); 680 681 void halrf_rf_lna_setting(void *dm_void, enum halrf_lna_set type); 682 683 void halrf_do_imr_test(void *dm_void, u8 data); 684 685 u32 halrf_psd_log2base(u32 val); 686 687 void halrf_dpk_trigger(void *dm_void); 688 689 void halrf_txgapk_trigger(void *dm_void); 690 691 u8 halrf_dpk_result_check(void *dm_void); 692 693 void halrf_dpk_sram_read(void *dm_void); 694 695 void halrf_dpk_enable_disable(void *dm_void); 696 697 void halrf_dpk_track(void *dm_void); 698 699 void halrf_dpk_reload(void *dm_void); 700 701 void halrf_dpk_switch(void *dm_void, u8 enable); 702 703 void halrf_dpk_debug_cmd(void *dm_void, char input[][16], u32 *_used, 704 char *output, u32 *_out_len); 705 706 void halrf_dpk_c2h_report_transfer(void *dm_void, boolean is_ok, u8 *buf, u8 buf_size); 707 708 void halrf_dpk_info_rsvd_page(void *dm_void, u8 *buf, u32 *buf_size); 709 710 /*Global function*/ 711 712 void halrf_reload_bp(void *dm_void, u32 *bp_reg, u32 *bp, u32 num); 713 714 void halrf_reload_bprf(void *dm_void, u32 *bp_reg, u32 bp[][4], u32 num, 715 u8 ss); 716 717 void halrf_bp(void *dm_void, u32 *bp_reg, u32 *bp, u32 num); 718 719 void halrf_bprf(void *dm_void, u32 *bp_reg, u32 bp[][4], u32 num, u8 ss); 720 721 void halrf_mode(void *dm_void, u32 *i_value, u32 *q_value); 722 723 boolean halrf_compare(void *dm_void, u32 value); 724 725 u32 halrf_delta(void *dm_void, u32 v1, u32 v2); 726 727 void halrf_minmax_compare(void *dm_void, u32 value, u32 *min, u32 *max); 728 729 void halrf_b_sort(void *dm_void, u32 *iv, u32 *qv); 730 731 void halrf_bubble(void *dm_void, u32 *v1, u32 *v2); 732 733 void halrf_swap(void *dm_void, u32 *v1, u32 *v2); 734 735 enum hal_status 736 halrf_config_rfk_with_header_file(void *dm_void, u32 config_type); 737 738 #if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\ 739 RTL8195B_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\ 740 RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ||\ 741 RTL8812F_SUPPORT == 1 || RTL8710C_SUPPORT == 1 ||\ 742 RTL8197G_SUPPORT == 1) 743 void halrf_iqk_dbg(void *dm_void); 744 #endif 745 746 void halrf_tssi_get_efuse(void *dm_void); 747 748 void halrf_do_tssi(void *dm_void); 749 750 u8 halrf_do_tssi_by_manual(void *dm_void, u8 path); 751 752 753 void halrf_set_tssi_enable(void *dm_void, boolean enable); 754 755 void halrf_do_thermal(void *dm_void); 756 757 u32 halrf_set_tssi_value(void *dm_void, u32 tssi_value); 758 759 void halrf_set_tssi_power(void *dm_void, s8 power); 760 761 void halrf_tssi_set_de_for_tx_verify(void *dm_void, u32 tssi_de, u8 path); 762 763 u32 halrf_query_tssi_value(void *dm_void); 764 765 void halrf_tssi_cck(void *dm_void); 766 767 void halrf_thermal_cck(void *dm_void); 768 769 void halrf_tssi_set_de(void *dm_void); 770 771 void halrf_tssi_dck(void *dm_void, u8 direct_do); 772 773 void halrf_calculate_tssi_codeword(void *dm_void); 774 775 void halrf_set_tssi_codeword(void *dm_void); 776 777 u8 halrf_get_tssi_codeword_for_txindex(void *dm_void); 778 779 void halrf_tssi_clean_de(void *dm_void); 780 781 u32 halrf_tssi_trigger_de(void *dm_void, u8 path); 782 783 u32 halrf_tssi_get_de(void *dm_void, u8 path); 784 785 u32 halrf_get_online_tssi_de(void *dm_void, u8 path, s32 pout); 786 787 void halrf_tssi_trigger(void *dm_void); 788 789 void halrf_spur_compensation(void *dm_void); 790 791 void halrf_txgapk_write_gain_table(void *dm_void); 792 793 void halrf_txgapk_reload_tx_gain(void *dm_void); 794 795 void halrf_txgap_enable_disable(void *dm_void, u8 enable); 796 797 void halrf_set_dpk_track(void *dm_void, u8 enable); 798 799 void halrf_set_dpkbychannel(void *dm_void, boolean dpk_by_ch); 800 801 void halrf_set_dpkenable(void *dm_void, boolean is_dpk_enable); 802 803 boolean halrf_get_dpkbychannel(void *dm_void); 804 805 boolean halrf_get_dpkenable(void *dm_void); 806 807 void _iqk_check_if_reload(void *dm_void); 808 809 void halrf_do_rxbb_dck(void *dm_void); 810 811 void config_halrf_path_adda_setting_trigger(void *dm_void); 812 813 void halrf_reload_iqk(void *dm_void, boolean reset); 814 815 void halrf_dack_dbg(void *dm_void); 816 817 void halrf_dack_trigger(void *dm_void, boolean force); 818 819 void halrf_dack_restore(void *dm_void); 820 821 void halrf_iqk_info_rsvd_page(void *dm_void, u8 *buf, u32 *buf_size); 822 823 void halrf_set_rfsupportability(void *dm_void); 824 825 void halrf_rxdck(void *dm_void); 826 827 void halrf_delay_10us(u16 v1); 828 829 void halrf_dump_rfk_reg(void *dm_void, char input[][16], u32 *_used, 830 char *output, u32 *_out_len); 831 832 void halrf_xtal_thermal_track(void *dm_void); 833 834 void halrf_powertracking_thermal(void *dm_void); 835 836 u32 halrf_tssi_turn_target_power(void *dm_void, s16 power_offset, u8 path); 837 838 void halrf_tssi_set_power_offset(void *dm_void, s16 power_offset, u8 path); 839 840 void halrf_rfk_power_save(void *dm_void, boolean is_power_save); 841 842 #endif /*__HALRF_H__*/ 843