1 /*
2 * Copyright (c) 2021 Chipsea Technologies (Shenzhen) Corp., Ltd. All rights reserved.
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at
6 *
7 * http://www.apache.org/licenses/LICENSE-2.0
8 *
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
14 */
15 /**
16 ****************************************************************************************
17 *
18 * @file arch_main.c
19 *
20 * @brief Main loop of the application.
21 *
22 ****************************************************************************************
23 */
24
25 /*
26 * INCLUDES
27 ****************************************************************************************
28 */
29
30 #include "plf.h" // SW configuration
31
32 #include "arch.h" // architectural platform definitions
33 #include <stdlib.h> // standard lib functions
34 #include <stddef.h> // standard definitions
35 #include <stdint.h> // standard integer definition
36 #include <stdbool.h> // boolean definition
37 #include "driver_pub.h"
38
39 #include "dbg.h"
40
41 #include "uart.h"
42 #include "system.h"
43
44 #if (PLF_CONSOLE)
45 #include "console.h"
46 #endif /* PLF_CONSOLE */
47
48 #if PLF_TEST
49 #include "test_main.h"
50 #endif /* PLF_TEST */
51
52 #if PLF_PMIC
53 #include "pwrkey_api.h"
54 #endif
55
56 /*chipsea_ohos include begin */
57 #ifdef CFG_LITEOS
58 #include "al_rtos.h"
59 #include "los_arch_interrupt.h"
60 #include "los_tick.h"
61 #endif
62 /*chipsea_ohos include end*/
63
64 /*
65 * DEFINES
66 ****************************************************************************************
67 */
68 /*chipsea_ohos define hard fault irqn begin */
69 #ifdef CFG_LITEOS
70 #define HARDFAULT_IRQN (-13)
71 #endif
72 /*chipsea_ohos define hard fault irqn end*/
73
74 /*
75 * STRUCTURE DEFINITIONS
76 ****************************************************************************************
77 */
78
79
80 /*
81 * GLOBAL VARIABLE DEFINITIONS
82 ****************************************************************************************
83 */
84
85 /*
86 * LOCAL FUNCTION DECLARATIONS
87 ****************************************************************************************
88 */
89 /*chipsea_ohos set os isr begin */
90 #ifdef CFG_LITEOS
OsVectorInit(void)91 static void OsVectorInit(void)
92 {
93 NVIC_SetVector(NonMaskableInt_IRQn, (uint32_t)HalExcNMI);
94 NVIC_SetVector(HARDFAULT_IRQN, (uint32_t)HalExcHardFault);
95 NVIC_SetVector(MemoryManagement_IRQn, (uint32_t)HalExcMemFault);
96 NVIC_SetVector(BusFault_IRQn, (uint32_t)HalExcBusFault);
97 NVIC_SetVector(UsageFault_IRQn, (uint32_t)HalExcUsageFault);
98 NVIC_SetVector(SVCall_IRQn, (uint32_t)HalExcSvcCall);
99 NVIC_SetVector(PendSV_IRQn, (uint32_t)HalPendSV);
100 NVIC_SetVector(SysTick_IRQn, (uint32_t)OsTickHandler);
101 }
102 #endif
103 /*chipsea_ohos set os isr end*/
104
105 /*
106 * MAIN FUNCTION
107 ****************************************************************************************
108 */
109
110 /**
111 ****************************************************************************************
112 * @brief RW main function.
113 *
114 * This function is called right after the booting process has completed.
115 *
116 * @return status exit status
117 ****************************************************************************************
118 */
rw_main(void)119 void rw_main(void)
120 {
121 /*
122 ************************************************************************************
123 * Platform initialization
124 ************************************************************************************
125 */
126 /*chipsea_ohos set os isr begin*/
127 #ifdef CFG_LITEOS
128 //update vectors
129 OsVectorInit();
130 #endif
131 /*chipsea_ohos set os isr end*/
132
133 // Update system clocks
134 SystemCoreClockUpdate();
135
136 // Initialize stdio uart
137 stdio_uart_init();
138
139 // Embedded modules initialization
140 dbg_init();
141
142 // finally start interrupt handling
143 GLOBAL_INT_START();
144
145 #if PLF_PMIC
146 pwrkey_poweron_check();
147 #endif
148
149 dbg("\r\nhost_wb start\r\n");
150
151 cs_time_init(0, 0);
152
153 /*chipsea_ohos os main begin*/
154 #ifndef CFG_LITEOS
155 // Initialize console
156 #if (PLF_CONSOLE)
157 console_init();
158 #endif
159 #if PLF_TEST
160 test_main();
161 #endif /* PLF_TEST */
162
163 /*
164 ************************************************************************************
165 * Main loop
166 ************************************************************************************
167 */
168
169 while(1)
170 {
171 // schedule all pending console commands
172 #if (PLF_CONSOLE)
173 console_schedule();
174 #endif
175
176 GLOBAL_INT_DISABLE();
177 #if (PLF_CONSOLE)
178 if (console_buf_empty() == 1)
179 #endif
180 {
181 // Wait for interrupt
182 __WFI();
183 }
184 GLOBAL_INT_RESTORE();
185 }
186 #else //CFG_LITEOS
187 rtos_main();
188 #endif
189 /*chipsea_ohos os main end*/
190 }
191