1/* Linker script for cs8800 */ 2 3/* Linker script to configure memory regions. */ 4MEMORY 5{ 6 IRAM (rwx) : ORIGIN = 0x08000000, LENGTH = 1500K 7 DRAM (rwx) : ORIGIN = 0x00100000, LENGTH = 384K 8 LPIRAM (rwx) : ORIGIN = 0x001A0000, LENGTH = 0x100 9 ipc_shared_memory (!rx) : ORIGIN = 0x00190000, len = 2K 10 host_rxbuf_memory (!rx) : ORIGIN = 0x00198000, len = 32K 11 SHARED_HOST (w) : ORIGIN = 0x001E5000, LENGTH = 2K 12 PRIVATE_HOST (w) : ORIGIN = 0x001E5800, LENGTH = 2K 13 PRIVATE_PATCH (w) : ORIGIN = 0x001E6000, LENGTH = 8K 14} 15 16/* Linker script to place sections and symbol values. Should be used together 17 * with other linker script that defines memory regions FLASH and RAM. 18 * It references following symbols, which must be defined in code: 19 * Reset_Handler : Entry of reset handler 20 * 21 * It defines following symbols, which code can use without definition: 22 * __exidx_start 23 * __exidx_end 24 * __etext 25 * __data_start__ 26 * __preinit_array_start 27 * __preinit_array_end 28 * __init_array_start 29 * __init_array_end 30 * __fini_array_start 31 * __fini_array_end 32 * __data_end__ 33 * __bss_start__ 34 * __bss_end__ 35 * __end__ 36 * end 37 * __HeapLimit 38 * __StackLimit 39 * __StackTop 40 * __stack 41 */ 42ENTRY(Reset_Handler) 43 44SECTIONS 45{ 46 .text : 47 { 48 /*Chipsea add _stext begin*/ 49 _stext = .; 50 /*Chipsea add _stext end*/ 51 __code_start__ = .; 52 /* the address 0 must contain the boot vectors */ 53 KEEP(*(.isr_vector)) 54 __isr_vector_end__ = .; 55 *boot_startup.o(.text) 56 *(.text*) 57 58 *(.rodata*) 59 __code_end__ = .; 60 /*Chipsea add _etext begin*/ 61 _etext = .; 62 /*Chipsea add _etext end*/ 63 } > IRAM 64 .zInit (.) : 65 { 66 __zinitcall_bsp_start = .; 67 KEEP (*(.zinitcall.bsp0.init)) 68 KEEP (*(.zinitcall.bsp1.init)) 69 KEEP (*(.zinitcall.bsp2.init)) 70 KEEP (*(.zinitcall.bsp3.init)) 71 KEEP (*(.zinitcall.bsp4.init)) 72 __zinitcall_bsp_end = .; 73 . = ALIGN(4); 74 __zinitcall_device_start = .; 75 KEEP (*(.zinitcall.device0.init)) 76 KEEP (*(.zinitcall.device1.init)) 77 KEEP (*(.zinitcall.device2.init)) 78 KEEP (*(.zinitcall.device3.init)) 79 KEEP (*(.zinitcall.device4.init)) 80 __zinitcall_device_end = .; 81 . = ALIGN(4); 82 __zinitcall_core_start = .; 83 KEEP (*(.zinitcall.core0.init)) 84 KEEP (*(.zinitcall.core1.init)) 85 KEEP (*(.zinitcall.core2.init)) 86 KEEP (*(.zinitcall.core3.init)) 87 KEEP (*(.zinitcall.core4.init)) 88 __zinitcall_core_end = .; 89 . = ALIGN(4); 90 __zinitcall_sys_service_start = .; 91 KEEP (*(.zinitcall.sys.service0.init)) 92 KEEP (*(.zinitcall.sys.service1.init)) 93 KEEP (*(.zinitcall.sys.service2.init)) 94 KEEP (*(.zinitcall.sys.service3.init)) 95 KEEP (*(.zinitcall.sys.service4.init)) 96 __zinitcall_sys_service_end = .; 97 . = ALIGN(4); 98 __zinitcall_sys_feature_start = .; 99 KEEP (*(.zinitcall.sys.feature0.init)) 100 KEEP (*(.zinitcall.sys.feature1.init)) 101 KEEP (*(.zinitcall.sys.feature2.init)) 102 KEEP (*(.zinitcall.sys.feature3.init)) 103 KEEP (*(.zinitcall.sys.feature4.init)) 104 __zinitcall_sys_feature_end = .; 105 . = ALIGN(4); 106 __zinitcall_run_start = .; 107 KEEP (*(.zinitcall.run0.init)) 108 KEEP (*(.zinitcall.run1.init)) 109 KEEP (*(.zinitcall.run2.init)) 110 KEEP (*(.zinitcall.run3.init)) 111 KEEP (*(.zinitcall.run4.init)) 112 __zinitcall_run_end = .; 113 . = ALIGN(4); 114 __zinitcall_app_service_start = .; 115 KEEP (*(.zinitcall.app.service0.init)) 116 KEEP (*(.zinitcall.app.service1.init)) 117 KEEP (*(.zinitcall.app.service2.init)) 118 KEEP (*(.zinitcall.app.service3.init)) 119 KEEP (*(.zinitcall.app.service4.init)) 120 __zinitcall_app_service_end = .; 121 . = ALIGN(4); 122 __zinitcall_app_feature_start = .; 123 KEEP (*(.zinitcall.app.feature0.init)) 124 KEEP (*(.zinitcall.app.feature1.init)) 125 KEEP (*(.zinitcall.app.feature2.init)) 126 KEEP (*(.zinitcall.app.feature3.init)) 127 KEEP (*(.zinitcall.app.feature4.init)) 128 __zinitcall_app_feature_end = .; 129 . = ALIGN(4); 130 __zinitcall_test_start = .; 131 KEEP (*(.zinitcall.test0.init)) 132 KEEP (*(.zinitcall.test1.init)) 133 KEEP (*(.zinitcall.test2.init)) 134 KEEP (*(.zinitcall.test3.init)) 135 KEEP (*(.zinitcall.test4.init)) 136 __zinitcall_test_end = .; 137 . = ALIGN(4); 138 __zinitcall_exit_start = .; 139 KEEP (*(.zinitcall.exit0.init)) 140 KEEP (*(.zinitcall.exit1.init)) 141 KEEP (*(.zinitcall.exit2.init)) 142 KEEP (*(.zinitcall.exit3.init)) 143 KEEP (*(.zinitcall.exit4.init)) 144 __zinitcall_exit_end = .; 145 . = ALIGN(4); 146 } > IRAM 147 148 .ARM.exidx : 149 { 150 __exidx_start = .; 151 *(.ARM.exidx* .gnu.linkonce.armexidx.*) 152 __exidx_end = .; 153 } > IRAM 154 155 __etext = .; 156 157 .vectors (ORIGIN(DRAM)) (NOLOAD): 158 { 159 __vectors_start__ = .; 160 . = (__isr_vector_end__ - __code_start__); 161 __vectors_end__ = .; 162 } > DRAM 163 164 .data : AT (__etext) 165 { 166 __data_start__ = .; 167 Image$$RW_IRAM1$$Base = .; 168 *(vtable) 169 *(.data*) 170 171 . = ALIGN(4); 172 /*Chipsea add hdf_drivers begin*/ 173 _hdf_drivers_start = .; 174 KEEP(*(.hdf.driver)) 175 _hdf_drivers_end = .; 176 /*Chipsea add hdf_drivers end*/ 177 /* All data end */ 178 __data_end__ = .; 179 180 } > DRAM 181 182 __image_end__ = __etext + SIZEOF(.data); 183 184 .bss (NOLOAD): 185 { 186 __bss_start__ = .; 187 *(.bss*) 188 *(COMMON) 189 __bss_end__ = .; 190 *(SHAREDRAM) 191 Image$$RW_IRAM1$$ZI$$Limit = . ; 192 } > DRAM 193 194 .heap : 195 { 196 __end__ = .; 197 /*Chipsea add end/_end/__end begin*/ 198 end = .; 199 _end = end; 200 __end = end; 201 /*Chipsea add end/_end/__end end*/ 202 *(.heap*) 203 __HeapLimit = .; 204 } > DRAM 205 /*Chipsea add __HEAP_START begin*/ 206 PROVIDE(__HEAP_START = ADDR(.heap)); 207 /*Chipsea add __HEAP_START end*/ 208 PROVIDE(__sbrk_start = ADDR(.heap)); 209 PROVIDE(__krbs_start = ADDR(.heap) + SIZEOF(.heap)); 210 211 /* .stack_dummy section doesn't contains any symbols. It is only 212 * used for linker to calculate size of stack sections, and assign 213 * values to stack symbols later */ 214 .stack_dummy : 215 { 216 *(.stack) 217 } > DRAM 218 219 /* Set stack top to end of IRAM, and stack limit move down by 220 * size of stack_dummy section */ 221 __StackTop = ORIGIN(DRAM) + LENGTH(DRAM); 222 __StackLimit = __StackTop - SIZEOF(.stack_dummy); 223 PROVIDE(__stack = __StackTop); 224 /*Chipsea add _sstack/_estack begin*/ 225 _sstack = __StackLimit; 226 _estack = __stack; 227 /*Chipsea add _sstack/_estack end*/ 228 229 /* Check if data + stack exceeds RAM limit */ 230 ASSERT(__StackLimit >= __HeapLimit, "region DRAM overflowed with stack") 231 232 /* IPC shared RAM */ 233 IPC_SHARED (NOLOAD): 234 { 235 *(SHAREDRAMIPC) 236 } > ipc_shared_memory 237 238 HOST_RXBUF (NOLOAD): 239 { 240 _shrbram = . ; 241 *(HOST_RXBUF) 242 _ehrbram = . ; 243 } > host_rxbuf_memory 244 245 .shared_host (NOLOAD): 246 { 247 _start_shared_host = .; 248 *(SORT_BY_NAME(SHAREDMEM_HOST_*)) 249 _end_shared_host = .; 250 } > SHARED_HOST 251 252 .private_host (NOLOAD): 253 { 254 _start_private_host = .; 255 KEEP(*(SORT_BY_NAME(PRIVATEMEM_HOST_*))) 256 _end_private_host = .; 257 } > PRIVATE_HOST 258} 259