1 /* 2 * Copyright (c) 2022 HiSilicon (Shanghai) Technologies CO., LIMITED. 3 * Licensed under the Apache License, Version 2.0 (the "License"); 4 * you may not use this file except in compliance with the License. 5 * You may obtain a copy of the License at 6 * 7 * http://www.apache.org/licenses/LICENSE-2.0 8 * 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 */ 15 16 #ifndef __MPI_VPSS_H__ 17 #define __MPI_VPSS_H__ 18 19 #include "hi_common.h" 20 #include "hi_comm_video.h" 21 #include "hi_comm_vb.h" 22 #include "hi_comm_vpss.h" 23 #include "hi_comm_gdc.h" 24 25 #ifdef __cplusplus 26 #if __cplusplus 27 extern "C" { 28 #endif 29 #endif /* __cplusplus */ 30 31 /* Group Settings */ 32 HI_S32 HI_MPI_VPSS_CreateGrp(VPSS_GRP VpssGrp, const VPSS_GRP_ATTR_S *pstGrpAttr); 33 HI_S32 HI_MPI_VPSS_DestroyGrp(VPSS_GRP VpssGrp); 34 35 HI_S32 HI_MPI_VPSS_StartGrp(VPSS_GRP VpssGrp); 36 HI_S32 HI_MPI_VPSS_StopGrp(VPSS_GRP VpssGrp); 37 38 HI_S32 HI_MPI_VPSS_ResetGrp(VPSS_GRP VpssGrp); 39 40 HI_S32 HI_MPI_VPSS_GetGrpAttr(VPSS_GRP VpssGrp, VPSS_GRP_ATTR_S *pstGrpAttr); 41 HI_S32 HI_MPI_VPSS_SetGrpAttr(VPSS_GRP VpssGrp, const VPSS_GRP_ATTR_S *pstGrpAttr); 42 43 HI_S32 HI_MPI_VPSS_SetGrpCrop(VPSS_GRP VpssGrp, const VPSS_CROP_INFO_S *pstCropInfo); 44 HI_S32 HI_MPI_VPSS_GetGrpCrop(VPSS_GRP VpssGrp, VPSS_CROP_INFO_S *pstCropInfo); 45 46 HI_S32 HI_MPI_VPSS_SendFrame(VPSS_GRP VpssGrp, VPSS_GRP_PIPE VpssGrpPipe, 47 const VIDEO_FRAME_INFO_S *pstVideoFrame, HI_S32 s32MilliSec); 48 49 HI_S32 HI_MPI_VPSS_GetGrpFrame(VPSS_GRP VpssGrp, VPSS_GRP_PIPE VpssGrpPipe, VIDEO_FRAME_INFO_S *pstVideoFrame); 50 HI_S32 HI_MPI_VPSS_ReleaseGrpFrame(VPSS_GRP VpssGrp, VPSS_GRP_PIPE VpssGrpPipe, 51 const VIDEO_FRAME_INFO_S *pstVideoFrame); 52 53 HI_S32 HI_MPI_VPSS_EnableBackupFrame(VPSS_GRP VpssGrp); 54 HI_S32 HI_MPI_VPSS_DisableBackupFrame(VPSS_GRP VpssGrp); 55 56 HI_S32 HI_MPI_VPSS_SetGrpSharpen(VPSS_GRP VpssGrp, const VPSS_GRP_SHARPEN_ATTR_S *pstGrpSharpenAttr); 57 HI_S32 HI_MPI_VPSS_GetGrpSharpen(VPSS_GRP VpssGrp, VPSS_GRP_SHARPEN_ATTR_S *pstGrpSharpenAttr); 58 59 HI_S32 HI_MPI_VPSS_SetGrpDelay(VPSS_GRP VpssGrp, HI_U32 u32Delay); 60 HI_S32 HI_MPI_VPSS_GetGrpDelay(VPSS_GRP VpssGrp, HI_U32 *pu32Delay); 61 62 HI_S32 HI_MPI_VPSS_SetGrpFisheyeConfig(VPSS_GRP VpssGrp, const FISHEYE_CONFIG_S *pstFisheyeConfig); 63 HI_S32 HI_MPI_VPSS_GetGrpFisheyeConfig(VPSS_GRP VpssGrp, FISHEYE_CONFIG_S *pstFisheyeConfig); 64 65 HI_S32 HI_MPI_VPSS_EnableUserFrameRateCtrl(VPSS_GRP VpssGrp); 66 HI_S32 HI_MPI_VPSS_DisableUserFrameRateCtrl(VPSS_GRP VpssGrp); 67 68 HI_S32 HI_MPI_VPSS_SetGrpFrameInterruptAttr(VPSS_GRP VpssGrp, const FRAME_INTERRUPT_ATTR_S *pstFrameIntAttr); 69 HI_S32 HI_MPI_VPSS_GetGrpFrameInterruptAttr(VPSS_GRP VpssGrp, FRAME_INTERRUPT_ATTR_S *pstFrameIntAttr); 70 71 /* Chn Settings */ 72 HI_S32 HI_MPI_VPSS_SetChnAttr(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, const VPSS_CHN_ATTR_S *pstChnAttr); 73 HI_S32 HI_MPI_VPSS_GetChnAttr(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, VPSS_CHN_ATTR_S *pstChnAttr); 74 75 HI_S32 HI_MPI_VPSS_EnableChn(VPSS_GRP VpssGrp, VPSS_CHN VpssChn); 76 HI_S32 HI_MPI_VPSS_DisableChn(VPSS_GRP VpssGrp, VPSS_CHN VpssChn); 77 78 HI_S32 HI_MPI_VPSS_SetChnCrop(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, const VPSS_CROP_INFO_S *pstCropInfo); 79 HI_S32 HI_MPI_VPSS_GetChnCrop(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, VPSS_CROP_INFO_S *pstCropInfo); 80 81 HI_S32 HI_MPI_VPSS_SetChnRotation(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, ROTATION_E enRotation); 82 HI_S32 HI_MPI_VPSS_GetChnRotation(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, ROTATION_E *penRotation); 83 84 HI_S32 HI_MPI_VPSS_SetChnRotationEx(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, 85 const VPSS_ROTATION_EX_ATTR_S *pstRotationExAttr); 86 HI_S32 HI_MPI_VPSS_GetChnRotationEx(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, VPSS_ROTATION_EX_ATTR_S *pstRotationExAttr); 87 88 HI_S32 HI_MPI_VPSS_SetChnLDCAttr(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, const VPSS_LDC_ATTR_S *pstLDCAttr); 89 HI_S32 HI_MPI_VPSS_GetChnLDCAttr(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, VPSS_LDC_ATTR_S *pstLDCAttr); 90 91 HI_S32 HI_MPI_VPSS_SetChnLDCV3Attr(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, const VPSS_LDCV3_ATTR_S *pstLDCV3Attr); 92 HI_S32 HI_MPI_VPSS_GetChnLDCV3Attr(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, VPSS_LDCV3_ATTR_S *pstLDCV3Attr); 93 94 HI_S32 HI_MPI_VPSS_SetChnSpreadAttr(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, const SPREAD_ATTR_S *pstSpreadAttr); 95 HI_S32 HI_MPI_VPSS_GetChnSpreadAttr(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, SPREAD_ATTR_S *pstSpreadAttr); 96 97 HI_S32 HI_MPI_VPSS_GetChnFrame(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, 98 VIDEO_FRAME_INFO_S *pstVideoFrame, HI_S32 s32MilliSec); 99 HI_S32 HI_MPI_VPSS_ReleaseChnFrame(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, const VIDEO_FRAME_INFO_S *pstVideoFrame); 100 101 HI_S32 HI_MPI_VPSS_GetRegionLuma(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, const VIDEO_REGION_INFO_S *pstRegionInfo, 102 HI_U64 *pu64LumaData, HI_S32 s32MilliSec); 103 104 HI_S32 HI_MPI_VPSS_SetLowDelayAttr(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, const VPSS_LOW_DELAY_INFO_S *pstLowDelayInfo); 105 HI_S32 HI_MPI_VPSS_GetLowDelayAttr(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, VPSS_LOW_DELAY_INFO_S *pstLowDelayInfo); 106 107 HI_S32 HI_MPI_VPSS_SetChnBufWrapAttr(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, const VPSS_CHN_BUF_WRAP_S *pstVpssChnBufWrap); 108 HI_S32 HI_MPI_VPSS_GetChnBufWrapAttr(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, VPSS_CHN_BUF_WRAP_S *pstVpssChnBufWrap); 109 110 HI_S32 HI_MPI_VPSS_TriggerSnapFrame(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, HI_U32 u32FrameCnt); 111 112 HI_S32 HI_MPI_VPSS_AttachVbPool(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, VB_POOL hVbPool); 113 HI_S32 HI_MPI_VPSS_DetachVbPool(VPSS_GRP VpssGrp, VPSS_CHN VpssChn); 114 115 HI_S32 HI_MPI_VPSS_EnableBufferShare(VPSS_GRP VpssGrp, VPSS_CHN VpssChn); 116 HI_S32 HI_MPI_VPSS_DisableBufferShare(VPSS_GRP VpssGrp, VPSS_CHN VpssChn); 117 118 HI_S32 HI_MPI_VPSS_SetChnAlign(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, HI_U32 u32Align); 119 HI_S32 HI_MPI_VPSS_GetChnAlign(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, HI_U32 *pu32Align); 120 121 HI_S32 HI_MPI_VPSS_SetChnProcMode(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, VPSS_CHN_PROC_MODE_E enVpssChnProcMode); 122 HI_S32 HI_MPI_VPSS_GetChnProcMode(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, VPSS_CHN_PROC_MODE_E *penVpssChnProcMode); 123 124 /* ExtChn Settings */ 125 HI_S32 HI_MPI_VPSS_SetExtChnAttr(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, const VPSS_EXT_CHN_ATTR_S *pstExtChnAttr); 126 HI_S32 HI_MPI_VPSS_GetExtChnAttr(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, VPSS_EXT_CHN_ATTR_S *pstExtChnAttr); 127 128 HI_S32 HI_MPI_VPSS_SetExtChnFisheye(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, const FISHEYE_ATTR_S *pstFishEyeAttr); 129 HI_S32 HI_MPI_VPSS_GetExtChnFisheye(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, FISHEYE_ATTR_S *pstFishEyeAttr); 130 131 HI_S32 HI_MPI_VPSS_FisheyePosQueryDst2Src(VPSS_GRP VpssGrp, VPSS_CHN VpssChn, HI_U32 u32RegionIndex, 132 const POINT_S *pstDstPointIn, POINT_S *pstSrcPointOut); 133 134 /* 3DNR */ 135 HI_S32 HI_MPI_VPSS_SetGrpNRXParam(VPSS_GRP VpssGrp, const VPSS_GRP_NRX_PARAM_S *pstNRXParam); 136 HI_S32 HI_MPI_VPSS_GetGrpNRXParam(VPSS_GRP VpssGrp, VPSS_GRP_NRX_PARAM_S *pstNRXParam); 137 138 /* Module Param Settings */ 139 HI_S32 HI_MPI_VPSS_SetModParam(const VPSS_MOD_PARAM_S *pstModParam); 140 HI_S32 HI_MPI_VPSS_GetModParam(VPSS_MOD_PARAM_S *pstModParam); 141 142 HI_S32 HI_MPI_VPSS_GetChnFd(VPSS_GRP VpssGrp, VPSS_CHN VpssChn); 143 HI_S32 HI_MPI_VPSS_CloseFd(HI_VOID); 144 145 #ifdef __cplusplus 146 #if __cplusplus 147 } 148 #endif 149 #endif /* __cplusplus */ 150 151 #endif /* __MPI_VPSS_H__ */ 152 153