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1 /*
2  * Copyright (c) 2020 HiSilicon (Shanghai) Technologies CO., LIMITED.
3  * Licensed under the Apache License, Version 2.0 (the "License");
4  * you may not use this file except in compliance with the License.
5  * You may obtain a copy of the License at
6  *
7  *     http://www.apache.org/licenses/LICENSE-2.0
8  *
9  * Unless required by applicable law or agreed to in writing, software
10  * distributed under the License is distributed on an "AS IS" BASIS,
11  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12  * See the License for the specific language governing permissions and
13  * limitations under the License.
14  */
15 
16 #ifndef __EFUSE_DRV_H__
17 #define __EFUSE_DRV_H__
18 #include <hi_boot_rom.h>
19 
20 typedef struct {
21     hi_u16 id_start_bit;
22     hi_u16 id_size;
23     hi_u8 attr;
24 } hi_efuse_stru;
25 
26 #define EFUSE_PGM_EN   (HI_EFUSE_REG_BASE + 0x0)
27 #define EFUSE_PGM_ADDR (HI_EFUSE_REG_BASE + 0x4)
28 #define EFUSE_RD_EN    (HI_EFUSE_REG_BASE + 0x8)
29 #define EFUSE_RD_ADDR  (HI_EFUSE_REG_BASE + 0xc)
30 #define EFUSE_STATUS   (HI_EFUSE_REG_BASE + 0x10)
31 #define EFUSE_RDATA    (HI_EFUSE_REG_BASE + 0x14)
32 
33 #define EFUSE_WRITE_READY_STATUS (1 << 0)
34 #define EFUSE_READ_READY_STATUS  (1 << 1)
35 #define EFUSE_STATUS_MASK        (0x7 << 2)
36 #define EFUSE_PO_STATUS_READY    (0x1 << 2)
37 #define EFUSE_STATUS_READY       (0x1 << 4)
38 
39 #define EFUSE_CTRL_ST   (0x1 << 5)
40 #define EFUSE_EN_SWITCH (1 << 0)
41 #define EFUSE_EN_OK     0
42 
43 #define EFUSE_STATUS_RD    (1 << 1)
44 #define EFUSE_8_BIT        8
45 #define EFUSE_KEY_LOCK_BIT 2
46 
47 #define EFUSE_TIMEOUT_DEFAULT 1000000
48 #define EFUSE_TIMECNT_TICK    10
49 
50 #define EFUSE_PGM_ADDR_SIZE          2048
51 #define EFUSE_USER_RESEVED_START_BIT 1884
52 #define EFUSE_USER_RESEVED_END_BIT   2011
53 #define EFUSE_LOCK_START_BITS        2012
54 #define EFUSE_LOCK_FIELD2_START_BITS 235
55 #define EFUSE_LOCK_SIZE              36
56 #define EFUSE_LOCK_FIELD2_SIZE       5
57 #define EFUSE_MAX_INDEX_SIZE         32
58 
59 #define EFUSE_IDX_NRW 0x0
60 #define EFUSE_IDX_RO  0x1
61 #define EFUSE_IDX_WO  0x2
62 #define EFUSE_IDX_RW  0x3
63 
64 hi_efuse_stru *get_efuse_cfg(hi_void);
65 hi_void get_efuse_cfg_by_id(hi_efuse_idx idx, hi_u16 *start_bit, hi_u16 *size, hi_u8 *attr);
66 hi_u32 efuse_read_bits(hi_u16 start_bit, hi_u16 size, hi_u8 *key_data);
67 hi_u32 efuse_write_bits(hi_u16 start_bit, hi_u16 size, const hi_u8 *key_data, hi_u8 *err_state);
68 
69 #endif /* __EFUSE_H__ */
70