1 /* 2 * Copyright (c) 2022 HPMicro 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 * 6 */ 7 8 #ifndef _HPM_BOARD_H 9 #define _HPM_BOARD_H 10 #include <stdio.h> 11 #include "hpm_common.h" 12 #include "hpm_clock_drv.h" 13 #include "hpm_soc.h" 14 #include "hpm_soc_feature.h" 15 #include "pinmux.h" 16 17 #define BOARD_NAME "hpm6300evk" 18 #define BOARD_UF2_SIGNATURE (0x0A4D5048UL) 19 20 /* dma section */ 21 #define BOARD_APP_XDMA HPM_XDMA 22 #define BOARD_APP_HDMA HPM_HDMA 23 #define BOARD_APP_XDMA_IRQ IRQn_XDMA 24 #define BOARD_APP_HDMA_IRQ IRQn_HDMA 25 #define BOARD_APP_DMAMUX HPM_DMAMUX 26 27 /* uart section */ 28 #ifndef BOARD_RUNNING_CORE 29 #define BOARD_RUNNING_CORE HPM_CORE0 30 #endif 31 #ifndef BOARD_APP_UART_BASE 32 #define BOARD_APP_UART_BASE HPM_UART0 33 #define BOARD_APP_UART_IRQ IRQn_UART0 34 #else 35 #ifndef BOARD_APP_UART_IRQ 36 #warning no IRQ specified for applicaiton uart 37 #endif 38 #endif 39 40 #define BOARD_APP_UART_BAUDRATE (115200UL) 41 #define BOARD_APP_UART_CLK_NAME clock_uart0 42 43 #ifndef BOARD_CONSOLE_TYPE 44 #define BOARD_CONSOLE_TYPE console_type_uart 45 #endif 46 47 #if console_type_uart == BOARD_CONSOLE_TYPE 48 #ifndef BOARD_CONSOLE_BASE 49 #if BOARD_RUNNING_CORE == HPM_CORE0 50 #define BOARD_CONSOLE_BASE HPM_UART0 51 #define BOARD_CONSOLE_CLK_NAME clock_uart0 52 #else 53 #define BOARD_CONSOLE_BASE HPM_UART13 54 #define BOARD_CONSOLE_CLK_NAME clock_uart13 55 #endif 56 #endif 57 #define BOARD_CONSOLE_BAUDRATE (115200UL) 58 #endif 59 60 #define BOARD_FREEMASTER_UART_BASE HPM_UART0 61 #define BOARD_FREEMASTER_UART_IRQ IRQn_UART0 62 #define BOARD_FREEMASTER_UART_CLK_NAME clock_uart0 63 64 /* uart rx idle demo section */ 65 #define BOARD_UART_IDLE HPM_UART2 66 #define BOARD_UART_IDLE_DMA_SRC HPM_DMA_SRC_UART2_RX 67 68 #define BOARD_UART_IDLE_TRGM HPM_TRGM1 69 #define BOARD_UART_IDLE_TRGM_PIN IOC_PAD_PA24 70 #define BOARD_UART_IDLE_TRGM_INPUT_SRC HPM_TRGM1_INPUT_SRC_TRGM1_P4 71 #define BOARD_UART_IDLE_TRGM_OUTPUT_GPTMR_IN HPM_TRGM1_OUTPUT_SRC_GPTMR2_IN2 72 #define BOARD_UART_IDLE_TRGM_OUTPUT_GPTMR_SYNCI HPM_TRGM1_OUTPUT_SRC_GPTMR2_SYNCI 73 74 #define BOARD_UART_IDLE_GPTMR HPM_GPTMR2 75 #define BOARD_UART_IDLE_GPTMR_CLK_NAME clock_gptmr2 76 #define BOARD_UART_IDLE_GPTMR_IRQ IRQn_GPTMR2 77 #define BOARD_UART_IDLE_GPTMR_CMP_CH 0 78 #define BOARD_UART_IDLE_GPTMR_CAP_CH 2 79 80 /* sdram section */ 81 #define BOARD_SDRAM_ADDRESS (0x40000000UL) 82 #define BOARD_SDRAM_SIZE (32*SIZE_1MB) 83 #define BOARD_SDRAM_CS DRAM_SDRAM_CS0 84 #define BOARD_SDRAM_PORT_SIZE DRAM_SDRAM_PORT_SIZE_16_BITS 85 #define BOARD_SDRAM_REFRESH_COUNT (8192UL) 86 #define BOARD_SDRAM_REFRESH_IN_MS (64UL) 87 #define BOARD_SDRAM_DATA_WIDTH_IN_BYTE (4UL) 88 89 90 /* nor flash section */ 91 #define BOARD_FLASH_BASE_ADDRESS (0x80000000UL) 92 #define BOARD_FLASH_SIZE (16 * SIZE_1MB) 93 94 /* i2c section */ 95 #define BOARD_APP_I2C_BASE HPM_I2C0 96 #define BOARD_APP_I2C_CLK_NAME clock_i2c0 97 #define BOARD_APP_I2C_DMA HPM_HDMA 98 #define BOARD_APP_I2C_DMAMUX HPM_DMAMUX 99 #define BOARD_APP_I2C_DMA_SRC HPM_DMA_SRC_I2C0 100 #define BOARD_APP_I2C_DMAMUX_CH DMAMUX_MUXCFG_HDMA_MUX0 101 102 /* ACMP desction */ 103 #define BOARD_ACMP HPM_ACMP 104 #define BOARD_ACMP_CHANNEL ACMP_CHANNEL_CHN1 105 #define BOARD_ACMP_IRQ IRQn_ACMP_1 106 #define BOARD_ACMP_PLUS_INPUT ACMP_INPUT_DAC_OUT /* use internal DAC */ 107 #define BOARD_ACMP_MINUS_INPUT ACMP_INPUT_ANALOG_5 /* align with used pin */ 108 109 /* dma section */ 110 #define BOARD_APP_XDMA HPM_XDMA 111 #define BOARD_APP_HDMA HPM_HDMA 112 #define BOARD_APP_XDMA_IRQ IRQn_XDMA 113 #define BOARD_APP_HDMA_IRQ IRQn_HDMA 114 #define BOARD_APP_DMAMUX HPM_DMAMUX 115 116 /* gptmr section */ 117 #define BOARD_GPTMR HPM_GPTMR2 118 #define BOARD_GPTMR_IRQ IRQn_GPTMR2 119 #define BOARD_GPTMR_CHANNEL 0 120 #define BOARD_GPTMR_PWM HPM_GPTMR2 121 #define BOARD_GPTMR_PWM_CHANNEL 0 122 123 /* gpio section */ 124 #define BOARD_APP_GPIO_INDEX GPIO_DI_GPIOZ 125 #define BOARD_APP_GPIO_PIN 2 126 127 /* pinmux section */ 128 #define USING_GPIO0_FOR_GPIOZ 129 #ifndef USING_GPIO0_FOR_GPIOZ 130 #define BOARD_APP_GPIO_CTRL HPM_BGPIO 131 #define BOARD_APP_GPIO_IRQ IRQn_BGPIO 132 #else 133 #define BOARD_APP_GPIO_CTRL HPM_GPIO0 134 #define BOARD_APP_GPIO_IRQ IRQn_GPIO0_Z 135 #endif 136 137 /* gpiom section */ 138 #define BOARD_APP_GPIOM_BASE HPM_GPIOM 139 #define BOARD_APP_GPIOM_USING_CTRL HPM_FGPIO 140 #define BOARD_APP_GPIOM_USING_CTRL_NAME gpiom_core0_fast 141 142 /* spi section */ 143 #define BOARD_APP_SPI_BASE HPM_SPI3 144 #define BOARD_APP_SPI_CLK_SRC_FREQ (24000000UL) 145 #define BOARD_APP_SPI_SCLK_FREQ (1562500UL) 146 #define BOARD_APP_SPI_ADDR_LEN_IN_BYTES (1U) 147 #define BOARD_APP_SPI_DATA_LEN_IN_BITS (8U) 148 #define BOARD_APP_SPI_RX_DMA HPM_DMA_SRC_SPI3_RX 149 #define BOARD_APP_SPI_RX_DMAMUX_CH DMAMUX_MUXCFG_HDMA_MUX0 150 #define BOARD_APP_SPI_TX_DMA HPM_DMA_SRC_SPI3_TX 151 #define BOARD_APP_SPI_TX_DMAMUX_CH DMAMUX_MUXCFG_HDMA_MUX1 152 #define BOARD_SPI_CS_GPIO_CTRL HPM_GPIO0 153 #define BOARD_SPI_CS_PIN IOC_PAD_PC18 154 #define BOARD_SPI_CS_ACTIVE_LEVEL (0U) 155 156 /* Flash section */ 157 #define BOARD_APP_XPI_NOR_XPI_BASE (HPM_XPI0) 158 #define BOARD_APP_XPI_NOR_CFG_OPT_HDR (0xfcf90001U) 159 #define BOARD_APP_XPI_NOR_CFG_OPT_OPT0 (0x00000005U) 160 #define BOARD_APP_XPI_NOR_CFG_OPT_OPT1 (0x00001000U) 161 162 /* i2s section */ 163 #define BOARD_APP_I2S_BASE HPM_I2S0 164 #define BOARD_APP_I2S_DATA_LINE (2U) 165 #define BOARD_APP_I2S_CLK_NAME clock_i2s0 166 #define BOARD_APP_AUDIO_CLK_SRC clock_source_pll2_clk0 167 #define BOARD_APP_AUDIO_CLK_SRC_NAME clk_pll2clk0 168 169 /* enet section */ 170 #define BOARD_ENET_RMII HPM_ENET0 171 #define BOARD_ENET_RMII_RST_GPIO 172 #define BOARD_ENET_RMII_RST_GPIO_INDEX 173 #define BOARD_ENET_RMII_RST_GPIO_PIN 174 #define BOARD_ENET_RMII HPM_ENET0 175 #define BOARD_ENET_RMII_INT_REF_CLK (1U) 176 #define BOARD_ENET_RMII_PTP_CLOCK (clock_ptp0) 177 178 /* ADC section */ 179 #define BOARD_APP_ADC16_NAME "ADC0" 180 #define BOARD_APP_ADC16_BASE HPM_ADC0 181 #define BOARD_APP_ADC16_IRQn IRQn_ADC0 182 #define BOARD_APP_ADC16_CH_1 (13U) 183 #define BOARD_APP_ADC_TRIG_PWMT0 HPM_PWM0 184 #define BOARD_APP_ADC_TRIG_PWMT1 HPM_PWM1 185 #define BOARD_APP_ADC_TRIG_TRGM0 HPM_TRGM0 186 #define BOARD_APP_ADC_TRIG_TRGM1 HPM_TRGM1 187 #define BOARD_APP_ADC_TRIG_PWM_SYNC HPM_SYNT 188 189 /* DAC section */ 190 #define BOARD_DAC_BASE HPM_DAC 191 #define BOARD_DAC_IRQn IRQn_DAC 192 #define BOARD_DAC_CLOCK_NAME clock_dac0 193 194 /* CAN section */ 195 #define BOARD_APP_CAN_BASE HPM_CAN1 196 #define BOARD_APP_CAN_IRQn IRQn_CAN1 197 198 /* 199 * timer for board delay 200 */ 201 #define BOARD_DELAY_TIMER (HPM_GPTMR3) 202 #define BOARD_DELAY_TIMER_CH 0 203 #define BOARD_DELAY_TIMER_CLK_NAME (clock_gptmr3) 204 205 #define BOARD_CALLBACK_TIMER (HPM_GPTMR3) 206 #define BOARD_CALLBACK_TIMER_CH 1 207 #define BOARD_CALLBACK_TIMER_IRQ IRQn_GPTMR3 208 #define BOARD_CALLBACK_TIMER_CLK_NAME (clock_gptmr3) 209 210 /* SDXC section */ 211 #define BOARD_APP_SDCARD_SDXC_BASE (HPM_SDXC0) 212 #define BOARD_APP_SDCARD_SUPPORT_1V8 (0) 213 #define BOARD_APP_SDCARD_SUPPORT_CARD_DETECTION (1) 214 #define BOARD_APP_SDCARD_CARD_DETECTION_USING_GPIO (0) 215 #if BOARD_APP_SDCARD_CARD_DETECTION_USING_GPIO 216 #define BOARD_APP_SDCARD_CARD_DETECTION_GPIO NULL 217 #define BOARD_APP_SDCARD_CARD_DETECTION_GPIO_INDEX 0 218 #define BOARD_APP_SDCARD_CARD_DETECTION_PIN_INDEX 0 219 #endif 220 221 /* USB section */ 222 #define BOARD_USB0_ID_PORT (HPM_GPIO0) 223 #define BOARD_USB0_ID_GPIO_INDEX (GPIO_DO_GPIOC) 224 #define BOARD_USB0_ID_GPIO_PIN (23) 225 226 /*BLDC pwm*/ 227 228 /*PWM define*/ 229 #define BOARD_BLDCPWM HPM_PWM0 230 #define BOARD_BLDC_UH_PWM_OUTPIN (0U) 231 #define BOARD_BLDC_UL_PWM_OUTPIN (1U) 232 #define BOARD_BLDC_VH_PWM_OUTPIN (2U) 233 #define BOARD_BLDC_VL_PWM_OUTPIN (3U) 234 #define BOARD_BLDC_WH_PWM_OUTPIN (4U) 235 #define BOARD_BLDC_WL_PWM_OUTPIN (5U) 236 #define BOARD_BLDCPWM_TRGM HPM_TRGM0 237 #define BOARD_BLDCAPP_PWM_IRQ IRQn_PWM0 238 #define BOARD_BLDCPWM_CMP_INDEX_0 (0U) 239 #define BOARD_BLDCPWM_CMP_INDEX_1 (1U) 240 #define BOARD_BLDCPWM_CMP_INDEX_2 (2U) 241 #define BOARD_BLDCPWM_CMP_INDEX_3 (3U) 242 #define BOARD_BLDCPWM_CMP_INDEX_4 (4U) 243 #define BOARD_BLDCPWM_CMP_INDEX_5 (5U) 244 245 /*HALL define*/ 246 247 #define BOARD_BLDC_HALL_BASE HPM_HALL0 248 #define BOARD_BLDC_HALL_TRGM HPM_TRGM0 249 #define BOARD_BLDC_HALL_IRQ IRQn_HALL0 250 #define BOARD_BLDC_HALL_TRGM_HALL_U_SRC HPM_TRGM0_INPUT_SRC_TRGM0_P8 251 #define BOARD_BLDC_HALL_TRGM_HALL_V_SRC HPM_TRGM0_INPUT_SRC_TRGM0_P7 252 #define BOARD_BLDC_HALL_TRGM_HALL_W_SRC HPM_TRGM0_INPUT_SRC_TRGM0_P6 253 #define BOARD_BLDC_HALL_MOTOR_PHASE_COUNT_PER_REV (1000U) 254 255 256 257 /*QEI*/ 258 259 #define BOARD_BLDC_QEI_BASE HPM_QEI0 260 #define BOARD_BLDC_QEI_IRQ IRQn_QEI0 261 #define BOARD_BLDC_QEI_TRGM HPM_TRGM0 262 #define BOARD_BLDC_QEI_TRGM_QEI_A_SRC HPM_TRGM0_INPUT_SRC_TRGM0_P9 263 #define BOARD_BLDC_QEI_TRGM_QEI_B_SRC HPM_TRGM0_INPUT_SRC_TRGM0_P10 264 #define BOARD_BLDC_QEI_MOTOR_PHASE_COUNT_PER_REV (16U) 265 #define BOARD_BLDC_QEI_CLOCK_SOURCE clock_mot0 266 #define BOARD_BLDC_QEI_FOC_PHASE_COUNT_PER_REV (4000U) 267 268 /*Timer define*/ 269 270 #define BOARD_BLDC_TMR_1MS HPM_GPTMR2 271 #define BOARD_BLDC_TMR_CH 0 272 #define BOARD_BLDC_TMR_CMP 0 273 #define BOARD_BLDC_TMR_IRQ IRQn_GPTMR2 274 #define BOARD_BLDC_TMR_RELOAD (100000U) 275 276 /*adc*/ 277 #define BOARD_BLDC_ADC_MODULE ADCX_MODULE_ADC16 278 #define BOARD_BLDC_ADC_U_BASE HPM_ADC1 279 #define BOARD_BLDC_ADC_V_BASE HPM_ADC0 280 #define BOARD_BLDC_ADC_W_BASE HPM_ADC2 281 #define BOARD_BLDC_ADC_TRIG_FLAG adc16_event_trig_complete 282 283 #define BOARD_BLDC_ADC_CH_U (14U) 284 #define BOARD_BLDC_ADC_CH_V (12U) 285 #define BOARD_BLDC_ADC_CH_W (5U) 286 #define BOARD_BLDC_ADC_IRQn IRQn_ADC1 287 #define BOARD_BLDC_ADC_SEQ_DMA_SIZE_IN_4BYTES (40U) 288 #define BOARD_BLDC_ADC_TRG ADC16_CONFIG_TRG0A 289 #define BOARD_BLDC_ADC_PREEMPT_TRIG_LEN (1U) 290 #define BOARD_BLDC_PWM_TRIG_CMP_INDEX (8U) 291 #define BOARD_BLDC_TRIGMUX_IN_NUM HPM_TRGM0_INPUT_SRC_PWM0_CH8REF 292 #define BOARD_BLDC_TRG_NUM TRGM_TRGOCFG_ADCX_PTRGI0A 293 294 /* APP PWM */ 295 #define BOARD_APP_PWM HPM_PWM0 296 #define BOARD_APP_PWM_CLOCK_NAME clock_mot0 297 #define BOARD_APP_PWM_OUT1 0 298 #define BOARD_APP_PWM_OUT2 1 299 #define BOARD_APP_TRGM HPM_TRGM0 300 301 #define BOARD_CPU_FREQ (480000000UL) 302 303 /* LED */ 304 #define BOARD_LED_GPIO_CTRL HPM_GPIO0 305 #define BOARD_LED_GPIO_INDEX GPIO_DI_GPIOA 306 #define BOARD_LED_GPIO_PIN 7 307 #define BOARD_LED_OFF_LEVEL 1 308 #define BOARD_LED_ON_LEVEL 0 309 310 #ifndef BOARD_SHOW_CLOCK 311 #define BOARD_SHOW_CLOCK 1 312 #endif 313 #ifndef BOARD_SHOW_BANNER 314 #define BOARD_SHOW_BANNER 1 315 #endif 316 317 #if defined(__cplusplus) 318 extern "C" { 319 #endif /* __cplusplus */ 320 321 typedef void (*board_timer_cb)(void); 322 323 void board_init(void); 324 void board_init_console(void); 325 326 void board_init_uart(UART_Type *ptr); 327 void board_init_i2c(I2C_Type *ptr); 328 329 void board_init_can(CAN_Type *ptr); 330 331 uint32_t board_init_dram_clock(void); 332 333 void board_init_sdram_pins(void); 334 void board_init_gpio_pins(void); 335 void board_init_spi_pins(SPI_Type *ptr); 336 void board_init_spi_pins_with_gpio_as_cs(SPI_Type *ptr); 337 void board_write_spi_cs(uint32_t pin, uint8_t state); 338 void board_init_led_pins(void); 339 340 void board_led_write(uint8_t state); 341 void board_led_toggle(void); 342 343 /* Initialize SoC overall clocks */ 344 void board_init_clock(void); 345 346 uint32_t board_init_spi_clock(SPI_Type *ptr); 347 348 uint32_t board_init_adc16_clock(ADC16_Type *ptr); 349 350 uint32_t board_init_dac_clock(DAC_Type *ptr, bool clk_src_ahb); 351 352 void board_init_adc16_pins(void); 353 354 void board_init_dac_pins(DAC_Type *ptr); 355 356 uint32_t board_init_can_clock(CAN_Type *ptr); 357 358 hpm_stat_t board_set_audio_pll_clock(uint32_t freq); 359 uint32_t board_init_i2s_clock(I2S_Type *ptr); 360 uint32_t board_init_pdm_clock(void); 361 uint32_t board_init_dao_clock(void); 362 363 void board_init_sd_pins(SDXC_Type *ptr); 364 uint32_t board_sd_configure_clock(SDXC_Type *ptr, uint32_t freq); 365 void board_sd_switch_pins_to_1v8(SDXC_Type *ptr); 366 bool board_sd_detect_card(SDXC_Type *ptr); 367 368 void board_init_usb_pins(void); 369 void board_usb_vbus_ctrl(uint8_t usb_index, uint8_t level); 370 uint8_t board_get_usb_id_status(void); 371 372 hpm_stat_t board_reset_enet_phy(ENET_Type *ptr); 373 hpm_stat_t board_init_enet_pins(ENET_Type *ptr); 374 hpm_stat_t board_init_enet_rmii_reference_clock(ENET_Type *ptr, bool internal); 375 hpm_stat_t board_init_enet_ptp_clock(ENET_Type *ptr); 376 377 /* 378 * @brief Initialize PMP and PMA for but not limited to the following purposes: 379 * -- non-cacheable memory initialization 380 */ 381 void board_init_pmp(void); 382 383 void board_delay_us(uint32_t us); 384 void board_delay_ms(uint32_t ms); 385 386 void board_timer_create(uint32_t ms, board_timer_cb cb); 387 void board_ungate_mchtmr_at_lp_mode(void); 388 389 /* Initialize the UART clock */ 390 uint32_t board_init_uart_clock(UART_Type *ptr); 391 392 #if defined(__cplusplus) 393 } 394 #endif /* __cplusplus */ 395 #endif /* _HPM_BOARD_H */ 396