1 /*
2 * Copyright (c) 2021 HPMicro
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 *
6 */
7
8 #ifndef HPM_PPOR_DRV_H
9 #define HPM_PPOR_DRV_H
10 #include "hpm_ppor_regs.h"
11
12 typedef enum {
13 ppor_reset_brownout = 1 << 0,
14 ppor_reset_temperature = 1 << 1,
15 ppor_reset_pin = 1 << 2,
16 ppor_reset_debug = 1 << 4,
17 ppor_reset_security_violation = 1 << 5,
18 ppor_reset_jtag = 1 << 6,
19 ppor_reset_cpu0_lockup = 1 << 8,
20 ppor_reset_cpu1_lockup = 1 << 9,
21 ppor_reset_cpu0_request = 1 << 10,
22 ppor_reset_cpu1_request = 1 << 11,
23 ppor_reset_wdog0 = 1 << 16,
24 ppor_reset_wdog1 = 1 << 17,
25 ppor_reset_wdog2 = 1 << 18,
26 ppor_reset_wdog3 = 1 << 19,
27 ppor_reset_pmic_wdog = 1 << 20,
28 ppor_reset_software = 1 << 31,
29 } ppor_reset_source_t;
30
31 #ifdef __cplusplus
32 extern "C" {
33 #endif
34
35 /*
36 * perform software reset in counter * (1/24Mhz) seconds
37 */
ppor_sw_reset(PPOR_Type * ptr,uint32_t counter)38 static inline void ppor_sw_reset(PPOR_Type *ptr, uint32_t counter)
39 {
40 ptr->SOFTWARE_RESET = PPOR_SOFTWARE_RESET_COUNTER_SET(counter); }
41
42 /*
43 * clear enable reset source according to the given mask
44 */
ppor_reset_mask_clear_source_enable(PPOR_Type * ptr,uint32_t mask)45 static inline void ppor_reset_mask_clear_source_enable(PPOR_Type *ptr, uint32_t mask)
46 {
47 ptr->RESET_ENABLE &= ~mask;
48 }
49
50 /*
51 * set enable reset source according to the given mask
52 */
ppor_reset_mask_set_source_enable(PPOR_Type * ptr,uint32_t mask)53 static inline void ppor_reset_mask_set_source_enable(PPOR_Type *ptr, uint32_t mask)
54 {
55 ptr->RESET_ENABLE |= mask;
56 }
57
58 /*
59 * set enable reset source
60 */
ppor_reset_set_source_enable(PPOR_Type * ptr,uint32_t reset_sources)61 static inline void ppor_reset_set_source_enable(PPOR_Type *ptr, uint32_t reset_sources)
62 {
63 ptr->RESET_ENABLE = reset_sources;
64 }
65
66 /*
67 * get enabled reset source
68 */
ppor_reset_get_enabled_source(PPOR_Type * ptr)69 static inline uint32_t ppor_reset_get_enabled_source(PPOR_Type *ptr)
70 {
71 return ptr->RESET_ENABLE;
72 }
73
74 /*
75 * get reset status
76 */
ppor_reset_get_status(PPOR_Type * ptr)77 static inline uint32_t ppor_reset_get_status(PPOR_Type *ptr)
78 {
79 return ptr->RESET_STATUS;
80 }
81
82 /*
83 * get reset flags
84 */
ppor_reset_get_flags(PPOR_Type * ptr)85 static inline uint32_t ppor_reset_get_flags(PPOR_Type *ptr)
86 {
87 return ptr->RESET_FLAG;
88 }
89
90 /*
91 * clear reset flags
92 */
ppor_reset_clear_flags(PPOR_Type * ptr,uint32_t mask)93 static inline void ppor_reset_clear_flags(PPOR_Type *ptr, uint32_t mask)
94 {
95 ptr->RESET_FLAG |= mask;
96 }
97
98 /*
99 * set cold reset
100 */
ppor_reset_set_cold_reset_enable(PPOR_Type * ptr,uint32_t mask)101 static inline void ppor_reset_set_cold_reset_enable(PPOR_Type *ptr, uint32_t mask)
102 {
103 ptr->RESET_COLD = mask;
104 }
105
106 /*
107 * clear cold reset
108 */
ppor_reset_clear_cold_reset_enable(PPOR_Type * ptr,uint32_t mask)109 static inline void ppor_reset_clear_cold_reset_enable(PPOR_Type *ptr, uint32_t mask)
110 {
111 ptr->RESET_COLD &= ~mask;
112 }
113
114 /*
115 * set hot reset
116 */
ppor_reset_set_hot_reset_enable(PPOR_Type * ptr,uint32_t mask)117 static inline void ppor_reset_set_hot_reset_enable(PPOR_Type *ptr, uint32_t mask)
118 {
119 ptr->RESET_HOT = mask;
120 }
121
122 /*
123 * clear hot reset
124 */
ppor_reset_clear_hot_reset_enable(PPOR_Type * ptr,uint32_t mask)125 static inline void ppor_reset_clear_hot_reset_enable(PPOR_Type *ptr, uint32_t mask)
126 {
127 ptr->RESET_HOT &= ~mask;
128 }
129
130 #ifdef __cplusplus
131 }
132 #endif
133 #endif
134