1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2018 Rockchip Electronics Co., Ltd. 4 */ 5 #ifndef H_ROCKCHIP_PCIE_DMA_H 6 #define H_ROCKCHIP_PCIE_DMA_H 7 8 #include <linux/debugfs.h> 9 10 #define PCIE_DMA_TABLE_NUM 24 11 12 #define PCIE_DMA_TRX_TYPE_NUM 3 13 14 #define PCIE_DMA_CHN0 0x0 15 #define PORT_LINK_LPBK_ENABLE BIT(2) 16 #define PCIE_DMA_DATA_SND_TABLE_OFFSET 0x0 17 #define PCIE_DMA_DATA_RCV_ACK_TABLE_OFFSET 0x8 18 #define PCIE_DMA_DATA_FREE_ACK_TABLE_OFFSET 0x10 19 20 enum dma_dir { 21 DMA_FROM_BUS, 22 DMA_TO_BUS, 23 }; 24 25 /** 26 * The Channel Control Register for read and write. 27 */ 28 union chan_ctrl_lo { 29 struct { 30 u32 cb : 1; // 0 31 u32 tcb : 1; // 1 32 u32 llp : 1; // 2 33 u32 lie : 1; // 3 34 u32 rie : 1; // 4 35 u32 cs : 2; // 5:6 36 u32 rsvd1 : 1; // 7 37 u32 ccs : 1; // 8 38 u32 llen : 1; // 9 39 u32 b_64s : 1; // 10 40 u32 b_64d : 1; // 11 41 u32 pf : 5; // 12:16 42 u32 rsvd2 : 7; // 17:23 43 u32 sn : 1; // 24 44 u32 ro : 1; // 25 45 u32 td : 1; // 26 46 u32 tc : 3; // 27:29 47 u32 at : 2; // 30:31 48 }; 49 u32 asdword; 50 }; 51 52 /** 53 * The Channel Control Register high part for read and write. 54 */ 55 union chan_ctrl_hi { 56 struct { 57 u32 vfenb : 1; // 0 58 u32 vfunc : 8; // 1-8 59 u32 rsvd0 : 23; // 9-31 60 }; 61 u32 asdword; 62 }; 63 64 /** 65 * The Channel Weight Register. 66 */ 67 union weight { 68 struct { 69 u32 weight0 : 5; // 0:4 70 u32 weight1 : 5; // 5:9 71 u32 weight2 : 5; // 10:14 72 u32 weight3 : 5; // 15:19 73 u32 rsvd : 12; // 20:31 74 }; 75 u32 asdword; 76 }; 77 78 /** 79 * The Doorbell Register for read and write. 80 */ 81 union db { 82 struct { 83 u32 chnl : 3; // 0 84 u32 reserved0 : 28; // 3:30 85 u32 stop : 1; // 31 86 }; 87 u32 asdword; 88 }; 89 90 /** 91 * The Context Registers for read and write. 92 */ 93 struct ctx_regs { 94 union chan_ctrl_lo ctrllo; 95 union chan_ctrl_hi ctrlhi; 96 u32 xfersize; 97 u32 sarptrlo; 98 u32 sarptrhi; 99 u32 darptrlo; 100 u32 darptrhi; 101 }; 102 103 /** 104 * The Enable Register for read and write. 105 */ 106 union enb { 107 struct { 108 u32 enb : 1; // 0 109 u32 reserved0 : 31; // 1:31 110 }; 111 u32 asdword; 112 }; 113 114 /** 115 * The Interrupt Status Register for read and write. 116 */ 117 union int_status { 118 struct { 119 u32 donesta : 8; 120 u32 rsvd0 : 8; 121 u32 abortsta : 8; 122 u32 rsvd1 : 8; 123 }; 124 u32 asdword; 125 }; 126 127 /** 128 * The Interrupt Clear Register for read and write. 129 */ 130 union int_clear { 131 struct { 132 u32 doneclr : 8; 133 u32 rsvd0 : 8; 134 u32 abortclr : 8; 135 u32 rsvd1 : 8; 136 }; 137 u32 asdword; 138 }; 139 140 struct dma_table { 141 u32 *descs; 142 int chn; 143 phys_addr_t phys_descs; 144 u32 dir; 145 u32 type; 146 struct list_head tbl_node; 147 union enb wr_enb; 148 struct ctx_regs ctx_reg; 149 union weight wr_weilo; 150 union weight wr_weihi; 151 union db start; 152 phys_addr_t local; 153 phys_addr_t bus; 154 size_t buf_size; 155 }; 156 157 struct dma_trx_obj { 158 struct device *dev; 159 int loop_count; 160 int loop_count_threshold; 161 void *mem_base; 162 phys_addr_t mem_start; 163 size_t mem_size; 164 int dma_free; 165 unsigned long local_write_available; 166 unsigned long local_read_available; 167 unsigned long remote_write_available; 168 spinlock_t tbl_list_lock; /* lock dma table */ 169 struct list_head tbl_list; 170 struct work_struct dma_trx_work; 171 wait_queue_head_t event_queue; 172 struct workqueue_struct *dma_trx_wq; 173 struct dma_table *table[PCIE_DMA_TABLE_NUM]; 174 struct dma_table *cur; 175 struct task_struct *scan_thread; 176 struct hrtimer scan_timer; 177 int busno; 178 void *priv; 179 struct completion done; 180 int ref_count; 181 struct mutex count_mutex; 182 unsigned long irq_num; 183 struct dentry *pcie_root; 184 struct pcie_misc_dev *pcie_dev; 185 void (*start_dma_func)(struct dma_trx_obj *obj); 186 void (*config_dma_func)(struct dma_table *table); 187 }; 188 189 #ifdef CONFIG_ROCKCHIP_PCIE_DMA_OBJ 190 struct dma_trx_obj *rk_pcie_dma_obj_probe(struct device *dev); 191 void rk_pcie_dma_obj_remove(struct dma_trx_obj *obj); 192 #else rk_pcie_dma_obj_probe(struct device * dev)193static inline struct dma_trx_obj *rk_pcie_dma_obj_probe(struct device *dev) 194 { 195 return NULL; 196 } 197 rk_pcie_dma_obj_remove(struct dma_trx_obj * obj)198static inline void rk_pcie_dma_obj_remove(struct dma_trx_obj *obj) 199 { 200 } 201 #endif 202 203 #endif 204