1 /* 2 * Copyright (C) 2016 Rockchip Electronics Co., Ltd. 3 * Authors: 4 * Zhiqin Wei <wzq@rock-chips.com> 5 * 6 * Licensed under the Apache License, Version 2.0 (the "License"); 7 * you may not use this file except in compliance with the License. 8 * You may obtain a copy of the License at 9 * 10 * http://www.apache.org/licenses/LICENSE-2.0 11 * 12 * Unless required by applicable law or agreed to in writing, software 13 * distributed under the License is distributed on an "AS IS" BASIS, 14 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 * See the License for the specific language governing permissions and 16 * limitations under the License. 17 */ 18 19 #ifndef RGA_DRIVER_H 20 #define RGA_DRIVER_H 21 #include <stdint.h> 22 #ifdef __cplusplus 23 extern "C" 24 { 25 #endif 26 27 #define RGA_BLIT_SYNC 0x5017 28 #define RGA_BLIT_ASYNC 0x5018 29 #define RGA_FLUSH 0x5019 30 #define RGA_GET_RESULT 0x501a 31 #define RGA_GET_VERSION 0x501b 32 33 #define RGA2_BLIT_SYNC 0x6017 34 #define RGA2_BLIT_ASYNC 0x6018 35 #define RGA2_FLUSH 0x6019 36 #define RGA2_GET_RESULT 0x601a 37 #define RGA2_GET_VERSION 0x601b 38 #define RGA2_GET_VERSION 0x601b 39 40 #define RGA_REG_CTRL_LEN 0x8 /* 8 */ 41 #define RGA_REG_CMD_LEN 0x1c /* 28 */ 42 #define RGA_CMD_BUF_SIZE 0x700 /* 16*28*4 */ 43 44 #ifndef ENABLE 45 #define ENABLE 1 46 #endif 47 48 #ifndef DISABLE 49 #define DISABLE 0 50 #endif 51 52 /* RGA process mode enum */ 53 enum { 54 bitblt_mode = 0x0, 55 color_palette_mode = 0x1, 56 color_fill_mode = 0x2, 57 line_point_drawing_mode = 0x3, 58 blur_sharp_filter_mode = 0x4, 59 pre_scaling_mode = 0x5, 60 update_palette_table_mode = 0x6, 61 update_patten_buff_mode = 0x7, 62 }; 63 64 enum { 65 rop_enable_mask = 0x2, 66 dither_enable_mask = 0x8, 67 fading_enable_mask = 0x10, 68 PD_enbale_mask = 0x20, 69 }; 70 71 enum { 72 yuv2rgb_mode0 = 0x0, /* BT.601 MPEG */ 73 yuv2rgb_mode1 = 0x1, /* BT.601 JPEG */ 74 yuv2rgb_mode2 = 0x2, /* BT.709 */ 75 76 rgb2yuv_601_full = 0x1 << 8, 77 rgb2yuv_709_full = 0x2 << 8, 78 yuv2yuv_601_limit_2_709_limit = 0x3 << 8, 79 yuv2yuv_601_limit_2_709_full = 0x4 << 8, 80 yuv2yuv_709_limit_2_601_limit = 0x5 << 8, 81 yuv2yuv_709_limit_2_601_full = 0x6 << 8, // not support 82 yuv2yuv_601_full_2_709_limit = 0x7 << 8, 83 yuv2yuv_601_full_2_709_full = 0x8 << 8, // not support 84 yuv2yuv_709_full_2_601_limit = 0x9 << 8, // not support 85 yuv2yuv_709_full_2_601_full = 0xa << 8, // not support 86 full_csc_mask = 0xf00, 87 }; 88 89 /* RGA rotate mode */ 90 enum { 91 rotate_mode0 = 0x0, /* no rotate */ 92 rotate_mode1 = 0x1, /* rotate */ 93 rotate_mode2 = 0x2, /* x_mirror */ 94 rotate_mode3 = 0x3, /* y_mirror */ 95 }; 96 97 enum { 98 color_palette_mode0 = 0x0, /* 1K */ 99 color_palette_mode1 = 0x1, /* 2K */ 100 color_palette_mode2 = 0x2, /* 4K */ 101 color_palette_mode3 = 0x3, /* 8K */ 102 }; 103 104 enum { 105 BB_BYPASS = 0x0, /* no rotate */ 106 BB_ROTATE = 0x1, /* rotate */ 107 BB_X_MIRROR = 0x2, /* x_mirror */ 108 BB_Y_MIRROR = 0x3 /* y_mirror */ 109 }; 110 111 enum { 112 nearby = 0x0, /* no rotate */ 113 bilinear = 0x1, /* rotate */ 114 bicubic = 0x2, /* x_mirror */ 115 }; 116 117 /* 118 // Alpha Red Green Blue 119 { 4, 32, {{32,24, 8, 0, 16, 8, 24,16 }}, GGL_RGBA }, // RK_FORMAT_RGBA_8888 120 { 4, 24, {{ 0, 0, 8, 0, 16, 8, 24,16 }}, GGL_RGB }, // RK_FORMAT_RGBX_8888 121 { 3, 24, {{ 0, 0, 8, 0, 16, 8, 24,16 }}, GGL_RGB }, // RK_FORMAT_RGB_888 122 { 4, 32, {{32,24, 24,16, 16, 8, 8, 0 }}, GGL_BGRA }, // RK_FORMAT_BGRA_8888 123 { 2, 16, {{ 0, 0, 16,11, 11, 5, 5, 0 }}, GGL_RGB }, // RK_FORMAT_RGB_565 124 { 2, 16, {{ 1, 0, 16,11, 11, 6, 6, 1 }}, GGL_RGBA }, // RK_FORMAT_RGBA_5551 125 { 2, 16, {{ 4, 0, 16,12, 12, 8, 8, 4 }}, GGL_RGBA }, // RK_FORMAT_RGBA_4444 126 { 3, 24, {{ 0, 0, 24,16, 16, 8, 8, 0 }}, GGL_BGR }, // RK_FORMAT_BGB_888 127 128 */ 129 /* In order to be compatible with RK_FORMAT_XX and HAL_PIXEL_FORMAT_XX, 130 * RK_FORMAT_XX is shifted to the left by 8 bits to distinguish. */ 131 typedef enum _Rga_SURF_FORMAT { 132 RK_FORMAT_RGBA_8888 = 0x0 << 8, 133 RK_FORMAT_RGBX_8888 = 0x1 << 8, 134 RK_FORMAT_RGB_888 = 0x2 << 8, 135 RK_FORMAT_BGRA_8888 = 0x3 << 8, 136 RK_FORMAT_RGB_565 = 0x4 << 8, 137 RK_FORMAT_RGBA_5551 = 0x5 << 8, 138 RK_FORMAT_RGBA_4444 = 0x6 << 8, 139 RK_FORMAT_BGR_888 = 0x7 << 8, 140 141 RK_FORMAT_YCbCr_422_SP = 0x8 << 8, 142 RK_FORMAT_YCbCr_422_P = 0x9 << 8, 143 RK_FORMAT_YCbCr_420_SP = 0xa << 8, 144 RK_FORMAT_YCbCr_420_P = 0xb << 8, 145 146 RK_FORMAT_YCrCb_422_SP = 0xc << 8, 147 RK_FORMAT_YCrCb_422_P = 0xd << 8, 148 RK_FORMAT_YCrCb_420_SP = 0xe << 8, 149 RK_FORMAT_YCrCb_420_P = 0xf << 8, 150 151 RK_FORMAT_BPP1 = 0x10 << 8, 152 RK_FORMAT_BPP2 = 0x11 << 8, 153 RK_FORMAT_BPP4 = 0x12 << 8, 154 RK_FORMAT_BPP8 = 0x13 << 8, 155 156 RK_FORMAT_Y4 = 0x14 << 8, 157 RK_FORMAT_YCbCr_400 = 0x15 << 8, 158 159 RK_FORMAT_BGRX_8888 = 0x16 << 8, 160 161 RK_FORMAT_YVYU_422 = 0x18 << 8, 162 RK_FORMAT_YVYU_420 = 0x19 << 8, 163 RK_FORMAT_VYUY_422 = 0x1a << 8, 164 RK_FORMAT_VYUY_420 = 0x1b << 8, 165 RK_FORMAT_YUYV_422 = 0x1c << 8, 166 RK_FORMAT_YUYV_420 = 0x1d << 8, 167 RK_FORMAT_UYVY_422 = 0x1e << 8, 168 RK_FORMAT_UYVY_420 = 0x1f << 8, 169 170 RK_FORMAT_YCbCr_420_SP_10B = 0x20 << 8, 171 RK_FORMAT_YCrCb_420_SP_10B = 0x21 << 8, 172 RK_FORMAT_YCbCr_422_10b_SP = 0x22 << 8, 173 RK_FORMAT_YCrCb_422_10b_SP = 0x23 << 8, 174 175 RK_FORMAT_BGR_565 = 0x24 << 8, 176 RK_FORMAT_BGRA_5551 = 0x25 << 8, 177 RK_FORMAT_BGRA_4444 = 0x26 << 8, 178 RK_FORMAT_UNKNOWN = 0x100 << 8, 179 } RgaSURF_FORMAT; 180 181 typedef struct rga_img_info_t { 182 #if defined(__arm64__) || defined(__aarch64__) 183 unsigned long yrgb_addr; /* yrgb mem addr */ 184 unsigned long uv_addr; /* cb/cr mem addr */ 185 unsigned long v_addr; /* cr mem addr */ 186 #else 187 unsigned int yrgb_addr; /* yrgb mem addr */ 188 unsigned int uv_addr; /* cb/cr mem addr */ 189 unsigned int v_addr; /* cr mem addr */ 190 #endif 191 unsigned int format; // definition by RK_FORMAT 192 unsigned short act_w; 193 unsigned short act_h; 194 unsigned short x_offset; 195 unsigned short y_offset; 196 197 unsigned short vir_w; 198 unsigned short vir_h; 199 200 unsigned short endian_mode; // for BPP 201 unsigned short alpha_swap; 202 } 203 rga_img_info_t; 204 205 typedef struct mdp_img_act { 206 unsigned short w; // width 207 unsigned short h; // height 208 short x_off; // x offset for the vir 209 short y_off; // y offset for the vir 210 } 211 mdp_img_act; 212 213 typedef struct RANGE { 214 unsigned short min; 215 unsigned short max; 216 } 217 RANGE; 218 219 typedef struct POINT { 220 unsigned short x; 221 unsigned short y; 222 } 223 POINT; 224 225 typedef struct RECT { 226 unsigned short xmin; 227 unsigned short xmax; // width - 1 228 unsigned short ymin; 229 unsigned short ymax; // height - 1 230 } RECT; 231 232 typedef struct RGB { 233 unsigned char r; 234 unsigned char g; 235 unsigned char b; 236 unsigned char res; 237 }RGB; 238 239 typedef struct MMU { 240 unsigned char mmu_en; 241 #if defined(__arm64__) || defined(__aarch64__) 242 unsigned long base_addr; 243 #else 244 unsigned int base_addr; 245 #endif 246 unsigned int mmu_flag; /* [0] mmu enable [1] src_flush [2] dst_flush [3] CMD_flush [4~5] page size */ 247 } MMU; 248 249 typedef struct COLOR_FILL { 250 short gr_x_a; 251 short gr_y_a; 252 short gr_x_b; 253 short gr_y_b; 254 short gr_x_g; 255 short gr_y_g; 256 short gr_x_r; 257 short gr_y_r; 258 } 259 COLOR_FILL; 260 261 typedef struct FADING { 262 unsigned char b; 263 unsigned char g; 264 unsigned char r; 265 unsigned char res; 266 } 267 FADING; 268 269 typedef struct line_draw_t { 270 POINT start_point; /* LineDraw_start_point */ 271 POINT end_point; /* LineDraw_end_point */ 272 unsigned int color; /* LineDraw_color */ 273 unsigned int flag; /* (enum) LineDrawing mode sel */ 274 unsigned int line_width; /* range 1~16 */ 275 } 276 line_draw_t; 277 278 /* color space convert coefficient. */ 279 typedef struct csc_coe_t { 280 int16_t r_v; 281 int16_t g_y; 282 int16_t b_u; 283 int32_t off; 284 } csc_coe_t; 285 286 typedef struct full_csc_t { 287 unsigned char flag; 288 csc_coe_t coe_y; 289 csc_coe_t coe_u; 290 csc_coe_t coe_v; 291 } full_csc_t; 292 293 struct rga_req { 294 unsigned char render_mode; /* (enum) process mode sel */ 295 296 rga_img_info_t src; /* src image info */ 297 rga_img_info_t dst; /* dst image info */ 298 rga_img_info_t pat; /* patten image info */ 299 300 #if defined(__arm64__) || defined(__aarch64__) 301 unsigned long rop_mask_addr; /* rop4 mask addr */ 302 unsigned long LUT_addr; /* LUT addr */ 303 #else 304 unsigned int rop_mask_addr; /* rop4 mask addr */ 305 unsigned int LUT_addr; /* LUT addr */ 306 #endif 307 308 RECT clip; /* dst clip window default value is dst_vir */ 309 /* value from [0, w-1] / [0, h-1] */ 310 311 int sina; /* dst angle default value 0 16.16 scan from table */ 312 int cosa; /* dst angle default value 0 16.16 scan from table */ 313 314 unsigned short alpha_rop_flag; /* alpha rop process flag */ 315 /* ([0] = 1 alpha_rop_enable) */ 316 /* ([1] = 1 rop enable) */ 317 /* ([2] = 1 fading_enable) */ 318 /* ([3] = 1 PD_enable) */ 319 /* ([4] = 1 alpha cal_mode_sel) */ 320 /* ([5] = 1 dither_enable) */ 321 /* ([6] = 1 gradient fill mode sel) */ 322 /* ([7] = 1 AA_enable) */ 323 /* ([8] = 1 nn_quantize) */ 324 /* ([9] = 1 Real color mode) */ 325 326 unsigned char scale_mode; /* 0 nearst / 1 bilnear / 2 bicubic */ 327 328 unsigned int color_key_max; /* color key max */ 329 unsigned int color_key_min; /* color key min */ 330 331 unsigned int fg_color; /* foreground color */ 332 unsigned int bg_color; /* background color */ 333 334 COLOR_FILL gr_color; /* color fill use gradient */ 335 336 line_draw_t line_draw_info; 337 338 FADING fading; 339 340 unsigned char PD_mode; /* porter duff alpha mode sel */ 341 342 unsigned char alpha_global_value; /* global alpha value */ 343 344 unsigned short rop_code; /* rop2/3/4 code scan from rop code table */ 345 346 unsigned char bsfilter_flag; /* [2] 0 blur 1 sharp / [1:0] filter_type */ 347 348 unsigned char palette_mode; /* (enum) color palatte 0/1bpp, 1/2bpp 2/4bpp 3/8bpp */ 349 350 unsigned char yuv2rgb_mode; /* (enum) BT.601 MPEG / BT.601 JPEG / BT.709 */ 351 352 unsigned char endian_mode; /* 0/big endian 1/little endian */ 353 354 unsigned char rotate_mode; /* (enum) rotate mode */ 355 /* 0x0, no rotate */ 356 /* 0x1, rotate */ 357 /* 0x2, x_mirror */ 358 /* 0x3, y_mirror */ 359 360 unsigned char color_fill_mode; /* 0 solid color / 1 patten color */ 361 362 MMU mmu_info; /* mmu information */ 363 364 unsigned char alpha_rop_mode; /* ([0~1] alpha mode) */ 365 /* ([2~3] rop mode) */ 366 /* ([4] zero mode en) */ 367 /* ([5] dst alpha mode) (RGA1) */ 368 369 unsigned char src_trans_mode; 370 371 unsigned char dither_mode; 372 373 full_csc_t full_csc; /* full color space convert */ 374 375 unsigned char CMD_fin_int_enable; 376 377 /* completion is reported through a callback */ 378 void (*complete)(int retval); 379 }; 380 381 int RGA_set_src_act_info( 382 struct rga_req *req, 383 unsigned int width, /* act width */ 384 unsigned int height, /* act height */ 385 unsigned int x_off, /* x_off */ 386 unsigned int y_off /* y_off */ 387 ); 388 389 #if defined(__arm64__) || defined(__aarch64__) 390 int RGA_set_src_vir_info( 391 struct rga_req *req, 392 unsigned long yrgb_addr, /* yrgb_addr */ 393 unsigned long uv_addr, /* uv_addr */ 394 unsigned long v_addr, /* v_addr */ 395 unsigned int vir_w, /* vir width */ 396 unsigned int vir_h, /* vir height */ 397 unsigned char format, /* format */ 398 unsigned char a_swap_en /* only for 32bit RGB888 format */ 399 ); 400 #else 401 int RGA_set_src_vir_info( 402 struct rga_req *req, 403 unsigned int yrgb_addr, /* yrgb_addr */ 404 unsigned int uv_addr, /* uv_addr */ 405 unsigned int v_addr, /* v_addr */ 406 unsigned int vir_w, /* vir width */ 407 unsigned int vir_h, /* vir height */ 408 unsigned char format, /* format */ 409 unsigned char a_swap_en /* only for 32bit RGB888 format */ 410 ); 411 #endif 412 413 int RGA_set_dst_act_info( 414 struct rga_req *req, 415 unsigned int width, /* act width */ 416 unsigned int height, /* act height */ 417 unsigned int x_off, /* x_off */ 418 unsigned int y_off /* y_off */ 419 ); 420 421 #if defined(__arm64__) || defined(__aarch64__) 422 int RGA_set_dst_vir_info( 423 struct rga_req *msg, 424 unsigned long yrgb_addr, /* yrgb_addr */ 425 unsigned long uv_addr, /* uv_addr */ 426 unsigned long v_addr, /* v_addr */ 427 unsigned int vir_w, /* vir width */ 428 unsigned int vir_h, /* vir height */ 429 RECT *clip, /* clip window */ 430 unsigned char format, /* format */ 431 unsigned char a_swap_en 432 ); 433 #else 434 int RGA_set_dst_vir_info( 435 struct rga_req *msg, 436 unsigned int yrgb_addr, /* yrgb_addr */ 437 unsigned int uv_addr, /* uv_addr */ 438 unsigned int v_addr, /* v_addr */ 439 unsigned int vir_w, /* vir width */ 440 unsigned int vir_h, /* vir height */ 441 RECT *clip, /* clip window */ 442 unsigned char format, /* format */ 443 unsigned char a_swap_en 444 ); 445 #endif 446 447 int RGA_set_pat_info( 448 struct rga_req *msg, 449 unsigned int width, 450 unsigned int height, 451 unsigned int x_off, 452 unsigned int y_off, 453 unsigned int pat_format 454 ); 455 456 #if defined(__arm64__) || defined(__aarch64__) 457 int RGA_set_rop_mask_info( 458 struct rga_req *msg, 459 unsigned long rop_mask_addr, 460 unsigned int rop_mask_endian_mode 461 ); 462 #else 463 int RGA_set_rop_mask_info( 464 struct rga_req *msg, 465 unsigned int rop_mask_addr, 466 unsigned int rop_mask_endian_mode 467 ); 468 #endif 469 470 int RGA_set_alpha_en_info( 471 struct rga_req *msg, 472 unsigned int alpha_cal_mode, /* 0:alpha' = alpha + (alpha>>7) | alpha' = alpha */ 473 unsigned int alpha_mode, /* 0 global alpha / 1 per pixel alpha / 2 mix mode */ 474 unsigned int global_a_value, 475 unsigned int PD_en, /* porter duff alpha mode en */ 476 unsigned int PD_mode, 477 unsigned int dst_alpha_en); /* use dst alpha */ 478 479 int RGA_set_rop_en_info( 480 struct rga_req *msg, 481 unsigned int ROP_mode, 482 unsigned int ROP_code, 483 unsigned int color_mode, 484 unsigned int solid_color 485 ); 486 487 int RGA_set_fading_en_info( 488 struct rga_req *msg, 489 unsigned char r, 490 unsigned char g, 491 unsigned char b 492 ); 493 494 int RGA_set_src_trans_mode_info( 495 struct rga_req *msg, 496 unsigned char trans_mode, 497 unsigned char a_en, 498 unsigned char b_en, 499 unsigned char g_en, 500 unsigned char r_en, 501 unsigned char color_key_min, 502 unsigned char color_key_max, 503 unsigned char zero_mode_en 504 ); 505 506 int RGA_set_bitblt_mode( 507 struct rga_req *msg, 508 unsigned char scale_mode, // 0/near 1/bilnear 2/bicubic 509 unsigned char rotate_mode, // 0/copy 1/rotate_scale 2/x_mirror 3/y_mirror 510 unsigned int angle, // rotate angle 511 unsigned int dither_en, // dither en flag 512 unsigned int AA_en, // AA flag 513 unsigned int yuv2rgb_mode 514 ); 515 516 int RGA_set_color_palette_mode( 517 struct rga_req *msg, 518 unsigned char palette_mode, /* 1bpp/2bpp/4bpp/8bpp */ 519 unsigned char endian_mode, /* src endian mode sel */ 520 unsigned int bpp1_0_color, /* BPP1 = 0 */ 521 unsigned int bpp1_1_color /* BPP1 = 1 */ 522 ); 523 524 int RGA_set_color_fill_mode( 525 struct rga_req *msg, 526 COLOR_FILL *gr_color, /* gradient color part */ 527 unsigned char gr_satur_mode, /* saturation mode */ 528 unsigned char cf_mode, /* patten fill or solid fill */ 529 unsigned int color, /* solid color */ 530 unsigned short pat_width, /* pattern width */ 531 unsigned short pat_height, /* pattern height */ 532 unsigned char pat_x_off, /* pattern x offset */ 533 unsigned char pat_y_off, /* pattern y offset */ 534 unsigned char aa_en /* alpha en */ 535 ); 536 537 int RGA_set_line_point_drawing_mode( 538 struct rga_req *msg, 539 POINT sp, /* start point */ 540 POINT ep, /* end point */ 541 unsigned int color, /* line point drawing color */ 542 unsigned int line_width, /* line width */ 543 unsigned char AA_en, /* AA en */ 544 unsigned char last_point_en /* last point en */ 545 ); 546 547 int RGA_set_blur_sharp_filter_mode( 548 struct rga_req *msg, 549 unsigned char filter_mode, /* blur/sharpness */ 550 unsigned char filter_type, /* filter intensity */ 551 unsigned char dither_en /* dither_en flag */ 552 ); 553 554 int RGA_set_pre_scaling_mode( 555 struct rga_req *msg, 556 unsigned char dither_en 557 ); 558 559 #if defined(__arm64__) || defined(__aarch64__) 560 int RGA_update_palette_table_mode( 561 struct rga_req *msg, 562 unsigned long LUT_addr, /* LUT table addr */ 563 unsigned int palette_mode /* 1bpp/2bpp/4bpp/8bpp */ 564 ); 565 #else 566 int RGA_update_palette_table_mode( 567 struct rga_req *msg, 568 unsigned int LUT_addr, /* LUT table addr */ 569 unsigned int palette_mode /* 1bpp/2bpp/4bpp/8bpp */ 570 ); 571 #endif 572 573 int RGA_set_update_patten_buff_mode( 574 struct rga_req *msg, 575 unsigned int pat_addr, /* patten addr */ 576 unsigned int w, /* patten width */ 577 unsigned int h, /* patten height */ 578 unsigned int format /* patten format */ 579 ); 580 581 #if defined(__arm64__) || defined(__aarch64__) 582 int RGA_set_mmu_info( 583 struct rga_req *msg, 584 unsigned char mmu_en, 585 unsigned char src_flush, 586 unsigned char dst_flush, 587 unsigned char cmd_flush, 588 unsigned long base_addr, 589 unsigned char page_size 590 ); 591 #else 592 int RGA_set_mmu_info( 593 struct rga_req *msg, 594 unsigned char mmu_en, 595 unsigned char src_flush, 596 unsigned char dst_flush, 597 unsigned char cmd_flush, 598 unsigned int base_addr, 599 unsigned char page_size 600 ); 601 #endif 602 603 void rga_set_fds_offsets( 604 struct rga_req *rga_request, 605 unsigned short src_fd, 606 unsigned short dst_fd, 607 unsigned int src_offset, 608 unsigned int dst_offset); 609 610 int RGA_set_src_fence_flag( 611 struct rga_req *msg, 612 int acq_fence, 613 int src_flag 614 ); 615 616 int RGA_set_dst_fence_flag( 617 struct rga_req *msg, 618 int dst_flag 619 ); 620 621 int RGA_get_dst_fence( 622 struct rga_req *msg 623 ); 624 #ifdef __cplusplus 625 } 626 #endif 627 628 #endif /* _RK29_IPP_DRIVER_H_ */ 629