1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 ################################################################################ 4 # 5 # r8168 is the Linux device driver released for Realtek Gigabit Ethernet 6 # controllers with PCI-Express interface. 7 # 8 # Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved. 9 # 10 # This program is free software; you can redistribute it and/or modify it 11 # under the terms of the GNU General Public License as published by the Free 12 # Software Foundation; either version 2 of the License, or (at your option) 13 # any later version. 14 # 15 # This program is distributed in the hope that it will be useful, but WITHOUT 16 # ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 17 # FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 18 # more details. 19 # 20 # You should have received a copy of the GNU General Public License along with 21 # this program; if not, see <http://www.gnu.org/licenses/>. 22 # 23 # Author: 24 # Realtek NIC software team <nicfae@realtek.com> 25 # No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan 26 # 27 ################################################################################ 28 */ 29 30 /************************************************************************************ 31 * This product is covered by one or more of the following patents: 32 * US6,570,884, US6,115,776, and US6,327,625. 33 ***********************************************************************************/ 34 35 #ifndef _LINUX_R8168_DASH_H 36 #define _LINUX_R8168_DASH_H 37 38 #define SIOCDEVPRIVATE_RTLDASH SIOCDEVPRIVATE+2 39 40 enum rtl_dash_cmd { 41 RTL_DASH_ARP_NS_OFFLOAD = 0, 42 RTL_DASH_SET_OOB_IPMAC, 43 RTL_DASH_NOTIFY_OOB, 44 45 RTL_DASH_SEND_BUFFER_DATA_TO_DASH_FW, 46 RTL_DASH_CHECK_SEND_BUFFER_TO_DASH_FW_COMPLETE, 47 RTL_DASH_GET_RCV_FROM_FW_BUFFER_DATA, 48 RTL_DASH_OOB_REQ, 49 RTL_DASH_OOB_ACK, 50 RTL_DASH_DETACH_OOB_REQ, 51 RTL_DASH_DETACH_OOB_ACK, 52 53 RTL_FW_SET_IPV4 = 0x10, 54 RTL_FW_GET_IPV4, 55 RTL_FW_SET_IPV6, 56 RTL_FW_GET_IPV6, 57 RTL_FW_SET_EXT_SNMP, 58 RTL_FW_GET_EXT_SNMP, 59 RTL_FW_SET_WAKEUP_PATTERN, 60 RTL_FW_GET_WAKEUP_PATTERN, 61 RTL_FW_DEL_WAKEUP_PATTERN, 62 63 RTLT_DASH_COMMAND_INVALID, 64 }; 65 66 struct rtl_dash_ip_mac { 67 struct sockaddr ifru_addr; 68 struct sockaddr ifru_netmask; 69 struct sockaddr ifru_hwaddr; 70 }; 71 72 struct rtl_dash_ioctl_struct { 73 __u32 cmd; 74 __u32 offset; 75 __u32 len; 76 union { 77 __u32 data; 78 void *data_buffer; 79 }; 80 }; 81 82 struct settings_ipv4 { 83 __u32 IPv4addr; 84 __u32 IPv4mask; 85 __u32 IPv4Gateway; 86 }; 87 88 struct settings_ipv6 { 89 __u32 reserved; 90 __u32 prefixLen; 91 __u16 IPv6addr[8]; 92 __u16 IPv6Gateway[8]; 93 }; 94 95 struct settings_ext_snmp { 96 __u16 index; 97 __u16 oid_get_len; 98 __u8 oid_for_get[24]; 99 __u8 reserved0[26]; 100 __u16 value_len; 101 __u8 value[256]; 102 __u8 supported; 103 __u8 reserved1[27]; 104 }; 105 106 struct wakeup_pattern { 107 __u8 index; 108 __u8 valid; 109 __u8 start; 110 __u8 length; 111 __u8 name[36]; 112 __u8 mask[16]; 113 __u8 pattern[128]; 114 __u32 reserved[2]; 115 }; 116 117 typedef struct _RX_DASH_FROM_FW_DESC { 118 __le16 length; 119 __le16 status; 120 __le32 resv; 121 __le64 BufferAddress; 122 } 123 RX_DASH_FROM_FW_DESC, *PRX_DASH_FROM_FW_DESC; 124 125 typedef struct _TX_DASH_SEND_FW_DESC { 126 __le16 length; 127 __le16 status; 128 __le32 resv; 129 __le64 BufferAddress; 130 } 131 TX_DASH_SEND_FW_DESC, *PTX_DASH_SEND_FW_DESC; 132 133 typedef struct _OSOOBHdr { 134 __le32 len; 135 u8 type; 136 u8 flag; 137 u8 hostReqV; 138 u8 res; 139 } 140 OSOOBHdr, *POSOOBHdr; 141 142 typedef struct _RX_DASH_BUFFER_TYPE_2 { 143 OSOOBHdr oobhdr; 144 u8 RxDataBuffer[0]; 145 } 146 RX_DASH_BUFFER_TYPE_2, *PRX_DASH_BUFFER_TYPE_2; 147 148 #define ALIGN_8 (0x7) 149 #define ALIGN_16 (0xf) 150 #define ALIGN_32 (0x1f) 151 #define ALIGN_64 (0x3f) 152 #define ALIGN_256 (0xff) 153 #define ALIGN_4096 (0xfff) 154 155 #define OCP_REG_CONFIG0 (0x10) 156 #define OCP_REG_CONFIG0_REV_F (0xB8) 157 #define OCP_REG_DASH_POLL (0x30) 158 #define OCP_REG_HOST_REQ (0x34) 159 #define OCP_REG_DASH_REQ (0x35) 160 #define OCP_REG_CR (0x36) 161 #define OCP_REG_DMEMSTA (0x38) 162 #define OCP_REG_GPHYAR (0x60) 163 164 165 #define OCP_REG_CONFIG0_DASHEN BIT_15 166 #define OCP_REG_CONFIG0_OOBRESET BIT_14 167 #define OCP_REG_CONFIG0_APRDY BIT_13 168 #define OCP_REG_CONFIG0_FIRMWARERDY BIT_12 169 #define OCP_REG_CONFIG0_DRIVERRDY BIT_11 170 #define OCP_REG_CONFIG0_OOB_WDT BIT_9 171 #define OCP_REG_CONFIG0_DRV_WAIT_OOB BIT_8 172 #define OCP_REG_CONFIG0_TLSEN BIT_7 173 174 #define HW_DASH_SUPPORT_DASH(_M) ((_M)->HwSuppDashVer > 0) 175 #define HW_DASH_SUPPORT_TYPE_1(_M) ((_M)->HwSuppDashVer == 1) 176 #define HW_DASH_SUPPORT_TYPE_2(_M) ((_M)->HwSuppDashVer == 2) 177 #define HW_DASH_SUPPORT_TYPE_3(_M) ((_M)->HwSuppDashVer == 3) 178 179 #define RECV_FROM_FW_BUF_SIZE (2048) 180 #define SEND_TO_FW_BUF_SIZE (2048) 181 182 #define RX_DASH_FROM_FW_OWN BIT_15 183 #define TX_DASH_SEND_FW_OWN BIT_15 184 185 #define TXS_CC3_0 (BIT_0|BIT_1|BIT_2|BIT_3) 186 #define TXS_EXC BIT_4 187 #define TXS_LNKF BIT_5 188 #define TXS_OWC BIT_6 189 #define TXS_TES BIT_7 190 #define TXS_UNF BIT_9 191 #define TXS_LGSEN BIT_11 192 #define TXS_LS BIT_12 193 #define TXS_FS BIT_13 194 #define TXS_EOR BIT_14 195 #define TXS_OWN BIT_15 196 197 #define TPPool_HRDY 0x20 198 199 #define HostReqReg (0xC0) 200 #define SystemMasterDescStartAddrLow (0xF0) 201 #define SystemMasterDescStartAddrHigh (0xF4) 202 #define SystemSlaveDescStartAddrLow (0xF8) 203 #define SystemSlaveDescStartAddrHigh (0xFC) 204 205 //DASH Request Type 206 #define WSMANREG 0x01 207 #define OSPUSHDATA 0x02 208 209 #define RXS_OWN BIT_15 210 #define RXS_EOR BIT_14 211 #define RXS_FS BIT_13 212 #define RXS_LS BIT_12 213 214 #define ISRIMR_DP_DASH_OK BIT_15 215 #define ISRIMR_DP_HOST_OK BIT_13 216 #define ISRIMR_DP_REQSYS_OK BIT_11 217 218 #define ISRIMR_DASH_INTR_EN BIT_12 219 #define ISRIMR_DASH_INTR_CMAC_RESET BIT_15 220 221 #define ISRIMR_DASH_TYPE2_ROK BIT_0 222 #define ISRIMR_DASH_TYPE2_RDU BIT_1 223 #define ISRIMR_DASH_TYPE2_TOK BIT_2 224 #define ISRIMR_DASH_TYPE2_TDU BIT_3 225 #define ISRIMR_DASH_TYPE2_TX_FIFO_FULL BIT_4 226 #define ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE BIT_5 227 #define ISRIMR_DASH_TYPE2_RX_DISABLE_IDLE BIT_6 228 229 #define CMAC_OOB_STOP 0x25 230 #define CMAC_OOB_INIT 0x26 231 #define CMAC_OOB_RESET 0x2a 232 233 #define NO_BASE_ADDRESS 0x00000000 234 #define RTL8168FP_OOBMAC_BASE 0xBAF70000 235 #define RTL8168FP_CMAC_IOBASE 0xBAF20000 236 #define RTL8168FP_KVM_BASE 0xBAF80400 237 #define CMAC_SYNC_REG 0x20 238 #define CMAC_RXDESC_OFFSET 0x90 //RX: 0x90 - 0x98 239 #define CMAC_TXDESC_OFFSET 0x98 //TX: 0x98 - 0x9F 240 241 /* cmac write/read MMIO register */ 242 #define RTL_CMAC_W8(tp, reg, val8) writeb ((val8), tp->cmac_ioaddr + (reg)) 243 #define RTL_CMAC_W16(tp, reg, val16) writew ((val16), tp->cmac_ioaddr + (reg)) 244 #define RTL_CMAC_W32(tp, reg, val32) writel ((val32), tp->cmac_ioaddr + (reg)) 245 #define RTL_CMAC_R8(tp, reg) readb (tp->cmac_ioaddr + (reg)) 246 #define RTL_CMAC_R16(tp, reg) readw (tp->cmac_ioaddr + (reg)) 247 #define RTL_CMAC_R32(tp, reg) ((unsigned long) readl (tp->cmac_ioaddr + (reg))) 248 249 int rtl8168_dash_ioctl(struct net_device *dev, struct ifreq *ifr); 250 void HandleDashInterrupt(struct net_device *dev); 251 int AllocateDashShareMemory(struct net_device *dev); 252 void FreeAllocatedDashShareMemory(struct net_device *dev); 253 void DashHwInit(struct net_device *dev); 254 255 256 #endif /* _LINUX_R8168_DASH_H */ 257