1 /* 2 * Copyright (c) 2022-2022 Huawei Device Co., Ltd. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without modification, 5 * are permitted provided that the following conditions are met: 6 * 7 * 1. Redistributions of source code must retain the above copyright notice, this list of 8 * conditions and the following disclaimer. 9 * 10 * 2. Redistributions in binary form must reproduce the above copyright notice, this list 11 * of conditions and the following disclaimer in the documentation and/or other materials 12 * provided with the distribution. 13 * 14 * 3. Neither the name of the copyright holder nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific prior written 16 * permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 19 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 20 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR 22 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 23 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 24 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 25 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 26 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 27 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 28 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #ifndef __SYS_H 32 #define __SYS_H 33 34 #include "stm32f4xx.h" 35 36 #define BIT_BAND(addr, bitnum) ((addr & 0xF0000000) + 0x2000000 + ((addr & 0xFFFFF) << 5) + (bitnum << 2)) 37 #define MEM_ADDR(addr) (*((volatile unsigned long*)(addr))) 38 #define BIT_ADDR(addr, bitnum) MEM_ADDR(BIT_BAND(addr, bitnum)) 39 40 #define GPIOA_ODR_ADDR (GPIOA_BASE + 20) 41 #define GPIOB_ODR_ADDR (GPIOB_BASE + 20) 42 #define GPIOD_ODR_ADDR (GPIOD_BASE + 20) 43 44 #define GPIOA_IDR_ADDR (GPIOA_BASE + 16) 45 #define GPIOB_IDR_ADDR (GPIOB_BASE + 16) 46 #define GPIOD_IDR_ADDR (GPIOD_BASE + 16) 47 48 #define PAout(n) BIT_ADDR(GPIOA_ODR_ADDR, n) 49 #define PAin(n) BIT_ADDR(GPIOA_IDR_ADDR, n) 50 #define PBout(n) BIT_ADDR(GPIOB_ODR_ADDR, n) 51 #define PBin(n) BIT_ADDR(GPIOB_IDR_ADDR, n) 52 #define PDout(n) BIT_ADDR(GPIOD_ODR_ADDR, n) 53 #define PDin(n) BIT_ADDR(GPIOD_IDR_ADDR, n) 54 55 #endif 56