1 /*
2 * Copyright (c) 2022-2022 Huawei Device Co., Ltd. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without modification,
5 * are permitted provided that the following conditions are met:
6 *
7 * 1. Redistributions of source code must retain the above copyright notice, this list of
8 * conditions and the following disclaimer.
9 *
10 * 2. Redistributions in binary form must reproduce the above copyright notice, this list
11 * of conditions and the following disclaimer in the documentation and/or other materials
12 * provided with the distribution.
13 *
14 * 3. Neither the name of the copyright holder nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific prior written
16 * permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
20 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
22 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
23 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
24 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
25 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
26 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
27 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
28 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 */
30
31 #include <stdlib.h>
32 #include "hal_gpio.h"
33 #include "hcs_macro.h"
34 #include "hdf_config_macro.h"
35 #include "gpio_core.h"
36 #include "hdf_log.h"
37 #include "prt_hwi.h"
38 #include "os_cpu_armv7_m_external.h"
39 #include "stm32f4xx_exti.h"
40 #include "stm32f4xx_syscfg.h"
41
42 #define HDF_LOG_TAG gpio_stm_c
43
44 static EXTI_InitTypeDef g_gpioExitCfg[STM32_GPIO_PIN_MAX * STM32_GPIO_GROUP_MAX] = {0};
45 static const uint16_t g_stmRealPinMaps[STM32_GPIO_PIN_MAX] = {
46 GPIO_Pin_0,
47 GPIO_Pin_1,
48 GPIO_Pin_2,
49 GPIO_Pin_3,
50 GPIO_Pin_4,
51 GPIO_Pin_5,
52 GPIO_Pin_6,
53 GPIO_Pin_7,
54 GPIO_Pin_8,
55 GPIO_Pin_9,
56 GPIO_Pin_10,
57 GPIO_Pin_11,
58 GPIO_Pin_12,
59 GPIO_Pin_13,
60 GPIO_Pin_14,
61 GPIO_Pin_15,
62 };
63
64 typedef struct {
65 uint32_t group;
66 uint32_t realPin;
67 uint32_t pin;
68 uint32_t mode;
69 } GpioInflectInfo;
70
71 GpioInflectInfo g_gpioPinsMap[STM32_GPIO_PIN_MAX * STM32_GPIO_GROUP_MAX] = {0};
72
73 static GPIO_TypeDef *g_gpioxMaps[STM32_GPIO_GROUP_MAX] = {
74 GPIOA,
75 GPIOB,
76 GPIOC,
77 GPIOD,
78 GPIOE,
79 GPIOF,
80 GPIOG,
81 GPIOH,
82 GPIOI,
83 };
84 #define EXTI_GROUP_MAX 11
85 static const uint8_t g_extiGpioxMaps[EXTI_GROUP_MAX] = {
86 EXTI_PortSourceGPIOA,
87 EXTI_PortSourceGPIOB,
88 EXTI_PortSourceGPIOC,
89 EXTI_PortSourceGPIOD,
90 EXTI_PortSourceGPIOE,
91 EXTI_PortSourceGPIOF,
92 EXTI_PortSourceGPIOG,
93 EXTI_PortSourceGPIOH,
94 EXTI_PortSourceGPIOI,
95 EXTI_PortSourceGPIOJ,
96 EXTI_PortSourceGPIOK,
97 };
98 #define EXTI_PINSOURCE_MAX 16
99 static const uint8_t g_extiPinSourceMaps[EXTI_PINSOURCE_MAX] = {
100 EXTI_PinSource0,
101 EXTI_PinSource1,
102 EXTI_PinSource2,
103 EXTI_PinSource3,
104 EXTI_PinSource4,
105 EXTI_PinSource5,
106 EXTI_PinSource6,
107 EXTI_PinSource7,
108 EXTI_PinSource8,
109 EXTI_PinSource9,
110 EXTI_PinSource10,
111 EXTI_PinSource11,
112 EXTI_PinSource12,
113 EXTI_PinSource13,
114 EXTI_PinSource14,
115 EXTI_PinSource15,
116 };
117 #define EXTI_LINE_MAX 16
118 static const uint32_t g_extiLineMaps[EXTI_LINE_MAX] = {
119 EXTI_Line0,
120 EXTI_Line1,
121 EXTI_Line2,
122 EXTI_Line3,
123 EXTI_Line4,
124 EXTI_Line5,
125 EXTI_Line6,
126 EXTI_Line7,
127 EXTI_Line8,
128 EXTI_Line9,
129 EXTI_Line10,
130 EXTI_Line11,
131 EXTI_Line12,
132 EXTI_Line13,
133 EXTI_Line14,
134 EXTI_Line15,
135 };
136 #define NVIC_IRQ_CHANNEL_MAX 5
137 static const int32_t g_nvicIrqChannel[NVIC_IRQ_CHANNEL_MAX] = {
138 EXTI0_IRQn,
139 EXTI1_IRQn,
140 EXTI2_IRQn,
141 EXTI3_IRQn,
142 EXTI4_IRQn,
143 };
144 EXTI_InitTypeDef g_extiInitStructure;
145 typedef struct {
146 uint32_t realPin;
147 uint32_t group;
148 uint32_t pin;
149 uint32_t mode;
150 uint32_t speed;
151 uint32_t type;
152 uint32_t pupd;
153 uint32_t alternate;
154 } GpioResource;
155
156 enum GpioDeviceState {
157 GPIO_DEVICE_UNINITIALIZED = 0x0u,
158 GPIO_DEVICE_INITIALIZED = 0x1u,
159 };
160
161 typedef struct {
162 uint32_t pinNums;
163 GpioResource resource;
164 STM32_GPIO_GROUP group; /* gpio config */
165 } GpioDevice;
166
167 /* GpioMethod method definitions */
168 static int32_t GpioDevWrite(struct GpioCntlr *cntlr, uint16_t gpio, uint16_t val);
169 static int32_t GpioDevRead(struct GpioCntlr *cntlr, uint16_t gpio, uint16_t *val);
170 static int32_t GpioDevSetDir(struct GpioCntlr *cntlr, uint16_t gpio, uint16_t dir);
171 static int32_t GpioDevGetDir(struct GpioCntlr *cntlr, uint16_t gpio, uint16_t *dir);
172 static int32_t GpioDevSetIrq(struct GpioCntlr *cntlr, uint16_t gpio, uint16_t mode);
173 static int32_t GpioDevUnSetIrq(struct GpioCntlr *cntlr, uint16_t gpio);
174 static int32_t GpioDevEnableIrq(struct GpioCntlr *cntlr, uint16_t gpio);
175 static int32_t GpioDevDisableIrq(struct GpioCntlr *cntlr, uint16_t gpio);
176 static int32_t AttachGpioDevice(struct GpioCntlr *gpioCntlr, struct HdfDeviceObject *device);
177
178 /* GpioMethod definitions */
179 struct GpioMethod g_GpioCntlrMethod = {
180 .request = NULL,
181 .release = NULL,
182 .write = GpioDevWrite,
183 .read = GpioDevRead,
184 .setDir = GpioDevSetDir,
185 .getDir = GpioDevGetDir,
186 .toIrq = NULL,
187 .setIrq = GpioDevSetIrq,
188 .unsetIrq = GpioDevUnSetIrq,
189 .enableIrq = GpioDevEnableIrq,
190 .disableIrq = GpioDevDisableIrq,
191 };
192
193 static struct GpioCntlr g_stmGpioCntlr;
194
GpioDevWrite(struct GpioCntlr * cntlr,uint16_t gpio,uint16_t val)195 static int32_t GpioDevWrite(struct GpioCntlr *cntlr, uint16_t gpio, uint16_t val)
196 {
197 uint16_t realPin = g_gpioPinsMap[gpio].realPin;
198 uint32_t pinReg = g_stmRealPinMaps[realPin];
199 if (pinReg > GPIO_Pin_15 || pinReg < GPIO_Pin_0) {
200 HDF_LOGE("%s %d, error pin:%d", __func__, __LINE__, realPin);
201 return HDF_ERR_NOT_SUPPORT;
202 }
203 HDF_LOGI("%s %d ,write pin num %d", __func__, __LINE__, realPin);
204 HDF_LOGI("pingReg is %d", pinReg);
205 GPIO_TypeDef *gpiox = g_gpioxMaps[g_gpioPinsMap[gpio].group];
206 if (val) {
207 GPIO_SetBits(gpiox, pinReg);
208 } else {
209 GPIO_ResetBits(gpiox, pinReg);
210 }
211
212 return HDF_SUCCESS;
213 }
214
OemGpioIrqHdl(uint32_t pin)215 static void OemGpioIrqHdl(uint32_t pin)
216 {
217 HDF_LOGI("Gpio irq pin : %d\r\n", pin);
218 GpioCntlrIrqCallback(&g_stmGpioCntlr, pin);
219 return;
220 }
221
GpioDevRead(struct GpioCntlr * cntlr,uint16_t gpio,uint16_t * val)222 static int32_t GpioDevRead(struct GpioCntlr *cntlr, uint16_t gpio, uint16_t *val)
223 {
224 HDF_LOGI("entering GpioDevRead.\r\n");
225 uint16_t realPin = g_gpioPinsMap[gpio].realPin;
226 uint32_t pinReg = g_stmRealPinMaps[realPin];
227 uint16_t value = 0;
228 if (pinReg > GPIO_Pin_15 || pinReg < GPIO_Pin_0) {
229 HDF_LOGE("%s %d, error pin:%d", __func__, __LINE__, realPin);
230 return HDF_ERR_NOT_SUPPORT;
231 }
232 HDF_LOGI("%s %d ,read pin num %d", __func__, __LINE__, realPin);
233 HDF_LOGI("pingReg is %d", pinReg);
234 GPIO_TypeDef *gpiox = g_gpioxMaps[g_gpioPinsMap[gpio].group];
235 value = GPIO_ReadInputDataBit(gpiox, pinReg);
236 *val = value;
237 HDF_LOGI("read value is %d", value);
238 return HDF_SUCCESS;
239 }
240
241 /* HdfDriverEntry method definitions */
242 static int32_t GpioDriverInit(struct HdfDeviceObject *device);
243 static void GpioDriverRelease(struct HdfDeviceObject *device);
244
245 /* HdfDriverEntry definitions */
246 struct HdfDriverEntry g_GpioDriverEntry = {
247 .moduleVersion = 1,
248 .moduleName = "ST_GPIO_MODULE_HDF",
249 .Init = GpioDriverInit,
250 .Release = GpioDriverRelease,
251 };
252 HDF_INIT(g_GpioDriverEntry);
253
InitGpioClock(STM32_GPIO_GROUP group)254 static void InitGpioClock(STM32_GPIO_GROUP group)
255 {
256 switch (group) {
257 case STM32_GPIO_GROUP_A:
258 RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
259 break;
260 case STM32_GPIO_GROUP_B:
261 RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);
262 break;
263 case STM32_GPIO_GROUP_C:
264 RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);
265 break;
266 case STM32_GPIO_GROUP_D:
267 RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE);
268 break;
269 case STM32_GPIO_GROUP_E:
270 RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOE, ENABLE);
271 break;
272 case STM32_GPIO_GROUP_F:
273 RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOF, ENABLE);
274 break;
275 case STM32_GPIO_GROUP_G:
276 RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOG, ENABLE);
277 break;
278 case STM32_GPIO_GROUP_H:
279 RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOH, ENABLE);
280 break;
281 case STM32_GPIO_GROUP_I:
282 RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOI, ENABLE);
283 break;
284 default:
285 break;
286 }
287 }
288
InitGpioDevice(GpioDevice * device)289 static int32_t InitGpioDevice(GpioDevice *device)
290 {
291 GPIO_InitTypeDef gpioInitStruct = {0};
292
293 if (device == NULL) {
294 HDF_LOGE("%s: device is NULL", __func__);
295 return HDF_ERR_INVALID_PARAM;
296 }
297 uint32_t halGpio = g_stmRealPinMaps[device->resource.realPin];
298 if (halGpio > GPIO_Pin_15 || halGpio < GPIO_Pin_0) {
299 HDF_LOGE("%s %d, error pin:%d", __func__, __LINE__, halGpio);
300 return HDF_ERR_NOT_SUPPORT;
301 }
302 /* init clock */
303 InitGpioClock(device->resource.group);
304
305 GPIO_TypeDef *goiox = g_gpioxMaps[device->resource.group];
306
307 if (device->resource.mode == GPIO_Mode_AF) {
308 GPIO_PinAFConfig(goiox, device->resource.realPin, device->resource.alternate);
309 }
310
311 gpioInitStruct.GPIO_Pin = halGpio;
312 gpioInitStruct.GPIO_Mode = device->resource.mode;
313 gpioInitStruct.GPIO_PuPd = device->resource.pupd;
314 gpioInitStruct.GPIO_Speed = device->resource.speed;
315 gpioInitStruct.GPIO_OType = device->resource.type;
316
317 GPIO_Init(goiox, &gpioInitStruct);
318
319 return HDF_SUCCESS;
320 }
321
322 #define PLATFORM_GPIO_CONFIG HCS_NODE(HCS_NODE(HCS_ROOT, platform), gpio_config)
GetGpioDeviceResource(GpioDevice * device)323 static uint32_t GetGpioDeviceResource(GpioDevice *device)
324 {
325 if (device == NULL) {
326 HDF_LOGE("%s: device is NULL", __func__);
327 return HDF_ERR_INVALID_PARAM;
328 }
329 GpioResource *resource = &device->resource;
330 if (resource == NULL) {
331 HDF_LOGE("%s: resource is NULL", __func__);
332 return HDF_ERR_INVALID_OBJECT;
333 }
334 device->pinNums = HCS_PROP(PLATFORM_GPIO_CONFIG, pinNum);
335 uint32_t pins[] = HCS_ARRAYS(HCS_NODE(PLATFORM_GPIO_CONFIG, pin));
336 uint32_t realPins[] = HCS_ARRAYS(HCS_NODE(PLATFORM_GPIO_CONFIG, realPin));
337 uint32_t groups[] = HCS_ARRAYS(HCS_NODE(PLATFORM_GPIO_CONFIG, group));
338 uint32_t modes[] = HCS_ARRAYS(HCS_NODE(PLATFORM_GPIO_CONFIG, mode));
339 uint32_t speeds[] = HCS_ARRAYS(HCS_NODE(PLATFORM_GPIO_CONFIG, speed));
340 uint32_t Types[] = HCS_ARRAYS(HCS_NODE(PLATFORM_GPIO_CONFIG, type));
341 uint32_t pupds[] = HCS_ARRAYS(HCS_NODE(PLATFORM_GPIO_CONFIG, pupd));
342 uint32_t alternate[] = HCS_ARRAYS(HCS_NODE(PLATFORM_GPIO_CONFIG, alternate));
343
344 for (size_t i = 0; i < device->pinNums; i++) {
345 resource->pin = pins[i];
346 resource->realPin = realPins[i];
347 resource->group = groups[i];
348 resource->mode = modes[i];
349 resource->speed = speeds[i];
350 resource->type = Types[i];
351 resource->pupd = pupds[i];
352 resource->alternate = alternate[i];
353
354 g_gpioPinsMap[resource->pin].group = resource->group;
355 g_gpioPinsMap[resource->pin].realPin = resource->realPin;
356 g_gpioPinsMap[resource->pin].pin = resource->pin;
357 g_gpioPinsMap[resource->pin].mode = resource->mode;
358
359 if (InitGpioDevice(device) != HDF_SUCCESS) {
360 HDF_LOGE("InitGpioDevice FAIL\r\n");
361 return HDF_FAILURE;
362 }
363 }
364
365 return HDF_SUCCESS;
366 }
367
AttachGpioDevice(struct GpioCntlr * gpioCntlr,struct HdfDeviceObject * device)368 static int32_t AttachGpioDevice(struct GpioCntlr *gpioCntlr, struct HdfDeviceObject *device)
369 {
370 int32_t ret;
371
372 GpioDevice *gpioDevice = NULL;
373 if (device == NULL) {
374 HDF_LOGE("%s: property is NULL", __func__);
375 return HDF_ERR_INVALID_PARAM;
376 }
377
378 gpioDevice = (GpioDevice *)OsalMemAlloc(sizeof(GpioDevice));
379 if (gpioDevice == NULL) {
380 HDF_LOGE("%s: OsalMemAlloc gpioDevice error", __func__);
381 return HDF_ERR_MALLOC_FAIL;
382 }
383
384 ret = GetGpioDeviceResource(gpioDevice);
385 if (ret != HDF_SUCCESS) {
386 (void)OsalMemFree(gpioDevice);
387 return HDF_FAILURE;
388 }
389 gpioCntlr->priv = gpioDevice;
390 gpioCntlr->count = gpioDevice->pinNums;
391
392 return HDF_SUCCESS;
393 }
394
GpioDriverInit(struct HdfDeviceObject * device)395 static int32_t GpioDriverInit(struct HdfDeviceObject *device)
396 {
397 int32_t ret;
398 struct GpioCntlr *gpioCntlr = NULL;
399
400 if (device == NULL) {
401 HDF_LOGE("%s: device is NULL", __func__);
402 return HDF_ERR_INVALID_PARAM;
403 }
404
405 ret = PlatformDeviceBind(&g_stmGpioCntlr.device, device);
406 if (ret != HDF_SUCCESS) {
407 HDF_LOGE("%s: bind hdf device failed:%d", __func__, ret);
408 return ret;
409 }
410
411 gpioCntlr = GpioCntlrFromHdfDev(device);
412 if (gpioCntlr == NULL) {
413 HDF_LOGE("GpioCntlrFromHdfDev fail\r\n");
414 return HDF_DEV_ERR_NO_DEVICE_SERVICE;
415 }
416
417 ret = AttachGpioDevice(gpioCntlr, device); /* GpioCntlr add GpioDevice to priv */
418 if (ret != HDF_SUCCESS) {
419 HDF_LOGE("AttachGpioDevice fail\r\n");
420 return HDF_DEV_ERR_ATTACHDEV_FAIL;
421 }
422
423 gpioCntlr->ops = &g_GpioCntlrMethod; /* register callback */
424
425 ret = GpioCntlrAdd(gpioCntlr);
426 if (ret != HDF_SUCCESS) {
427 HDF_LOGE("GpioCntlrAdd fail %d\r\n", gpioCntlr->start);
428 return HDF_FAILURE;
429 }
430
431 return HDF_SUCCESS;
432 }
433
GpioDriverRelease(struct HdfDeviceObject * device)434 static void GpioDriverRelease(struct HdfDeviceObject *device)
435 {
436 struct GpioCntlr *gpioCntlr = NULL;
437
438 if (device == NULL) {
439 HDF_LOGE("%s: device is NULL", __func__);
440 return;
441 }
442
443 gpioCntlr = GpioCntlrFromHdfDev(device);
444 if (gpioCntlr == NULL) {
445 HDF_LOGE("%s: host is NULL", __func__);
446 return;
447 }
448
449 gpioCntlr->count = 0;
450 }
451
GpioDevSetDir(struct GpioCntlr * cntlr,uint16_t gpio,uint16_t dir)452 static int32_t GpioDevSetDir(struct GpioCntlr *cntlr, uint16_t gpio, uint16_t dir)
453 {
454 return HDF_SUCCESS;
455 }
456
GpioDevGetDir(struct GpioCntlr * cntlr,uint16_t gpio,uint16_t * dir)457 static int32_t GpioDevGetDir(struct GpioCntlr *cntlr, uint16_t gpio, uint16_t *dir)
458 {
459 (void)cntlr;
460 uint16_t realPin = g_gpioPinsMap[gpio].realPin;
461 uint32_t pinReg = g_stmRealPinMaps[realPin];
462 if (pinReg > GPIO_Pin_15 || pinReg < GPIO_Pin_0) {
463 HDF_LOGE("%s %d, error pin:%d", __func__, __LINE__, realPin);
464 return HDF_ERR_NOT_SUPPORT;
465 }
466
467 *dir = g_gpioPinsMap[gpio].mode;
468 return HDF_SUCCESS;
469 }
470
GpioDevSetIrq(struct GpioCntlr * cntlr,uint16_t gpio,uint16_t mode)471 static int32_t GpioDevSetIrq(struct GpioCntlr *cntlr, uint16_t gpio, uint16_t mode)
472 {
473 (void)cntlr;
474 uint16_t realPin = g_gpioPinsMap[gpio].realPin;
475 uint32_t pinReg = g_stmRealPinMaps[realPin];
476 if (pinReg > GPIO_Pin_15 || pinReg < GPIO_Pin_0) {
477 HDF_LOGE("%s %d, error pin:%d", __func__, __LINE__, realPin);
478 return HDF_ERR_NOT_SUPPORT;
479 }
480
481 if (mode == EXTI_Trigger_Rising) {
482 g_gpioExitCfg[gpio].EXTI_Trigger = EXTI_Trigger_Rising;
483 } else if (mode == EXTI_Trigger_Falling) {
484 g_gpioExitCfg[gpio].EXTI_Trigger = EXTI_Trigger_Falling;
485 } else {
486 HDF_LOGE("%s %d, error mode:%d", __func__, __LINE__, mode);
487 return HDF_ERR_NOT_SUPPORT;
488 }
489
490 return HDF_SUCCESS;
491 }
492
GpioDevUnSetIrq(struct GpioCntlr * cntlr,uint16_t gpio)493 static int32_t GpioDevUnSetIrq(struct GpioCntlr *cntlr, uint16_t gpio)
494 {
495 (void)cntlr;
496 uint16_t realPin = g_gpioPinsMap[gpio].realPin;
497 uint32_t pinReg = g_stmRealPinMaps[realPin];
498 if (pinReg > GPIO_Pin_15 || pinReg < GPIO_Pin_0) {
499 HDF_LOGE("%s %d, error pin:%d", __func__, __LINE__, realPin);
500 return HDF_ERR_NOT_SUPPORT;
501 }
502
503 return HDF_SUCCESS;
504 }
505
GpioDevEnableIrq(struct GpioCntlr * cntlr,uint16_t gpio)506 static int32_t GpioDevEnableIrq(struct GpioCntlr *cntlr, uint16_t gpio)
507 {
508 uintptr_t intSave;
509 (void)cntlr;
510 EXTI_InitTypeDef exitInitConfig = {0};
511 uint16_t realPin = g_gpioPinsMap[gpio].realPin;
512 uint32_t pinReg = g_stmRealPinMaps[realPin];
513 if (pinReg > GPIO_Pin_15 || pinReg < GPIO_Pin_0) {
514 HDF_LOGE("%s %d, error pin:%d", __func__, __LINE__, realPin);
515 return HDF_ERR_NOT_SUPPORT;
516 }
517 SYSCFG_EXTILineConfig(g_extiGpioxMaps[g_gpioPinsMap[gpio].group], g_extiPinSourceMaps[realPin]);
518 exitInitConfig.EXTI_Line = g_extiLineMaps[realPin];
519 exitInitConfig.EXTI_Mode = EXTI_Mode_Interrupt;
520 exitInitConfig.EXTI_Trigger = g_gpioExitCfg[gpio].EXTI_Trigger;
521 exitInitConfig.EXTI_LineCmd = ENABLE;
522 EXTI_Init(&exitInitConfig);
523 if (pinReg > GPIO_Pin_4) {
524 HDF_LOGE("%s %d, this pin out of range can not be set to irq mode.\r\n", __func__, __LINE__);
525 return HDF_ERR_NOT_SUPPORT;
526 }
527 intSave = PRT_HwiSetAttr(g_nvicIrqChannel[realPin], OS_HWI_PRI_HIGHEST, OS_HWI_MODE_ENGROSS);
528 if (intSave != OS_OK) {
529 HDF_LOGE("%s %d, PRT_HwiSetAttr failed!!!\n\r", __func__, __LINE__);
530 }
531 intSave = PRT_HwiCreate(g_nvicIrqChannel[realPin], OemGpioIrqHdl, gpio);
532 if (intSave != OS_OK) {
533 HDF_LOGE("%s %d, PRT_HwiCreate failed!!!\n\r", __func__, __LINE__);
534 }
535 PRT_HwiEnable(g_nvicIrqChannel[realPin]);
536 return HDF_SUCCESS;
537 }
538
GpioDevDisableIrq(struct GpioCntlr * cntlr,uint16_t gpio)539 static int32_t GpioDevDisableIrq(struct GpioCntlr *cntlr, uint16_t gpio)
540 {
541 uint16_t realPin = g_gpioPinsMap[gpio].realPin;
542 uint32_t pinReg = g_stmRealPinMaps[realPin];
543 if (pinReg > GPIO_Pin_15 || pinReg < GPIO_Pin_0) {
544 HDF_LOGE("%s %d, error pin:%d", __func__, __LINE__, realPin);
545 return HDF_ERR_NOT_SUPPORT;
546 }
547 PRT_HwiDisable(g_nvicIrqChannel[realPin]);
548 PRT_HwiDelete(g_nvicIrqChannel[realPin]);
549 return HDF_SUCCESS;
550 }
551