1 /* 2 * Copyright (c) 2022 Winner Microelectronics Co., Ltd. All rights reserved. 3 * Licensed under the Apache License, Version 2.0 (the "License"); 4 * you may not use this file except in compliance with the License. 5 * You may obtain a copy of the License at 6 * 7 * http://www.apache.org/licenses/LICENSE-2.0 8 * 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 */ 15 16 /** 17 * @file wm_io.h 18 * 19 * @brief IO Driver Module 20 * 21 * @author lilm 22 * 23 * @copyright (c) 2015 Winner Microelectronics Co., Ltd. 24 */ 25 #ifndef WM_IO_H 26 #define WM_IO_H 27 28 #include "wm_type_def.h" 29 #define TLS_IO_AB_OFFSET (0x40011400 - 0x40011200) 30 31 /** io name */ 32 enum tls_io_name { 33 WM_IO_PA_00 = 0, /**< gpio a0 */ 34 WM_IO_PA_01, /**< gpio a1 */ 35 WM_IO_PA_02, /**< gpio a2 */ 36 WM_IO_PA_03, /**< gpio a3 */ 37 WM_IO_PA_04, /**< gpio a4 */ 38 WM_IO_PA_05, /**< gpio a5 */ 39 WM_IO_PA_06, /**< gpio a6 */ 40 WM_IO_PA_07, /**< gpio a7 */ 41 WM_IO_PA_08, /**< gpio a8 */ 42 WM_IO_PA_09, /**< gpio a9 */ 43 WM_IO_PA_10, /**< gpio a10 */ 44 WM_IO_PA_11, /**< gpio a11 */ 45 WM_IO_PA_12, /**< gpio a12 */ 46 WM_IO_PA_13, /**< gpio a13 */ 47 WM_IO_PA_14, /**< gpio a14 */ 48 WM_IO_PA_15, /**< gpio a15 */ 49 50 WM_IO_PB_00, /**< gpio b0 */ 51 WM_IO_PB_01, /**< gpio b1 */ 52 WM_IO_PB_02, /**< gpio b2 */ 53 WM_IO_PB_03, /**< gpio b3 */ 54 WM_IO_PB_04, /**< gpio b4 */ 55 WM_IO_PB_05, /**< gpio b5 */ 56 WM_IO_PB_06, /**< gpio b6 */ 57 WM_IO_PB_07, /**< gpio b7 */ 58 WM_IO_PB_08, /**< gpio b8 */ 59 WM_IO_PB_09, /**< gpio b9 */ 60 WM_IO_PB_10, /**< gpio b10 */ 61 WM_IO_PB_11, /**< gpio b11 */ 62 WM_IO_PB_12, /**< gpio b12 */ 63 WM_IO_PB_13, /**< gpio b13 */ 64 WM_IO_PB_14, /**< gpio b14 */ 65 WM_IO_PB_15, /**< gpio b15 */ 66 WM_IO_PB_16, /**< gpio b16 */ 67 WM_IO_PB_17, /**< gpio b17 */ 68 WM_IO_PB_18, /**< gpio b18 */ 69 WM_IO_PB_19, /**< gpio b19 */ 70 WM_IO_PB_20, /**< gpio b20 */ 71 WM_IO_PB_21, /**< gpio b21 */ 72 WM_IO_PB_22, /**< gpio b22 */ 73 WM_IO_PB_23, /**< gpio b23 */ 74 WM_IO_PB_24, /**< gpio b24 */ 75 WM_IO_PB_25, /**< gpio b25 */ 76 WM_IO_PB_26, /**< gpio b26 */ 77 WM_IO_PB_27, /**< gpio b27 */ 78 WM_IO_PB_28, /**< gpio b28 */ 79 WM_IO_PB_29, /**< gpio b29 */ 80 WM_IO_PB_30, /**< gpio b30 */ 81 WM_IO_PB_31 /**< gpio b31 */ 82 }; 83 84 /** option 1 of the io */ 85 #define WM_IO_OPTION1 1 86 /** option 2 of the io */ 87 #define WM_IO_OPTION2 2 88 /** option 3 of the io */ 89 #define WM_IO_OPTION3 3 90 /** option 4 of the io */ 91 #define WM_IO_OPTION4 4 92 /** option 5 of the io */ 93 #define WM_IO_OPTION5 5 94 /** option 6 of the io */ 95 #define WM_IO_OPTION6 6 96 /** option 7 of the io */ 97 #define WM_IO_OPTION7 7 98 99 /* io option1 */ 100 #define WM_IO_OPT1_I2C_DAT WM_IO_OPTION1 101 #define WM_IO_OPT1_PWM1 WM_IO_OPTION1 102 #define WM_IO_OPT1_PWM2 WM_IO_OPTION1 103 #define WM_IO_OPT1_PWM3 WM_IO_OPTION1 104 #define WM_IO_OPT1_PWM4 WM_IO_OPTION1 105 #define WM_IO_OPT1_PWM5 WM_IO_OPTION1 106 #define WM_IO_OPT1_UART0_RXD WM_IO_OPTION1 107 #define WM_IO_OPT1_UART0_TXD WM_IO_OPTION1 108 #define WM_IO_OPT1_PWM_BRAKE WM_IO_OPTION1 109 #define WM_IO_OPT1_I2S_M_EXTCLK WM_IO_OPTION1 110 #define WM_IO_OPT1_SPI_M_DO WM_IO_OPTION1 111 #define WM_IO_OPT1_SPI_M_DI WM_IO_OPTION1 112 #define WM_IO_OPT1_SPI_M_CS WM_IO_OPTION1 113 #define WM_IO_OPT1_SPI_M_CK WM_IO_OPTION1 114 #define WM_IO_OPT1_I2S_S_RL WM_IO_OPTION1 115 #define WM_IO_OPT1_I2S_S_SCL WM_IO_OPTION1 116 #define WM_IO_OPT1_I2S_S_SDA WM_IO_OPTION1 117 #define WM_IO_OPT1_I2S_M_RL WM_IO_OPTION1 118 #define WM_IO_OPT1_I2S_M_SCL WM_IO_OPTION1 119 #define WM_IO_OPT1_I2S_M_SDA WM_IO_OPTION1 120 #define WM_IO_OPT1_JTAG_RST WM_IO_OPTION1 121 #define WM_IO_OPT1_JTAG_TDO WM_IO_OPTION1 122 #define WM_IO_OPT1_JTAG_TDI WM_IO_OPTION1 123 #define WM_IO_OPT1_JTAG_TCK_SWDCK WM_IO_OPTION1 124 #define WM_IO_OPT1_JTAG_TMS_SWDAT WM_IO_OPTION1 125 #define WM_IO_OPT1_UART1_RXD WM_IO_OPTION1 126 #define WM_IO_OPT1_UART1_TXD WM_IO_OPTION1 127 #define WM_IO_OPT1_UART1_RTS WM_IO_OPTION1 128 #define WM_IO_OPT1_UART1_CTS WM_IO_OPTION1 129 #define WM_IO_OPT1_SDIO_DAT WM_IO_OPTION1 130 131 /* io option2 */ 132 #define WM_IO_OPT2_PWM1 WM_IO_OPTION2 133 #define WM_IO_OPT2_PWM2 WM_IO_OPTION2 134 #define WM_IO_OPT2_PWM3 WM_IO_OPTION2 135 #define WM_IO_OPT2_PWM4 WM_IO_OPTION2 136 #define WM_IO_OPT2_PWM5 WM_IO_OPTION2 137 #define WM_IO_OPT2_SPI_M_DO WM_IO_OPTION2 138 #define WM_IO_OPT2_SPI_M_DI WM_IO_OPTION2 139 #define WM_IO_OPT2_SPI_M_CS WM_IO_OPTION2 140 #define WM_IO_OPT2_SPI_M_CK WM_IO_OPTION2 141 #define WM_IO_OPT2_I2C_SCL WM_IO_OPTION2 142 #define WM_IO_OPT2_I2S_M_EXTCLK WM_IO_OPTION2 143 #define WM_IO_OPT2_UART1_RXD WM_IO_OPTION2 144 #define WM_IO_OPT2_UART1_TXD WM_IO_OPTION2 145 #define WM_IO_OPT2_UART1_RTS WM_IO_OPTION2 146 #define WM_IO_OPT2_UART1_CTS WM_IO_OPTION2 147 #define WM_IO_OPT2_I2C_DAT WM_IO_OPTION2 148 #define WM_IO_OPT2_PWM_BRAKE WM_IO_OPTION2 149 #define WM_IO_OPT2_UART0_RTS WM_IO_OPTION2 150 #define WM_IO_OPT2_UART0_CTS WM_IO_OPTION2 151 #define WM_IO_OPT2_SDIO_DAT WM_IO_OPTION2 152 #define WM_IO_OPT2_HSPI_CK WM_IO_OPTION2 153 #define WM_IO_OPT2_HSPI_INT WM_IO_OPTION2 154 #define WM_IO_OPT2_HSPI_CS WM_IO_OPTION2 155 #define WM_IO_OPT2_HSPI_DI WM_IO_OPTION2 156 #define WM_IO_OPT2_HSPI_DO WM_IO_OPTION2 157 158 /* io option3 */ 159 #define WM_IO_OPT3_UART0_RXD WM_IO_OPTION3 160 #define WM_IO_OPT3_UART0_TXD WM_IO_OPTION3 161 #define WM_IO_OPT3_UART0_RTS WM_IO_OPTION3 162 #define WM_IO_OPT3_UART0_CTS WM_IO_OPTION3 163 #define WM_IO_OPT3_SPI_M_DO WM_IO_OPTION3 164 #define WM_IO_OPT3_SPI_M_DI WM_IO_OPTION3 165 #define WM_IO_OPT3_SPI_M_CS WM_IO_OPTION3 166 #define WM_IO_OPT3_SDIO_CK WM_IO_OPTION3 167 #define WM_IO_OPT3_SDIO_CMD WM_IO_OPTION3 168 #define WM_IO_OPT3_SDIO_DAT WM_IO_OPTION3 169 170 /* io option4 */ 171 #define WM_IO_OPT4_I2S_M_MCLK WM_IO_OPTION4 172 #define WM_IO_OPT4_I2S_M_RL WM_IO_OPTION4 173 #define WM_IO_OPT4_I2S_M_SCL WM_IO_OPTION4 174 #define WM_IO_OPT4_I2S_M_SDA WM_IO_OPTION4 175 176 /* io option5 */ 177 #define WM_IO_OPT5_GPIO WM_IO_OPTION5 178 179 /* io option6 */ 180 #define WM_IO_OPT6_ADC WM_IO_OPTION6 181 #define WM_IO_OPT6_LCD_COM WM_IO_OPTION6 182 #define WM_IO_OPT6_LCD_SEG WM_IO_OPTION6 183 184 /* io option7 */ 185 #define WM_IO_OPT7_TOUCH_SENSOR WM_IO_OPTION7 186 187 /** 188 * @brief This function is used to config io function 189 * 190 * @param[in] name io name 191 * @param[in] option io function option, value is WM_IO_OPT*_*, also is WM_IO_OPTION1~6 192 * 193 * @return None 194 * 195 * @note None 196 */ 197 void tls_io_cfg_set(enum tls_io_name name, u8 option); 198 199 /** 200 * @brief This function is used to get io function config 201 * 202 * @param[in] name io name 203 * 204 * @retval WM_IO_OPTION1~6 Mapping io function 205 * 206 * @note None 207 */ 208 int tls_io_cfg_get(enum tls_io_name name); 209 210 #endif /* end of WM_IO_H */ 211 212