1 /* 2 * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved. 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 /****************************************************************************** 18 * @file system.c 19 * @brief CSI Device System Source File 20 * @version V1.0 21 * @date 02. June 2017 22 ******************************************************************************/ 23 24 #include <csi_config.h> 25 #include "csi_core.h" 26 #include "wm_regs.h" 27 #include "wm_cpu.h" 28 29 extern int32_t g_top_irqstack; 30 31 extern uint32_t csi_coret_get_load(void); 32 extern uint32_t csi_coret_get_value(void); 33 _mdelay(void)34static void _mdelay(void) 35 { 36 uint32_t load = csi_coret_get_load(); 37 uint32_t start = csi_coret_get_value(); 38 uint32_t cnt; 39 tls_sys_clk sysclk; 40 41 tls_sys_clk_get(&sysclk); 42 cnt = sysclk.cpuclk * 1000; 43 44 while (1) { 45 uint32_t cur = csi_coret_get_value(); 46 if (start > cur) { 47 if (start - cur >= cnt) { 48 return; 49 } 50 } else { 51 if (load - cur + start > cnt) { 52 return; 53 } 54 } 55 } 56 } 57 mdelay(uint32_t ms)58void mdelay(uint32_t ms) 59 { 60 if (ms == 0) { 61 return; 62 } 63 64 while (ms--) { 65 _mdelay(); 66 } 67 } 68 69 /** 70 * @brief initialize the system 71 * Initialize the psr and vbr. 72 * @param None 73 * @return None 74 */ SystemInit(void)75void SystemInit(void) 76 { 77 #if defined(CONFIG_SEPARATE_IRQ_SP) && !defined(CONFIG_KERNEL_NONE) 78 /* 801 not supported */ 79 __set_Int_SP((uint32_t)&g_top_irqstack); 80 __set_CHR(__get_CHR() | CHR_ISE_Msk); 81 VIC->TSPR = 0xFF; 82 #endif 83 84 __set_CHR(__get_CHR() | CHR_IAE_Msk); 85 86 /* Clear active and pending IRQ */ 87 VIC->IABR[0] = 0x0; 88 VIC->ICPR[0] = 0xFFFFFFFF; 89 90 #ifdef CONFIG_KERNEL_NONE 91 __enable_excp_irq(); 92 #endif 93 94 // csi_coret_config(g_system_clock / CONFIG_SYSTICK_HZ, SYS_TICK_IRQn); // 10ms 95 // #ifndef CONFIG_KERNEL_NONE 96 // #endif 97 } 98