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1/*
2 * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved.
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 *   http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16 /******************************************************************************
17 * @file     vectors.S
18 * @brief    define default vector handlers. Should use with
19 *           GCC for CSKY Embedded Processors
20 * @version  V1.0
21 * @date     28. Nove 2017
22 ******************************************************************************/
23
24#include <csi_config.h>
25
26.import trap_c
27
28.section .bss
29    .align  2
30    .globl  g_trapstackalloc
31    .global g_trapstackbase
32    .global g_top_trapstack
33g_trapstackalloc:
34g_trapstackbase:
35    .space 512
36g_top_trapstack:
37
38    .align 2
39    .globl g_trap_sp
40    .type  g_trap_sp, object
41g_trap_sp:
42    .long 0
43    .size g_trap_sp, .-g_trap_sp
44
45.text
46
47/******************************************************************************
48 * Functions:
49 *     void trap(void);
50 * default exception handler
51 ******************************************************************************/
52    .global trap
53    .type   trap, %function
54trap:
55    psrset  ee
56
57    subi    sp, 4
58    stw     r13, (sp)
59    addi    sp, 4
60
61    lrw     r13, g_trap_sp
62    stw     sp, (r13)
63
64    lrw     sp, g_top_trapstack
65
66    subi    sp, 72
67    stm     r0-r12, (sp)
68
69    lrw     r0, g_trap_sp
70    ldw     r0, (r0)
71
72    stw     r0, (sp, 56) /* save r14 */
73
74    subi    r0, 4
75    ldw     r13, (r0)
76    stw     r13, (sp, 52)
77
78    stw     r15, (sp, 60)
79    mfcr    r0, epsr
80    stw     r0, (sp, 64)
81    mfcr    r0, epc
82    stw     r0, (sp, 68)
83
84    mov     r0, sp
85
86    jbsr    trap_c
87
88    .align  2
89    .weak   Default_Handler
90    .type   Default_Handler, %function
91Default_Handler:
92    br      trap
93    .size   Default_Handler, . - Default_Handler
94
95/*    Macro to define default handlers. Default handler
96 *    will be weak symbol and just dead loops. They can be
97 *    overwritten by other handlers */
98    .macro  def_irq_handler handler_name
99    .weak   \handler_name
100    .globl  \handler_name
101    .set    \handler_name, Default_Handler
102    .endm
103
104    def_irq_handler tspend_handler
105    def_irq_handler SDIO_IRQHandler            /*  0:  SDIO         */
106    def_irq_handler MAC_IRQHandler             /*  1:  MAC          */
107    def_irq_handler RF_Cfg_IRQHandler          /*  2:  RF Cfg       */
108    def_irq_handler SEC_IRQHandler             /*  3:  SEC          */
109    def_irq_handler DMA_Channel0_IRQHandler         /*  4:  DMA_Channel0       */
110    def_irq_handler DMA_Channel1_IRQHandler         /*  5:  DMA_Channel1       */
111    def_irq_handler DMA_Channel2_IRQHandler         /*  6:  DMA_Channel2       */
112    def_irq_handler DMA_Channel3_IRQHandler         /*  7:  DMA_Channel3       */
113    def_irq_handler DMA_Channel4_7_IRQHandler       /*  8:  DMA_Channel4_7     */
114    def_irq_handler DMA_BRUST_IRQHandler            /*  9:  DMA_BRUST          */
115    def_irq_handler I2C_IRQHandler            /*  10: IIC         */
116    def_irq_handler ADC_IRQHandler            /*  11: SD ADC      */
117    def_irq_handler SPI_LS_IRQHandler         /*  12: LS SPI      */
118    def_irq_handler SPI_HS_IRQHandler         /*  13: HS SPI      */
119    def_irq_handler GPIOA_IRQHandler          /*  14: GPIOA       */
120    def_irq_handler GPIOB_IRQHandler          /*  15: GPIOB       */
121    def_irq_handler USART_IRQHandler          /*  16: UART0       */
122    def_irq_handler USART1_IRQHandler         /*  17: UART1       */
123    def_irq_handler USART2_IRQHandler         /*  18: UART2&7816  */
124    def_irq_handler USART3_5_IRQHandler       /*  19: USART3_5    */
125    def_irq_handler BLE_IRQHandler            /*  20: BLE         */
126    def_irq_handler BT_IRQHandler             /*  21: BT          */
127    def_irq_handler PWM_IRQHandler            /*  22: PWM         */
128    def_irq_handler I2S_IRQHandler            /*  23: I2S         */
129    def_irq_handler SDIO_HOST_IRQHandler      /*  24: SDIO HOST   */
130    def_irq_handler CORET_IRQHandler        /*  25:  CoreTIM      */
131    def_irq_handler RSA_IRQHandler          /*  26:  RSA          */
132    def_irq_handler GPSEC_IRQHandler        /*  27:  GPSEC        */
133    def_irq_handler FLASH_IRQHandler        /*  28:  Flash        */
134    def_irq_handler PMU_IRQHandler          /*  29:  PMU          */
135    def_irq_handler TIM0_5_IRQHandler       /*  30:  Timer0_5     */
136    def_irq_handler WDG_IRQHandler          /*  31:  Watch dog    */
137