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1 /*
2  * Copyright (c) 2022 Winner Microelectronics Co., Ltd. All rights reserved.
3  * Licensed under the Apache License, Version 2.0 (the "License");
4  * you may not use this file except in compliance with the License.
5  * You may obtain a copy of the License at
6  *
7  *     http://www.apache.org/licenses/LICENSE-2.0
8  *
9  * Unless required by applicable law or agreed to in writing, software
10  * distributed under the License is distributed on an "AS IS" BASIS,
11  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12  * See the License for the specific language governing permissions and
13  * limitations under the License.
14  */
15 
16 /**
17  * @file    wm_irq.c
18  *
19  * @brief   interupt driver module
20  *
21  * @author  dave
22  *
23  * Copyright (c) 2015 Winner Microelectronics Co., Ltd.
24  */
25 
26 #include "core_804.h"
27 #include "wm_regs.h"
28 #include "wm_config.h"
29 #include "wm_mem.h"
30 #include "wm_irq.h"
31 
32 /* irq functions declare */
33 extern ATTRIBUTE_ISR void i2s_I2S_IRQHandler(void);
34 extern ATTRIBUTE_ISR void GPIOA_IRQHandler(void);
35 extern ATTRIBUTE_ISR void GPIOB_IRQHandler(void);
36 extern ATTRIBUTE_ISR void i2c_I2C_IRQHandler(void);
37 extern ATTRIBUTE_ISR void UART0_IRQHandler(void);
38 extern ATTRIBUTE_ISR void UART1_IRQHandler(void);
39 extern ATTRIBUTE_ISR void UART2_IRQHandler(void);
40 extern ATTRIBUTE_ISR void UART2_4_IRQHandler(void);
41 extern ATTRIBUTE_ISR void PWM_IRQHandler(void);
42 extern ATTRIBUTE_ISR void SPI_LS_IRQHandler(void);
43 extern ATTRIBUTE_ISR void HSPI_IRQHandler(void);
44 extern ATTRIBUTE_ISR void SDIOA_IRQHandler(void);
45 extern ATTRIBUTE_ISR void DMA_Channel0_IRQHandler(void);
46 extern ATTRIBUTE_ISR void DMA_Channel1_IRQHandler(void);
47 extern ATTRIBUTE_ISR void DMA_Channel2_IRQHandler(void);
48 extern ATTRIBUTE_ISR void DMA_Channel3_IRQHandler(void);
49 extern ATTRIBUTE_ISR void DMA_Channel4_7_IRQHandler(void);
50 extern ATTRIBUTE_ISR void ADC_IRQHandler(void);
51 extern ATTRIBUTE_ISR void GPSEC_IRQ_Handler(void);
52 extern ATTRIBUTE_ISR void RSA_IRQ_Handler(void);
53 extern ATTRIBUTE_ISR void TIM0_5_IRQ_Handler(void);
54 extern ATTRIBUTE_ISR void SPI_HS_IRQ_Handler(void);
55 extern ATTRIBUTE_ISR void MAC_IRQ_Handler(void);
56 extern ATTRIBUTE_ISR void SEC_IRQ_Handler(void);
57 extern ATTRIBUTE_ISR void PMU_IRQ_Handler(void);
58 extern ATTRIBUTE_ISR void WDG_IRQHandler(void);
59 
60 static u32 irqen_status = 0;
61 
62 /**
63  * @brief              This function is used to initial system interrupt.
64  *
65  * @param[in]          None
66  *
67  * @return             None
68  *
69  * @note               None
70  */
tls_irq_init(void)71 void tls_irq_init(void)
72 {
73     /* clear bt mask */
74     tls_reg_write32(0x40002A10, 0xFFFFFFFF);
75     NVIC_ClearPendingIRQ(BT_IRQn);
76 
77     csi_vic_set_vector(I2S_IRQn, (uint32_t)i2s_I2S_IRQHandler);
78     csi_vic_set_vector(I2C_IRQn, (uint32_t)i2c_I2C_IRQHandler);
79     csi_vic_set_vector(GPIOA_IRQn, (uint32_t)GPIOA_IRQHandler);
80     csi_vic_set_vector(GPIOB_IRQn, (uint32_t)GPIOB_IRQHandler);
81     csi_vic_set_vector(UART0_IRQn, (uint32_t)UART0_IRQHandler);
82     csi_vic_set_vector(UART1_IRQn, (uint32_t)UART1_IRQHandler);
83     csi_vic_set_vector(UART24_IRQn, (uint32_t)UART2_4_IRQHandler);
84     csi_vic_set_vector(PWM_IRQn, (uint32_t)PWM_IRQHandler);
85     csi_vic_set_vector(SPI_LS_IRQn, (uint32_t)SPI_LS_IRQHandler);
86 #if TLS_CONFIG_HS_SPI
87     csi_vic_set_vector(SPI_HS_IRQn, (uint32_t)HSPI_IRQHandler);
88     csi_vic_set_vector(SDIO_IRQn, (uint32_t)SDIOA_IRQHandler);
89 #endif
90     csi_vic_set_vector(ADC_IRQn, (uint32_t)ADC_IRQHandler);
91     csi_vic_set_vector(DMA_Channel0_IRQn, (uint32_t)DMA_Channel0_IRQHandler);
92     csi_vic_set_vector(DMA_Channel1_IRQn, (uint32_t)DMA_Channel1_IRQHandler);
93     csi_vic_set_vector(DMA_Channel2_IRQn, (uint32_t)DMA_Channel2_IRQHandler);
94     csi_vic_set_vector(DMA_Channel3_IRQn, (uint32_t)DMA_Channel3_IRQHandler);
95     csi_vic_set_vector(DMA_Channel4_7_IRQn, (uint32_t)DMA_Channel4_7_IRQHandler);
96     csi_vic_set_vector(RSA_IRQn, (uint32_t)RSA_IRQ_Handler);
97     csi_vic_set_vector(CRYPTION_IRQn, (uint32_t)GPSEC_IRQ_Handler);
98     csi_vic_set_vector(TIMER_IRQn, (uint32_t)TIM0_5_IRQ_Handler);
99     csi_vic_set_vector(SPI_HS_IRQn, (uint32_t)SPI_HS_IRQ_Handler);
100     csi_vic_set_vector(MAC_IRQn, (uint32_t)MAC_IRQ_Handler);
101     csi_vic_set_vector(SEC_IRQn, (uint32_t)SEC_IRQ_Handler);
102     csi_vic_set_vector(PMU_IRQn, (uint32_t)PMU_IRQ_Handler);
103 }
104 
105 /**
106  * @brief              This function is used to register interrupt.
107  *
108  * @param[in]          vec_no           interrupt no
109  * @param[in]          handler
110  * @param[in]          *data
111  *
112  * @return             None
113  *
114  * @note               None
115  */
tls_irq_register_handler(u8 vec_no,intr_handler_func handler,void * data)116 void tls_irq_register_handler(u8 vec_no, intr_handler_func handler, void *data)
117 {
118 }
119 
120 /**
121  * @brief              This function is used to enable interrupt.
122  *
123  * @param[in]          vec_no       interrupt no
124  *
125  * @return             None
126  *
127  * @note               None
128  */
tls_irq_enable(u8 vec_no)129 void tls_irq_enable(u8 vec_no)
130 {
131     if ((irqen_status & (1<<vec_no)) == 0) {
132         irqen_status |= 1<<vec_no;
133         NVIC_ClearPendingIRQ((IRQn_Type)vec_no);
134         NVIC_EnableIRQ((IRQn_Type)vec_no);
135     }
136 }
137 
138 /**
139  * @brief              This function is used to disable interrupt.
140  *
141  * @param[in]          vec_no       interrupt no
142  *
143  * @return             None
144  *
145  * @note               None
146  */
tls_irq_disable(u8 vec_no)147 void tls_irq_disable(u8 vec_no)
148 {
149     if (irqen_status & (1<<vec_no)) {
150         irqen_status &= ~(1<<vec_no);
151         NVIC_DisableIRQ((IRQn_Type)vec_no);
152     }
153 }
154 
tls_irq_priority(u8 vec_no,u32 prio)155 void tls_irq_priority(u8 vec_no, u32 prio)
156 {
157     NVIC_SetPriority((IRQn_Type)vec_no, prio);
158 }